History log of /XiangShan/src/main/scala/xiangshan/backend/fu/vector/ByteMaskTailGen.scala (Results 1 – 7 of 7)
Revision Date Author Comments
# bb2f3f51 12-Jul-2024 Tang Haojin <[email protected]>

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies th

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies them and put them in Utility repository.

show more ...


# 81cbff07 17-Apr-2024 chengguanghui <[email protected]>

FU: fix mgu for body elements's agnostic

* Modify the signal names about divided vector elements to be consistent with RVV Spec.


# 494bf430 06-Nov-2023 zhanglinjuan <[email protected]>

Mgu: move activeEn and tailEn into ByteMaskTailGen without truncating
vstart and vl


# 382346a1 05-Nov-2023 zhanglinjuan <[email protected]>

backend,mem: read old vd of vector loads at issue instead of vldMgu


# e8aa8723 03-Nov-2023 zhanglinjuan <[email protected]>

ByteMaskTailGen: keep old data when vstart >= vl


# 83ba63b3 11-Oct-2023 Xuan Hu <[email protected]>

fix merge error


# 95c56213 26-May-2023 Xuan Hu <[email protected]>

vector: add mask-tail genenerator for byte data