1package xiangshan.backend.fu.vector 2 3import org.chipsalliance.cde.config.Parameters 4import chisel3._ 5import chisel3.util._ 6import xiangshan.backend.fu.vector.Bundles.{VSew, Vl} 7import xiangshan.backend.fu.vector.utils.{MaskExtractor, UIntToContLow0s, UIntToContLow1s} 8import _root_.utils.XSDebug 9import yunsuan.vector.SewOH 10 11 12class ByteMaskTailGenIO(vlen: Int)(implicit p: Parameters) extends Bundle { 13 private val numBytes = vlen / 8 14 private val elemIdxWidth = log2Up(numBytes + 1) // if numBytes is 16, begin and end should contains 0~16 15 println(s"elemIdxWidth: $elemIdxWidth") 16 17 val in = Input(new Bundle { 18 val begin = UInt(elemIdxWidth.W) 19 val end = UInt(elemIdxWidth.W) 20 val vma = Bool() 21 val vta = Bool() 22 val vsew = VSew() 23 val maskUsed = UInt(numBytes.W) 24 }) 25 val out = Output(new Bundle { 26 val keepEn = UInt(numBytes.W) 27 val agnosticEn = UInt(numBytes.W) 28 }) 29 val debugOnly = Output(new Bundle { 30 val startBytes = UInt() 31 val vlBytes = UInt() 32 val prestartEn = UInt() 33 val activeEn = UInt() 34 val tailEn = UInt() 35 val maskEn = UInt() 36 val maskAgnosticEn = UInt() 37 val tailAgnosticEn = UInt() 38 val agnosticEn = UInt() 39 }) 40} 41 42class ByteMaskTailGen(vlen: Int)(implicit p: Parameters) extends Module { 43 require(isPow2(vlen)) 44 45 private val numBytes = vlen / 8 46 private val byteWidth = log2Up(numBytes) // vlen=128, numBytes=16, byteWidth=log2(16)=4 47 48 println(s"numBytes: ${numBytes}, byteWidth: ${byteWidth}") 49 50 val io = IO(new ByteMaskTailGenIO(vlen)) 51 52 private val eewOH = SewOH(io.in.vsew).oneHot 53 54 private val startBytes = Mux1H(eewOH, Seq.tabulate(4)(x => io.in.begin(byteWidth - x, 0) << x)).asUInt 55 private val vlBytes = Mux1H(eewOH, Seq.tabulate(4)(x => io.in.end(byteWidth - x, 0) << x)).asUInt 56 57 private val prestartEn = UIntToContLow1s(startBytes, numBytes) 58 private val activeEn = UIntToContLow0s(startBytes, numBytes) & UIntToContLow1s(vlBytes, numBytes) 59 private val tailEn = UIntToContLow0s(vlBytes, numBytes) 60 61 private val maskEn = MaskExtractor(vlen)(io.in.maskUsed, io.in.vsew) 62 private val maskOffEn = (~maskEn).asUInt 63 private val maskAgnosticEn = Mux(io.in.vma, maskOffEn, 0.U) 64 65 private val tailAgnosticEn = Mux(io.in.vta, tailEn, 0.U) 66 67 private val keepEn = activeEn & maskEn 68 private val agnosticEn = maskAgnosticEn | tailAgnosticEn 69 70 io.out.keepEn := keepEn 71 io.out.agnosticEn := agnosticEn 72 73 io.debugOnly.startBytes := startBytes 74 io.debugOnly.vlBytes := vlBytes 75 io.debugOnly.prestartEn := prestartEn 76 io.debugOnly.activeEn := activeEn 77 io.debugOnly.tailEn := tailEn 78 io.debugOnly.maskEn := maskEn 79 io.debugOnly.maskAgnosticEn := maskAgnosticEn 80 io.debugOnly.tailAgnosticEn := tailAgnosticEn 81 io.debugOnly.agnosticEn := agnosticEn 82} 83 84