fix(xiselect): set the minimum range for xiselect (#4594)

The miselect register implements at least enough bits to support all
implemented miselect values.
The siselect register will support the val

fix(xiselect): set the minimum range for xiselect (#4594)

The miselect register implements at least enough bits to support all
implemented miselect values.
The siselect register will support the value range 0..0xFFF at a
minimum.
The vsiselect register will support the value range 0..0xFFF at a
minimum.

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feat(AIA): integrate ChiselAIA again (#4509)

Revert "feat(AIA): integrate ChiselAIA (#4378)" (#4429)

This reverts commit 7fbc1cb42a2c96ef89a1dfd0f5f885ccada40c26.

feat(AIA): integrate ChiselAIA (#4378)

fix(aia): iprio array is masked by xie CSR

* For a given interrupt number, if the corresponding bit in mie
is read-only zero, then the interrupt’s priority number in the
iprio array must be read

fix(aia): iprio array is masked by xie CSR

* For a given interrupt number, if the corresponding bit in mie
is read-only zero, then the interrupt’s priority number in the
iprio array must be read-only zero as well.

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fix(aia): add the missing AIA-related permission checks

Along the same lines, when hstatus.VGEIN is not the number of an implemented guest external
interrupt, attempts from M-mode or HS-mode to acce

fix(aia): add the missing AIA-related permission checks

Along the same lines, when hstatus.VGEIN is not the number of an implemented guest external
interrupt, attempts from M-mode or HS-mode to access CSR vstopei raise an illegal instruction
exception, and attempts from VS-mode to access stopei raise a virtual instruction exception.

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fix(aia): fix iprios bundle

fix(csr): add AIA xtopei event diff and remove AIA csr skip

fix(aia): fix permit check for aia and fix wen for aia csr. (#3547)

This pr fix aia permit check, and prevents writting sireg/mireg when
read from sireg/mireg.

CSR: miselect, siselect, vsiselect should have reset value since they are WARL

build: purge chisel 3 and add deprecation check (#3250)

NewCSR: fix xtopi priority select and iprio bundle

* unused interrupt field is read only 0 in Iprio Bundle

NewCSR: fix AIA ISelectField's isLegal to <= maxValue

NewCSR,AIA: connect external interrupt pending to xip CSR

* Connect meip produced by imsic to `mip.regOut.MEIP`.
* Connect seip produced by imsic to `mip.rdata.SEIP`.
* Connect vseip produced by ims

NewCSR,AIA: connect external interrupt pending to xip CSR

* Connect meip produced by imsic to `mip.regOut.MEIP`.
* Connect seip produced by imsic to `mip.rdata.SEIP`.
* Connect vseip produced by imsic to `hgeip.regOut[63:1]`

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NewCSR,AIA: fix connection of xtopei

NewCSR: fix miselect module name

bump AIA

NewCSR: fix connection of IMSIC

NewCSR: fix rdata when VS mode access VS CSRs by address of S mode

NewCSR: use rocketchip's CSR addr

NewCSR: use runtime reflect to call CSRFieldXXBits instead of compile reflect

NewCSR: fix rdataFields and Initialize CSR

* fix mtopi,stopi,vstopi regOut
* fix rdataFields :|= regOut
* fix pmpcfg regOut
* Initialze hie, hip, hedeleg, hideleg
* use regOut when field as alias

NewCSR: change the type of rdata to UInt in CSRModule

* Since the rdata bundle is used to get CSR read value, we change the type of rdata to UInt(64.W) and do all needed expansions before the value

NewCSR: change the type of rdata to UInt in CSRModule

* Since the rdata bundle is used to get CSR read value, we change the type of rdata to UInt(64.W) and do all needed expansions before the value assigned to rdata bundles.

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NewCSR: fix interrupt vector in InterruptFilter

NewCSR: fix CSRAIA connection