xref: /openwifi/kernel_boot/boards/zcu102_fmcs2/system.dts (revision 38796372a867b70f7d3ed3d3e62872f94c497953)
1/dts-v1/;
2
3/ {
4	compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
5	#address-cells = <0x2>;
6	#size-cells = <0x2>;
7	model = "ZynqMP ZCU102 Rev1.0";
8
9	cpus {
10		#address-cells = <0x1>;
11		#size-cells = <0x0>;
12
13		cpu@0 {
14			compatible = "arm,cortex-a53", "arm,armv8";
15			device_type = "cpu";
16			enable-method = "psci";
17			operating-points-v2 = <0x1>;
18			reg = <0x0>;
19			cpu-idle-states = <0x2>;
20			clocks = <0x3 0xa>;
21		};
22
23		cpu@1 {
24			compatible = "arm,cortex-a53", "arm,armv8";
25			device_type = "cpu";
26			enable-method = "psci";
27			reg = <0x1>;
28			operating-points-v2 = <0x1>;
29			cpu-idle-states = <0x2>;
30		};
31
32		cpu@2 {
33			compatible = "arm,cortex-a53", "arm,armv8";
34			device_type = "cpu";
35			enable-method = "psci";
36			reg = <0x2>;
37			operating-points-v2 = <0x1>;
38			cpu-idle-states = <0x2>;
39		};
40
41		cpu@3 {
42			compatible = "arm,cortex-a53", "arm,armv8";
43			device_type = "cpu";
44			enable-method = "psci";
45			reg = <0x3>;
46			operating-points-v2 = <0x1>;
47			cpu-idle-states = <0x2>;
48		};
49
50		idle-states {
51			entry-method = "arm,psci";
52
53			cpu-sleep-0 {
54				compatible = "arm,idle-state";
55				arm,psci-suspend-param = <0x40000000>;
56				local-timer-stop;
57				entry-latency-us = <0x12c>;
58				exit-latency-us = <0x258>;
59				min-residency-us = <0x2710>;
60				linux,phandle = <0x2>;
61				phandle = <0x2>;
62			};
63		};
64	};
65
66	cpu_opp_table {
67		compatible = "operating-points-v2";
68		opp-shared;
69		linux,phandle = <0x1>;
70		phandle = <0x1>;
71
72		opp00 {
73			opp-hz = <0x0 0x47868bf4>;
74			opp-microvolt = <0xf4240>;
75			clock-latency-ns = <0x7a120>;
76		};
77
78		opp01 {
79			opp-hz = <0x0 0x23c345fa>;
80			opp-microvolt = <0xf4240>;
81			clock-latency-ns = <0x7a120>;
82		};
83
84		opp02 {
85			opp-hz = <0x0 0x17d783fc>;
86			opp-microvolt = <0xf4240>;
87			clock-latency-ns = <0x7a120>;
88		};
89
90		opp03 {
91			opp-hz = <0x0 0x11e1a2fd>;
92			opp-microvolt = <0xf4240>;
93			clock-latency-ns = <0x7a120>;
94		};
95	};
96
97	dcc {
98		compatible = "arm,dcc";
99		status = "okay";
100		u-boot,dm-pre-reloc;
101	};
102
103	pinctrl {
104		compatible = "xlnx,zynqmp-pinctrl";
105		status = "okay";
106
107		i2c0-default {
108			linux,phandle = <0x18>;
109			phandle = <0x18>;
110
111			mux {
112				groups = "i2c0_3_grp";
113				function = "i2c0";
114			};
115
116			conf {
117				groups = "i2c0_3_grp";
118				bias-pull-up;
119				slew-rate = <0x1>;
120				io-standard = <0x1>;
121			};
122		};
123
124		i2c0-gpio {
125			linux,phandle = <0x19>;
126			phandle = <0x19>;
127
128			mux {
129				groups = "gpio0_14_grp", "gpio0_15_grp";
130				function = "gpio0";
131			};
132
133			conf {
134				groups = "gpio0_14_grp", "gpio0_15_grp";
135				slew-rate = <0x1>;
136				io-standard = <0x1>;
137			};
138		};
139
140		i2c1-default {
141			linux,phandle = <0x1c>;
142			phandle = <0x1c>;
143
144			mux {
145				groups = "i2c1_4_grp";
146				function = "i2c1";
147			};
148
149			conf {
150				groups = "i2c1_4_grp";
151				bias-pull-up;
152				slew-rate = <0x1>;
153				io-standard = <0x1>;
154			};
155		};
156
157		i2c1-gpio {
158			linux,phandle = <0x1d>;
159			phandle = <0x1d>;
160
161			mux {
162				groups = "gpio0_16_grp", "gpio0_17_grp";
163				function = "gpio0";
164			};
165
166			conf {
167				groups = "gpio0_16_grp", "gpio0_17_grp";
168				slew-rate = <0x1>;
169				io-standard = <0x1>;
170			};
171		};
172
173		uart0-default {
174			linux,phandle = <0x31>;
175			phandle = <0x31>;
176
177			mux {
178				groups = "uart0_4_grp";
179				function = "uart0";
180			};
181
182			conf {
183				groups = "uart0_4_grp";
184				slew-rate = <0x1>;
185				io-standard = <0x1>;
186			};
187
188			conf-rx {
189				pins = "MIO18";
190				bias-high-impedance;
191			};
192
193			conf-tx {
194				pins = "MIO19";
195				bias-disable;
196			};
197		};
198
199		uart1-default {
200			linux,phandle = <0x33>;
201			phandle = <0x33>;
202
203			mux {
204				groups = "uart1_5_grp";
205				function = "uart1";
206			};
207
208			conf {
209				groups = "uart1_5_grp";
210				slew-rate = <0x1>;
211				io-standard = <0x1>;
212			};
213
214			conf-rx {
215				pins = "MIO21";
216				bias-high-impedance;
217			};
218
219			conf-tx {
220				pins = "MIO20";
221				bias-disable;
222			};
223		};
224
225		usb0-default {
226			linux,phandle = <0x35>;
227			phandle = <0x35>;
228
229			mux {
230				groups = "usb0_0_grp";
231				function = "usb0";
232			};
233
234			conf {
235				groups = "usb0_0_grp";
236				slew-rate = <0x1>;
237				io-standard = <0x1>;
238			};
239
240			conf-rx {
241				pins = "MIO52", "MIO53", "MIO55";
242				bias-high-impedance;
243			};
244
245			conf-tx {
246				pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63";
247				bias-disable;
248			};
249		};
250
251		gem3-default {
252			linux,phandle = <0x14>;
253			phandle = <0x14>;
254
255			mux {
256				function = "ethernet3";
257				groups = "ethernet3_0_grp";
258			};
259
260			conf {
261				groups = "ethernet3_0_grp";
262				slew-rate = <0x1>;
263				io-standard = <0x1>;
264			};
265
266			conf-rx {
267				pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75";
268				bias-high-impedance;
269				low-power-disable;
270			};
271
272			conf-tx {
273				pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69";
274				bias-disable;
275				low-power-enable;
276			};
277
278			mux-mdio {
279				function = "mdio3";
280				groups = "mdio3_0_grp";
281			};
282
283			conf-mdio {
284				groups = "mdio3_0_grp";
285				slew-rate = <0x1>;
286				io-standard = <0x1>;
287				bias-disable;
288			};
289		};
290
291		can1-default {
292			linux,phandle = <0x9>;
293			phandle = <0x9>;
294
295			mux {
296				function = "can1";
297				groups = "can1_6_grp";
298			};
299
300			conf {
301				groups = "can1_6_grp";
302				slew-rate = <0x1>;
303				io-standard = <0x1>;
304			};
305
306			conf-rx {
307				pins = "MIO25";
308				bias-high-impedance;
309			};
310
311			conf-tx {
312				pins = "MIO24";
313				bias-disable;
314			};
315		};
316
317		sdhci1-default {
318			linux,phandle = <0x28>;
319			phandle = <0x28>;
320
321			mux {
322				groups = "sdio1_0_grp";
323				function = "sdio1";
324			};
325
326			conf {
327				groups = "sdio1_0_grp";
328				slew-rate = <0x1>;
329				io-standard = <0x1>;
330				bias-disable;
331			};
332
333			mux-cd {
334				groups = "sdio1_cd_0_grp";
335				function = "sdio1_cd";
336			};
337
338			conf-cd {
339				groups = "sdio1_cd_0_grp";
340				bias-high-impedance;
341				bias-pull-up;
342				slew-rate = <0x1>;
343				io-standard = <0x1>;
344			};
345
346			mux-wp {
347				groups = "sdio1_wp_0_grp";
348				function = "sdio1_wp";
349			};
350
351			conf-wp {
352				groups = "sdio1_wp_0_grp";
353				bias-high-impedance;
354				bias-pull-up;
355				slew-rate = <0x1>;
356				io-standard = <0x1>;
357			};
358		};
359
360		gpio-default {
361			linux,phandle = <0x16>;
362			phandle = <0x16>;
363
364			mux-sw {
365				function = "gpio0";
366				groups = "gpio0_22_grp", "gpio0_23_grp";
367			};
368
369			conf-sw {
370				groups = "gpio0_22_grp", "gpio0_23_grp";
371				slew-rate = <0x1>;
372				io-standard = <0x1>;
373			};
374
375			mux-msp {
376				function = "gpio0";
377				groups = "gpio0_13_grp", "gpio0_38_grp";
378			};
379
380			conf-msp {
381				groups = "gpio0_13_grp", "gpio0_38_grp";
382				slew-rate = <0x1>;
383				io-standard = <0x1>;
384			};
385
386			conf-pull-up {
387				pins = "MIO22", "MIO23";
388				bias-pull-up;
389			};
390
391			conf-pull-none {
392				pins = "MIO13", "MIO38";
393				bias-disable;
394			};
395		};
396	};
397
398	power-domains {
399		compatible = "xlnx,zynqmp-genpd";
400
401		pd-usb0 {
402			#power-domain-cells = <0x0>;
403			pd-id = <0x16>;
404			linux,phandle = <0x34>;
405			phandle = <0x34>;
406		};
407
408		pd-usb1 {
409			#power-domain-cells = <0x0>;
410			pd-id = <0x17>;
411			linux,phandle = <0x37>;
412			phandle = <0x37>;
413		};
414
415		pd-sata {
416			#power-domain-cells = <0x0>;
417			pd-id = <0x1c>;
418			linux,phandle = <0x24>;
419			phandle = <0x24>;
420		};
421
422		pd-spi0 {
423			#power-domain-cells = <0x0>;
424			pd-id = <0x23>;
425			linux,phandle = <0x29>;
426			phandle = <0x29>;
427		};
428
429		pd-spi1 {
430			#power-domain-cells = <0x0>;
431			pd-id = <0x24>;
432			linux,phandle = <0x2b>;
433			phandle = <0x2b>;
434		};
435
436		pd-uart0 {
437			#power-domain-cells = <0x0>;
438			pd-id = <0x21>;
439			linux,phandle = <0x30>;
440			phandle = <0x30>;
441		};
442
443		pd-uart1 {
444			#power-domain-cells = <0x0>;
445			pd-id = <0x22>;
446			linux,phandle = <0x32>;
447			phandle = <0x32>;
448		};
449
450		pd-eth0 {
451			#power-domain-cells = <0x0>;
452			pd-id = <0x1d>;
453			linux,phandle = <0xf>;
454			phandle = <0xf>;
455		};
456
457		pd-eth1 {
458			#power-domain-cells = <0x0>;
459			pd-id = <0x1e>;
460			linux,phandle = <0x10>;
461			phandle = <0x10>;
462		};
463
464		pd-eth2 {
465			#power-domain-cells = <0x0>;
466			pd-id = <0x1f>;
467			linux,phandle = <0x11>;
468			phandle = <0x11>;
469		};
470
471		pd-eth3 {
472			#power-domain-cells = <0x0>;
473			pd-id = <0x20>;
474			linux,phandle = <0x12>;
475			phandle = <0x12>;
476		};
477
478		pd-i2c0 {
479			#power-domain-cells = <0x0>;
480			pd-id = <0x25>;
481			linux,phandle = <0x17>;
482			phandle = <0x17>;
483		};
484
485		pd-i2c1 {
486			#power-domain-cells = <0x0>;
487			pd-id = <0x26>;
488			linux,phandle = <0x1b>;
489			phandle = <0x1b>;
490		};
491
492		pd-dp {
493			#power-domain-cells = <0x0>;
494			pd-id = <0x29>;
495			linux,phandle = <0x38>;
496			phandle = <0x38>;
497		};
498
499		pd-gdma {
500			#power-domain-cells = <0x0>;
501			pd-id = <0x2a>;
502			linux,phandle = <0xb>;
503			phandle = <0xb>;
504		};
505
506		pd-adma {
507			#power-domain-cells = <0x0>;
508			pd-id = <0x2b>;
509			linux,phandle = <0xd>;
510			phandle = <0xd>;
511		};
512
513		pd-ttc0 {
514			#power-domain-cells = <0x0>;
515			pd-id = <0x18>;
516			linux,phandle = <0x2c>;
517			phandle = <0x2c>;
518		};
519
520		pd-ttc1 {
521			#power-domain-cells = <0x0>;
522			pd-id = <0x19>;
523			linux,phandle = <0x2d>;
524			phandle = <0x2d>;
525		};
526
527		pd-ttc2 {
528			#power-domain-cells = <0x0>;
529			pd-id = <0x1a>;
530			linux,phandle = <0x2e>;
531			phandle = <0x2e>;
532		};
533
534		pd-ttc3 {
535			#power-domain-cells = <0x0>;
536			pd-id = <0x1b>;
537			linux,phandle = <0x2f>;
538			phandle = <0x2f>;
539		};
540
541		pd-sd0 {
542			#power-domain-cells = <0x0>;
543			pd-id = <0x27>;
544			linux,phandle = <0x26>;
545			phandle = <0x26>;
546		};
547
548		pd-sd1 {
549			#power-domain-cells = <0x0>;
550			pd-id = <0x28>;
551			linux,phandle = <0x27>;
552			phandle = <0x27>;
553		};
554
555		pd-nand {
556			#power-domain-cells = <0x0>;
557			pd-id = <0x2c>;
558			linux,phandle = <0xe>;
559			phandle = <0xe>;
560		};
561
562		pd-qspi {
563			#power-domain-cells = <0x0>;
564			pd-id = <0x2d>;
565			linux,phandle = <0x21>;
566			phandle = <0x21>;
567		};
568
569		pd-gpio {
570			#power-domain-cells = <0x0>;
571			pd-id = <0x2e>;
572			linux,phandle = <0x15>;
573			phandle = <0x15>;
574		};
575
576		pd-can0 {
577			#power-domain-cells = <0x0>;
578			pd-id = <0x2f>;
579			linux,phandle = <0x7>;
580			phandle = <0x7>;
581		};
582
583		pd-can1 {
584			#power-domain-cells = <0x0>;
585			pd-id = <0x30>;
586			linux,phandle = <0x8>;
587			phandle = <0x8>;
588		};
589
590		pd-pcie {
591			#power-domain-cells = <0x0>;
592			pd-id = <0x3b>;
593			linux,phandle = <0x20>;
594			phandle = <0x20>;
595		};
596
597		pd-gpu {
598			#power-domain-cells = <0x0>;
599			pd-id = <0x3a 0x14 0x15>;
600			linux,phandle = <0xc>;
601			phandle = <0xc>;
602		};
603	};
604
605	mailbox@ff990400 {
606		compatible = "xlnx,zynqmp-ipi-mailbox";
607		reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>;
608		reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region";
609		#mbox-cells = <0x1>;
610		xlnx,ipi-ids = <0x0 0x4>;
611		interrupt-parent = <0x4>;
612		interrupts = <0x0 0x23 0x4>;
613		linux,phandle = <0x5>;
614		phandle = <0x5>;
615	};
616
617	pmu {
618		compatible = "arm,armv8-pmuv3";
619		interrupt-parent = <0x4>;
620		interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
621	};
622
623	psci {
624		compatible = "arm,psci-0.2";
625		method = "smc";
626	};
627
628	firmware {
629
630		zynqmp-firmware {
631			compatible = "xlnx,zynqmp-firmware";
632			method = "smc";
633		};
634	};
635
636	zynqmp-power {
637		compatible = "xlnx,zynqmp-power";
638		mboxes = <0x5 0x0 0x5 0x1>;
639		mbox-names = "tx", "rx";
640	};
641
642	timer {
643		compatible = "arm,armv8-timer";
644		interrupt-parent = <0x4>;
645		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
646	};
647
648	edac {
649		compatible = "arm,cortex-a53-edac";
650	};
651
652	fpga-full {
653		compatible = "fpga-region";
654		fpga-mgr = <0x6>;
655		#address-cells = <0x2>;
656		#size-cells = <0x2>;
657	};
658
659	nvmem_firmware {
660		compatible = "xlnx,zynqmp-nvmem-fw";
661		#address-cells = <0x1>;
662		#size-cells = <0x1>;
663
664		soc_revision@0 {
665			reg = <0x0 0x4>;
666			linux,phandle = <0x22>;
667			phandle = <0x22>;
668		};
669
670		efuse_dna@c {
671			reg = <0xc 0xc>;
672		};
673
674		efuse_usr0@20 {
675			reg = <0x20 0x4>;
676		};
677
678		efuse_usr1@24 {
679			reg = <0x24 0x4>;
680		};
681
682		efuse_usr2@28 {
683			reg = <0x28 0x4>;
684		};
685
686		efuse_usr3@2c {
687			reg = <0x2c 0x4>;
688		};
689
690		efuse_usr4@30 {
691			reg = <0x30 0x4>;
692		};
693
694		efuse_usr5@34 {
695			reg = <0x34 0x4>;
696		};
697
698		efuse_usr6@38 {
699			reg = <0x38 0x4>;
700		};
701
702		efuse_usr7@3c {
703			reg = <0x3c 0x4>;
704		};
705
706		efuse_miscusr@40 {
707			reg = <0x40 0x4>;
708		};
709
710		efuse_chash@50 {
711			reg = <0x50 0x4>;
712		};
713
714		efuse_pufmisc@54 {
715			reg = <0x54 0x4>;
716		};
717
718		efuse_sec@58 {
719			reg = <0x58 0x4>;
720		};
721
722		efuse_spkid@5c {
723			reg = <0x5c 0x4>;
724		};
725
726		efuse_ppk0hash@a0 {
727			reg = <0xa0 0x30>;
728		};
729
730		efuse_ppk1hash@d0 {
731			reg = <0xd0 0x30>;
732		};
733	};
734
735	pcap {
736		compatible = "xlnx,zynqmp-pcap-fpga";
737		clock-names = "ref_clk";
738		clocks = <0x3 0x29>;
739		linux,phandle = <0x6>;
740		phandle = <0x6>;
741	};
742
743	reset-controller {
744		compatible = "xlnx,zynqmp-reset";
745		#reset-cells = <0x1>;
746		linux,phandle = <0x23>;
747		phandle = <0x23>;
748	};
749
750	zynqmp_rsa {
751		compatible = "xlnx,zynqmp-rsa";
752	};
753
754	sha384 {
755		compatible = "xlnx,zynqmp-keccak-384";
756	};
757
758	zynqmp_aes {
759		compatible = "xlnx,zynqmp-aes";
760	};
761
762	amba_apu@0 {
763		compatible = "simple-bus";
764		#address-cells = <0x2>;
765		#size-cells = <0x1>;
766		ranges = <0x0 0x0 0x0 0x0 0xffffffff>;
767
768		interrupt-controller@f9010000 {
769			compatible = "arm,gic-400", "arm,cortex-a15-gic";
770			#interrupt-cells = <0x3>;
771			reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>;
772			interrupt-controller;
773			interrupt-parent = <0x4>;
774			interrupts = <0x1 0x9 0xf04>;
775			linux,phandle = <0x4>;
776			phandle = <0x4>;
777		};
778	};
779
780	smmu@fd800000 {
781		compatible = "arm,mmu-500";
782		reg = <0x0 0xfd800000 0x0 0x20000>;
783		#iommu-cells = <0x1>;
784		status = "disabled";
785		#global-interrupts = <0x1>;
786		interrupt-parent = <0x4>;
787		interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>;
788		linux,phandle = <0xa>;
789		phandle = <0xa>;
790	};
791
792	amba {
793		compatible = "simple-bus";
794		u-boot,dm-pre-reloc;
795		#address-cells = <0x2>;
796		#size-cells = <0x2>;
797		ranges;
798
799		can@ff060000 {
800			compatible = "xlnx,zynq-can-1.0";
801			status = "disabled";
802			clock-names = "can_clk", "pclk";
803			reg = <0x0 0xff060000 0x0 0x1000>;
804			interrupts = <0x0 0x17 0x4>;
805			interrupt-parent = <0x4>;
806			tx-fifo-depth = <0x40>;
807			rx-fifo-depth = <0x40>;
808			power-domains = <0x7>;
809			clocks = <0x3 0x3f 0x3 0x1f>;
810		};
811
812		can@ff070000 {
813			compatible = "xlnx,zynq-can-1.0";
814			status = "okay";
815			clock-names = "can_clk", "pclk";
816			reg = <0x0 0xff070000 0x0 0x1000>;
817			interrupts = <0x0 0x18 0x4>;
818			interrupt-parent = <0x4>;
819			tx-fifo-depth = <0x40>;
820			rx-fifo-depth = <0x40>;
821			power-domains = <0x8>;
822			clocks = <0x3 0x40 0x3 0x1f>;
823			pinctrl-names = "default";
824			pinctrl-0 = <0x9>;
825		};
826
827		cci@fd6e0000 {
828			compatible = "arm,cci-400";
829			reg = <0x0 0xfd6e0000 0x0 0x9000>;
830			ranges = <0x0 0x0 0xfd6e0000 0x10000>;
831			#address-cells = <0x1>;
832			#size-cells = <0x1>;
833
834			pmu@9000 {
835				compatible = "arm,cci-400-pmu,r1";
836				reg = <0x9000 0x5000>;
837				interrupt-parent = <0x4>;
838				interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>;
839			};
840		};
841
842		dma@fd500000 {
843			status = "okay";
844			compatible = "xlnx,zynqmp-dma-1.0";
845			reg = <0x0 0xfd500000 0x0 0x1000>;
846			interrupt-parent = <0x4>;
847			interrupts = <0x0 0x7c 0x4>;
848			clock-names = "clk_main", "clk_apb";
849			xlnx,bus-width = <0x80>;
850			#stream-id-cells = <0x1>;
851			iommus = <0xa 0x14e8>;
852			power-domains = <0xb>;
853			clocks = <0x3 0x13 0x3 0x1f>;
854		};
855
856		dma@fd510000 {
857			status = "okay";
858			compatible = "xlnx,zynqmp-dma-1.0";
859			reg = <0x0 0xfd510000 0x0 0x1000>;
860			interrupt-parent = <0x4>;
861			interrupts = <0x0 0x7d 0x4>;
862			clock-names = "clk_main", "clk_apb";
863			xlnx,bus-width = <0x80>;
864			#stream-id-cells = <0x1>;
865			iommus = <0xa 0x14e9>;
866			power-domains = <0xb>;
867			clocks = <0x3 0x13 0x3 0x1f>;
868		};
869
870		dma@fd520000 {
871			status = "okay";
872			compatible = "xlnx,zynqmp-dma-1.0";
873			reg = <0x0 0xfd520000 0x0 0x1000>;
874			interrupt-parent = <0x4>;
875			interrupts = <0x0 0x7e 0x4>;
876			clock-names = "clk_main", "clk_apb";
877			xlnx,bus-width = <0x80>;
878			#stream-id-cells = <0x1>;
879			iommus = <0xa 0x14ea>;
880			power-domains = <0xb>;
881			clocks = <0x3 0x13 0x3 0x1f>;
882		};
883
884		dma@fd530000 {
885			status = "okay";
886			compatible = "xlnx,zynqmp-dma-1.0";
887			reg = <0x0 0xfd530000 0x0 0x1000>;
888			interrupt-parent = <0x4>;
889			interrupts = <0x0 0x7f 0x4>;
890			clock-names = "clk_main", "clk_apb";
891			xlnx,bus-width = <0x80>;
892			#stream-id-cells = <0x1>;
893			iommus = <0xa 0x14eb>;
894			power-domains = <0xb>;
895			clocks = <0x3 0x13 0x3 0x1f>;
896		};
897
898		dma@fd540000 {
899			status = "okay";
900			compatible = "xlnx,zynqmp-dma-1.0";
901			reg = <0x0 0xfd540000 0x0 0x1000>;
902			interrupt-parent = <0x4>;
903			interrupts = <0x0 0x80 0x4>;
904			clock-names = "clk_main", "clk_apb";
905			xlnx,bus-width = <0x80>;
906			#stream-id-cells = <0x1>;
907			iommus = <0xa 0x14ec>;
908			power-domains = <0xb>;
909			clocks = <0x3 0x13 0x3 0x1f>;
910		};
911
912		dma@fd550000 {
913			status = "okay";
914			compatible = "xlnx,zynqmp-dma-1.0";
915			reg = <0x0 0xfd550000 0x0 0x1000>;
916			interrupt-parent = <0x4>;
917			interrupts = <0x0 0x81 0x4>;
918			clock-names = "clk_main", "clk_apb";
919			xlnx,bus-width = <0x80>;
920			#stream-id-cells = <0x1>;
921			iommus = <0xa 0x14ed>;
922			power-domains = <0xb>;
923			clocks = <0x3 0x13 0x3 0x1f>;
924		};
925
926		dma@fd560000 {
927			status = "okay";
928			compatible = "xlnx,zynqmp-dma-1.0";
929			reg = <0x0 0xfd560000 0x0 0x1000>;
930			interrupt-parent = <0x4>;
931			interrupts = <0x0 0x82 0x4>;
932			clock-names = "clk_main", "clk_apb";
933			xlnx,bus-width = <0x80>;
934			#stream-id-cells = <0x1>;
935			iommus = <0xa 0x14ee>;
936			power-domains = <0xb>;
937			clocks = <0x3 0x13 0x3 0x1f>;
938		};
939
940		dma@fd570000 {
941			status = "okay";
942			compatible = "xlnx,zynqmp-dma-1.0";
943			reg = <0x0 0xfd570000 0x0 0x1000>;
944			interrupt-parent = <0x4>;
945			interrupts = <0x0 0x83 0x4>;
946			clock-names = "clk_main", "clk_apb";
947			xlnx,bus-width = <0x80>;
948			#stream-id-cells = <0x1>;
949			iommus = <0xa 0x14ef>;
950			power-domains = <0xb>;
951			clocks = <0x3 0x13 0x3 0x1f>;
952		};
953
954		gpu@fd4b0000 {
955			status = "okay";
956			compatible = "arm,mali-400", "arm,mali-utgard";
957			reg = <0x0 0xfd4b0000 0x0 0x10000>;
958			interrupt-parent = <0x4>;
959			interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>;
960			interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
961			clock-names = "gpu", "gpu_pp0", "gpu_pp1";
962			power-domains = <0xc>;
963			clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>;
964		};
965
966		dma@ffa80000 {
967			status = "disabled";
968			compatible = "xlnx,zynqmp-dma-1.0";
969			reg = <0x0 0xffa80000 0x0 0x1000>;
970			interrupt-parent = <0x4>;
971			interrupts = <0x0 0x4d 0x4>;
972			clock-names = "clk_main", "clk_apb";
973			xlnx,bus-width = <0x40>;
974			#stream-id-cells = <0x1>;
975			power-domains = <0xd>;
976			clocks = <0x3 0x44 0x3 0x1f>;
977		};
978
979		dma@ffa90000 {
980			status = "disabled";
981			compatible = "xlnx,zynqmp-dma-1.0";
982			reg = <0x0 0xffa90000 0x0 0x1000>;
983			interrupt-parent = <0x4>;
984			interrupts = <0x0 0x4e 0x4>;
985			clock-names = "clk_main", "clk_apb";
986			xlnx,bus-width = <0x40>;
987			#stream-id-cells = <0x1>;
988			power-domains = <0xd>;
989			clocks = <0x3 0x44 0x3 0x1f>;
990		};
991
992		dma@ffaa0000 {
993			status = "disabled";
994			compatible = "xlnx,zynqmp-dma-1.0";
995			reg = <0x0 0xffaa0000 0x0 0x1000>;
996			interrupt-parent = <0x4>;
997			interrupts = <0x0 0x4f 0x4>;
998			clock-names = "clk_main", "clk_apb";
999			xlnx,bus-width = <0x40>;
1000			#stream-id-cells = <0x1>;
1001			power-domains = <0xd>;
1002			clocks = <0x3 0x44 0x3 0x1f>;
1003		};
1004
1005		dma@ffab0000 {
1006			status = "disabled";
1007			compatible = "xlnx,zynqmp-dma-1.0";
1008			reg = <0x0 0xffab0000 0x0 0x1000>;
1009			interrupt-parent = <0x4>;
1010			interrupts = <0x0 0x50 0x4>;
1011			clock-names = "clk_main", "clk_apb";
1012			xlnx,bus-width = <0x40>;
1013			#stream-id-cells = <0x1>;
1014			power-domains = <0xd>;
1015			clocks = <0x3 0x44 0x3 0x1f>;
1016		};
1017
1018		dma@ffac0000 {
1019			status = "disabled";
1020			compatible = "xlnx,zynqmp-dma-1.0";
1021			reg = <0x0 0xffac0000 0x0 0x1000>;
1022			interrupt-parent = <0x4>;
1023			interrupts = <0x0 0x51 0x4>;
1024			clock-names = "clk_main", "clk_apb";
1025			xlnx,bus-width = <0x40>;
1026			#stream-id-cells = <0x1>;
1027			power-domains = <0xd>;
1028			clocks = <0x3 0x44 0x3 0x1f>;
1029		};
1030
1031		dma@ffad0000 {
1032			status = "disabled";
1033			compatible = "xlnx,zynqmp-dma-1.0";
1034			reg = <0x0 0xffad0000 0x0 0x1000>;
1035			interrupt-parent = <0x4>;
1036			interrupts = <0x0 0x52 0x4>;
1037			clock-names = "clk_main", "clk_apb";
1038			xlnx,bus-width = <0x40>;
1039			#stream-id-cells = <0x1>;
1040			power-domains = <0xd>;
1041			clocks = <0x3 0x44 0x3 0x1f>;
1042		};
1043
1044		dma@ffae0000 {
1045			status = "disabled";
1046			compatible = "xlnx,zynqmp-dma-1.0";
1047			reg = <0x0 0xffae0000 0x0 0x1000>;
1048			interrupt-parent = <0x4>;
1049			interrupts = <0x0 0x53 0x4>;
1050			clock-names = "clk_main", "clk_apb";
1051			xlnx,bus-width = <0x40>;
1052			#stream-id-cells = <0x1>;
1053			power-domains = <0xd>;
1054			clocks = <0x3 0x44 0x3 0x1f>;
1055		};
1056
1057		dma@ffaf0000 {
1058			status = "disabled";
1059			compatible = "xlnx,zynqmp-dma-1.0";
1060			reg = <0x0 0xffaf0000 0x0 0x1000>;
1061			interrupt-parent = <0x4>;
1062			interrupts = <0x0 0x54 0x4>;
1063			clock-names = "clk_main", "clk_apb";
1064			xlnx,bus-width = <0x40>;
1065			#stream-id-cells = <0x1>;
1066			power-domains = <0xd>;
1067			clocks = <0x3 0x44 0x3 0x1f>;
1068		};
1069
1070		memory-controller@fd070000 {
1071			compatible = "xlnx,zynqmp-ddrc-2.40a";
1072			reg = <0x0 0xfd070000 0x0 0x30000>;
1073			interrupt-parent = <0x4>;
1074			interrupts = <0x0 0x70 0x4>;
1075		};
1076
1077		nand@ff100000 {
1078			compatible = "arasan,nfc-v3p10";
1079			status = "disabled";
1080			reg = <0x0 0xff100000 0x0 0x1000>;
1081			clock-names = "clk_sys", "clk_flash";
1082			interrupt-parent = <0x4>;
1083			interrupts = <0x0 0xe 0x4>;
1084			#address-cells = <0x1>;
1085			#size-cells = <0x0>;
1086			#stream-id-cells = <0x1>;
1087			iommus = <0xa 0x872>;
1088			power-domains = <0xe>;
1089			clocks = <0x3 0x3c 0x3 0x1f>;
1090		};
1091
1092		ethernet@ff0b0000 {
1093			compatible = "cdns,zynqmp-gem", "cdns,gem";
1094			status = "disabled";
1095			interrupt-parent = <0x4>;
1096			interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
1097			reg = <0x0 0xff0b0000 0x0 0x1000>;
1098			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
1099			#address-cells = <0x1>;
1100			#size-cells = <0x0>;
1101			#stream-id-cells = <0x1>;
1102			iommus = <0xa 0x874>;
1103			power-domains = <0xf>;
1104			clocks = <0x3 0x1f 0x3 0x68 0x3 0x2d 0x3 0x31 0x3 0x2c>;
1105		};
1106
1107		ethernet@ff0c0000 {
1108			compatible = "cdns,zynqmp-gem", "cdns,gem";
1109			status = "disabled";
1110			interrupt-parent = <0x4>;
1111			interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
1112			reg = <0x0 0xff0c0000 0x0 0x1000>;
1113			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
1114			#address-cells = <0x1>;
1115			#size-cells = <0x0>;
1116			#stream-id-cells = <0x1>;
1117			iommus = <0xa 0x875>;
1118			power-domains = <0x10>;
1119			clocks = <0x3 0x1f 0x3 0x69 0x3 0x2e 0x3 0x32 0x3 0x2c>;
1120		};
1121
1122		ethernet@ff0d0000 {
1123			compatible = "cdns,zynqmp-gem", "cdns,gem";
1124			status = "disabled";
1125			interrupt-parent = <0x4>;
1126			interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
1127			reg = <0x0 0xff0d0000 0x0 0x1000>;
1128			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
1129			#address-cells = <0x1>;
1130			#size-cells = <0x0>;
1131			#stream-id-cells = <0x1>;
1132			iommus = <0xa 0x876>;
1133			power-domains = <0x11>;
1134			clocks = <0x3 0x1f 0x3 0x6a 0x3 0x2f 0x3 0x33 0x3 0x2c>;
1135		};
1136
1137		ethernet@ff0e0000 {
1138			compatible = "cdns,zynqmp-gem", "cdns,gem";
1139			status = "okay";
1140			interrupt-parent = <0x4>;
1141			interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
1142			reg = <0x0 0xff0e0000 0x0 0x1000>;
1143			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
1144			#address-cells = <0x1>;
1145			#size-cells = <0x0>;
1146			#stream-id-cells = <0x1>;
1147			iommus = <0xa 0x877>;
1148			power-domains = <0x12>;
1149			clocks = <0x3 0x1f 0x3 0x6b 0x3 0x30 0x3 0x34 0x3 0x2c>;
1150			phy-handle = <0x13>;
1151			phy-mode = "rgmii-id";
1152			pinctrl-names = "default";
1153			pinctrl-0 = <0x14>;
1154
1155			phy@c {
1156				reg = <0xc>;
1157				ti,rx-internal-delay = <0x8>;
1158				ti,tx-internal-delay = <0xa>;
1159				ti,fifo-depth = <0x1>;
1160				ti,rxctrl-strap-worka;
1161				linux,phandle = <0x13>;
1162				phandle = <0x13>;
1163			};
1164		};
1165
1166		gpio@ff0a0000 {
1167			compatible = "xlnx,zynqmp-gpio-1.0";
1168			status = "okay";
1169			#gpio-cells = <0x2>;
1170			interrupt-parent = <0x4>;
1171			interrupts = <0x0 0x10 0x4>;
1172			interrupt-controller;
1173			#interrupt-cells = <0x2>;
1174			reg = <0x0 0xff0a0000 0x0 0x1000>;
1175			gpio-controller;
1176			power-domains = <0x15>;
1177			clocks = <0x3 0x1f>;
1178			pinctrl-names = "default";
1179			pinctrl-0 = <0x16>;
1180			linux,phandle = <0x1a>;
1181			phandle = <0x1a>;
1182		};
1183
1184		i2c@ff020000 {
1185			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
1186			status = "okay";
1187			interrupt-parent = <0x4>;
1188			interrupts = <0x0 0x11 0x4>;
1189			reg = <0x0 0xff020000 0x0 0x1000>;
1190			#address-cells = <0x1>;
1191			#size-cells = <0x0>;
1192			power-domains = <0x17>;
1193			clocks = <0x3 0x3d>;
1194			clock-frequency = <0x61a80>;
1195			pinctrl-names = "default", "gpio";
1196			pinctrl-0 = <0x18>;
1197			pinctrl-1 = <0x19>;
1198			scl-gpios = <0x1a 0xe 0x0>;
1199			sda-gpios = <0x1a 0xf 0x0>;
1200
1201			gpio@20 {
1202				compatible = "ti,tca6416";
1203				reg = <0x20>;
1204				gpio-controller;
1205				#gpio-cells = <0x2>;
1206
1207				gtr_sel0 {
1208					gpio-hog;
1209					gpios = <0x0 0x0>;
1210					output-low;
1211					line-name = "sel0";
1212				};
1213
1214				gtr_sel1 {
1215					gpio-hog;
1216					gpios = <0x1 0x0>;
1217					output-high;
1218					line-name = "sel1";
1219				};
1220
1221				gtr_sel2 {
1222					gpio-hog;
1223					gpios = <0x2 0x0>;
1224					output-high;
1225					line-name = "sel2";
1226				};
1227
1228				gtr_sel3 {
1229					gpio-hog;
1230					gpios = <0x3 0x0>;
1231					output-high;
1232					line-name = "sel3";
1233				};
1234			};
1235
1236			gpio@21 {
1237				compatible = "ti,tca6416";
1238				reg = <0x21>;
1239				gpio-controller;
1240				#gpio-cells = <0x2>;
1241			};
1242
1243			i2c-mux@75 {
1244				compatible = "nxp,pca9544";
1245				#address-cells = <0x1>;
1246				#size-cells = <0x0>;
1247				reg = <0x75>;
1248
1249				i2c@0 {
1250					#address-cells = <0x1>;
1251					#size-cells = <0x0>;
1252					reg = <0x0>;
1253
1254					ina226@40 {
1255						compatible = "ti,ina226";
1256						reg = <0x40>;
1257						shunt-resistor = <0x1388>;
1258					};
1259
1260					ina226@41 {
1261						compatible = "ti,ina226";
1262						reg = <0x41>;
1263						shunt-resistor = <0x1388>;
1264					};
1265
1266					ina226@42 {
1267						compatible = "ti,ina226";
1268						reg = <0x42>;
1269						shunt-resistor = <0x1388>;
1270					};
1271
1272					ina226@43 {
1273						compatible = "ti,ina226";
1274						reg = <0x43>;
1275						shunt-resistor = <0x1388>;
1276					};
1277
1278					ina226@44 {
1279						compatible = "ti,ina226";
1280						reg = <0x44>;
1281						shunt-resistor = <0x1388>;
1282					};
1283
1284					ina226@45 {
1285						compatible = "ti,ina226";
1286						reg = <0x45>;
1287						shunt-resistor = <0x1388>;
1288					};
1289
1290					ina226@46 {
1291						compatible = "ti,ina226";
1292						reg = <0x46>;
1293						shunt-resistor = <0x1388>;
1294					};
1295
1296					ina226@47 {
1297						compatible = "ti,ina226";
1298						reg = <0x47>;
1299						shunt-resistor = <0x1388>;
1300					};
1301
1302					ina226@4a {
1303						compatible = "ti,ina226";
1304						reg = <0x4a>;
1305						shunt-resistor = <0x1388>;
1306					};
1307
1308					ina226@4b {
1309						compatible = "ti,ina226";
1310						reg = <0x4b>;
1311						shunt-resistor = <0x1388>;
1312					};
1313				};
1314
1315				i2c@1 {
1316					#address-cells = <0x1>;
1317					#size-cells = <0x0>;
1318					reg = <0x1>;
1319
1320					ina226@40 {
1321						compatible = "ti,ina226";
1322						reg = <0x40>;
1323						shunt-resistor = <0x7d0>;
1324					};
1325
1326					ina226@41 {
1327						compatible = "ti,ina226";
1328						reg = <0x41>;
1329						shunt-resistor = <0x1388>;
1330					};
1331
1332					ina226@42 {
1333						compatible = "ti,ina226";
1334						reg = <0x42>;
1335						shunt-resistor = <0x1388>;
1336					};
1337
1338					ina226@43 {
1339						compatible = "ti,ina226";
1340						reg = <0x43>;
1341						shunt-resistor = <0x1388>;
1342					};
1343
1344					ina226@44 {
1345						compatible = "ti,ina226";
1346						reg = <0x44>;
1347						shunt-resistor = <0x1388>;
1348					};
1349
1350					ina226@45 {
1351						compatible = "ti,ina226";
1352						reg = <0x45>;
1353						shunt-resistor = <0x1388>;
1354					};
1355
1356					ina226@46 {
1357						compatible = "ti,ina226";
1358						reg = <0x46>;
1359						shunt-resistor = <0x1388>;
1360					};
1361
1362					ina226@47 {
1363						compatible = "ti,ina226";
1364						reg = <0x47>;
1365						shunt-resistor = <0x1388>;
1366					};
1367				};
1368
1369				i2c@2 {
1370					#address-cells = <0x1>;
1371					#size-cells = <0x0>;
1372					reg = <0x2>;
1373
1374					max15301@a {
1375						compatible = "maxim,max15301";
1376						reg = <0xa>;
1377					};
1378
1379					max15303@b {
1380						compatible = "maxim,max15303";
1381						reg = <0xb>;
1382					};
1383
1384					max15303@10 {
1385						compatible = "maxim,max15303";
1386						reg = <0x10>;
1387					};
1388
1389					max15301@13 {
1390						compatible = "maxim,max15301";
1391						reg = <0x13>;
1392					};
1393
1394					max15303@14 {
1395						compatible = "maxim,max15303";
1396						reg = <0x14>;
1397					};
1398
1399					max15303@15 {
1400						compatible = "maxim,max15303";
1401						reg = <0x15>;
1402					};
1403
1404					max15303@16 {
1405						compatible = "maxim,max15303";
1406						reg = <0x16>;
1407					};
1408
1409					max15303@17 {
1410						compatible = "maxim,max15303";
1411						reg = <0x17>;
1412					};
1413
1414					max15301@18 {
1415						compatible = "maxim,max15301";
1416						reg = <0x18>;
1417					};
1418
1419					max15303@1a {
1420						compatible = "maxim,max15303";
1421						reg = <0x1a>;
1422					};
1423
1424					max15303@1d {
1425						compatible = "maxim,max15303";
1426						reg = <0x1d>;
1427					};
1428
1429					max20751@72 {
1430						compatible = "maxim,max20751";
1431						reg = <0x72>;
1432					};
1433
1434					max20751@73 {
1435						compatible = "maxim,max20751";
1436						reg = <0x73>;
1437					};
1438
1439					max15303@1b {
1440						compatible = "maxim,max15303";
1441						reg = <0x1b>;
1442					};
1443				};
1444			};
1445		};
1446
1447		i2c@ff030000 {
1448			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
1449			status = "okay";
1450			interrupt-parent = <0x4>;
1451			interrupts = <0x0 0x12 0x4>;
1452			reg = <0x0 0xff030000 0x0 0x1000>;
1453			#address-cells = <0x1>;
1454			#size-cells = <0x0>;
1455			power-domains = <0x1b>;
1456			clocks = <0x3 0x3e>;
1457			clock-frequency = <0x61a80>;
1458			pinctrl-names = "default", "gpio";
1459			pinctrl-0 = <0x1c>;
1460			pinctrl-1 = <0x1d>;
1461			scl-gpios = <0x1a 0x10 0x0>;
1462			sda-gpios = <0x1a 0x11 0x0>;
1463
1464			i2c-mux@74 {
1465				compatible = "nxp,pca9548";
1466				#address-cells = <0x1>;
1467				#size-cells = <0x0>;
1468				reg = <0x74>;
1469
1470				i2c@0 {
1471					#address-cells = <0x1>;
1472					#size-cells = <0x0>;
1473					reg = <0x0>;
1474
1475					eeprom@54 {
1476						compatible = "atmel,24c08";
1477						reg = <0x54>;
1478						#address-cells = <0x1>;
1479						#size-cells = <0x1>;
1480
1481						board-sn@0 {
1482							reg = <0x0 0x14>;
1483						};
1484
1485						eth-mac@20 {
1486							reg = <0x20 0x6>;
1487						};
1488
1489						board-name@d0 {
1490							reg = <0xd0 0x6>;
1491						};
1492
1493						board-revision@e0 {
1494							reg = <0xe0 0x3>;
1495						};
1496					};
1497				};
1498
1499				i2c@1 {
1500					#address-cells = <0x1>;
1501					#size-cells = <0x0>;
1502					reg = <0x1>;
1503
1504					clock-generator@36 {
1505						compatible = "silabs,si5341";
1506						reg = <0x36>;
1507					};
1508				};
1509
1510				i2c@2 {
1511					#address-cells = <0x1>;
1512					#size-cells = <0x0>;
1513					reg = <0x2>;
1514
1515					clock-generator@5d {
1516						#clock-cells = <0x0>;
1517						compatible = "silabs,si570";
1518						reg = <0x5d>;
1519						temperature-stability = <0x32>;
1520						factory-fout = <0x11e1a300>;
1521						clock-frequency = <0x11e1a300>;
1522						clock-output-names = "si570_user";
1523					};
1524				};
1525
1526				i2c@3 {
1527					#address-cells = <0x1>;
1528					#size-cells = <0x0>;
1529					reg = <0x3>;
1530
1531					clock-generator@5d {
1532						#clock-cells = <0x0>;
1533						compatible = "silabs,si570";
1534						reg = <0x5d>;
1535						temperature-stability = <0x32>;
1536						factory-fout = <0x9502f90>;
1537						clock-frequency = <0x8d9ee20>;
1538						clock-output-names = "si570_mgt";
1539					};
1540				};
1541
1542				i2c@4 {
1543					#address-cells = <0x1>;
1544					#size-cells = <0x0>;
1545					reg = <0x4>;
1546
1547					clock-generator@69 {
1548						compatible = "silabs,si5328";
1549						reg = <0x69>;
1550					};
1551				};
1552			};
1553
1554			i2c-mux@75 {
1555				compatible = "nxp,pca9548";
1556				#address-cells = <0x1>;
1557				#size-cells = <0x0>;
1558				reg = <0x75>;
1559
1560				i2c@0 {
1561					#address-cells = <0x1>;
1562					#size-cells = <0x0>;
1563					reg = <0x0>;
1564
1565					ad7291@2f {
1566						compatible = "adi,ad7291";
1567						reg = <0x2f>;
1568					};
1569
1570					eeprom@50 {
1571						compatible = "at24,24c02";
1572						reg = <0x50>;
1573					};
1574				};
1575
1576				i2c@1 {
1577					#address-cells = <0x1>;
1578					#size-cells = <0x0>;
1579					reg = <0x1>;
1580				};
1581
1582				i2c@2 {
1583					#address-cells = <0x1>;
1584					#size-cells = <0x0>;
1585					reg = <0x2>;
1586				};
1587
1588				i2c@3 {
1589					#address-cells = <0x1>;
1590					#size-cells = <0x0>;
1591					reg = <0x3>;
1592				};
1593
1594				i2c@4 {
1595					#address-cells = <0x1>;
1596					#size-cells = <0x0>;
1597					reg = <0x4>;
1598				};
1599
1600				i2c@5 {
1601					#address-cells = <0x1>;
1602					#size-cells = <0x0>;
1603					reg = <0x5>;
1604				};
1605
1606				i2c@6 {
1607					#address-cells = <0x1>;
1608					#size-cells = <0x0>;
1609					reg = <0x6>;
1610				};
1611
1612				i2c@7 {
1613					#address-cells = <0x1>;
1614					#size-cells = <0x0>;
1615					reg = <0x7>;
1616				};
1617			};
1618		};
1619
1620		memory-controller@ff960000 {
1621			compatible = "xlnx,zynqmp-ocmc-1.0";
1622			reg = <0x0 0xff960000 0x0 0x1000>;
1623			interrupt-parent = <0x4>;
1624			interrupts = <0x0 0xa 0x4>;
1625		};
1626
1627		perf-monitor@ffa00000 {
1628			compatible = "xlnx,axi-perf-monitor";
1629			reg = <0x0 0xffa00000 0x0 0x10000>;
1630			interrupts = <0x0 0x19 0x4>;
1631			interrupt-parent = <0x4>;
1632			xlnx,enable-profile = <0x0>;
1633			xlnx,enable-trace = <0x0>;
1634			xlnx,num-monitor-slots = <0x4>;
1635			xlnx,enable-event-count = <0x1>;
1636			xlnx,enable-event-log = <0x1>;
1637			xlnx,have-sampled-metric-cnt = <0x1>;
1638			xlnx,num-of-counters = <0x8>;
1639			xlnx,metric-count-width = <0x20>;
1640			xlnx,metrics-sample-count-width = <0x20>;
1641			xlnx,global-count-width = <0x20>;
1642			xlnx,metric-count-scale = <0x1>;
1643			clocks = <0x3 0x1f>;
1644		};
1645
1646		pcie@fd0e0000 {
1647			compatible = "xlnx,nwl-pcie-2.11";
1648			status = "okay";
1649			#address-cells = <0x3>;
1650			#size-cells = <0x2>;
1651			#interrupt-cells = <0x1>;
1652			msi-controller;
1653			device_type = "pci";
1654			interrupt-parent = <0x4>;
1655			interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
1656			interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
1657			msi-parent = <0x1e>;
1658			reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
1659			reg-names = "breg", "pcireg", "cfg";
1660			ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
1661			bus-range = <0x0 0xff>;
1662			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
1663			interrupt-map = <0x0 0x0 0x0 0x1 0x1f 0x1 0x0 0x0 0x0 0x2 0x1f 0x2 0x0 0x0 0x0 0x3 0x1f 0x3 0x0 0x0 0x0 0x4 0x1f 0x4>;
1664			power-domains = <0x20>;
1665			clocks = <0x3 0x17>;
1666			linux,phandle = <0x1e>;
1667			phandle = <0x1e>;
1668
1669			legacy-interrupt-controller {
1670				interrupt-controller;
1671				#address-cells = <0x0>;
1672				#interrupt-cells = <0x1>;
1673				linux,phandle = <0x1f>;
1674				phandle = <0x1f>;
1675			};
1676		};
1677
1678		spi@ff0f0000 {
1679			u-boot,dm-pre-reloc;
1680			compatible = "xlnx,zynqmp-qspi-1.0";
1681			status = "okay";
1682			clock-names = "ref_clk", "pclk";
1683			interrupts = <0x0 0xf 0x4>;
1684			interrupt-parent = <0x4>;
1685			num-cs = <0x1>;
1686			reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>;
1687			#address-cells = <0x1>;
1688			#size-cells = <0x0>;
1689			#stream-id-cells = <0x1>;
1690			iommus = <0xa 0x873>;
1691			power-domains = <0x21>;
1692			clocks = <0x3 0x35 0x3 0x1f>;
1693			is-dual = <0x1>;
1694
1695			flash@0 {
1696				compatible = "m25p80", "spi-flash";
1697				#address-cells = <0x1>;
1698				#size-cells = <0x1>;
1699				reg = <0x0>;
1700				spi-tx-bus-width = <0x1>;
1701				spi-rx-bus-width = <0x4>;
1702				spi-max-frequency = <0x66ff300>;
1703
1704				partition@qspi-fsbl-uboot {
1705					label = "qspi-fsbl-uboot";
1706					reg = <0x0 0x100000>;
1707				};
1708
1709				partition@qspi-linux {
1710					label = "qspi-linux";
1711					reg = <0x100000 0x500000>;
1712				};
1713
1714				partition@qspi-device-tree {
1715					label = "qspi-device-tree";
1716					reg = <0x600000 0x20000>;
1717				};
1718
1719				partition@qspi-rootfs {
1720					label = "qspi-rootfs";
1721					reg = <0x620000 0x5e0000>;
1722				};
1723			};
1724		};
1725
1726		rtc@ffa60000 {
1727			compatible = "xlnx,zynqmp-rtc";
1728			status = "okay";
1729			reg = <0x0 0xffa60000 0x0 0x100>;
1730			interrupt-parent = <0x4>;
1731			interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>;
1732			interrupt-names = "alarm", "sec";
1733			calibration = <0x8000>;
1734		};
1735
1736		zynqmp_phy@fd400000 {
1737			compatible = "xlnx,zynqmp-psgtr-v1.1";
1738			status = "okay";
1739			reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
1740			reg-names = "serdes", "siou";
1741			nvmem-cells = <0x22>;
1742			nvmem-cell-names = "soc_revision";
1743			resets = <0x23 0x10 0x23 0x3b 0x23 0x3c 0x23 0x3d 0x23 0x3e 0x23 0x3f 0x23 0x40 0x23 0x3 0x23 0x1d 0x23 0x1e 0x23 0x1f 0x23 0x20>;
1744			reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";
1745
1746			lane0 {
1747				#phy-cells = <0x4>;
1748			};
1749
1750			lane1 {
1751				#phy-cells = <0x4>;
1752				linux,phandle = <0x3a>;
1753				phandle = <0x3a>;
1754			};
1755
1756			lane2 {
1757				#phy-cells = <0x4>;
1758				linux,phandle = <0x36>;
1759				phandle = <0x36>;
1760			};
1761
1762			lane3 {
1763				#phy-cells = <0x4>;
1764				linux,phandle = <0x25>;
1765				phandle = <0x25>;
1766			};
1767		};
1768
1769		ahci@fd0c0000 {
1770			compatible = "ceva,ahci-1v84";
1771			status = "okay";
1772			reg = <0x0 0xfd0c0000 0x0 0x2000>;
1773			interrupt-parent = <0x4>;
1774			interrupts = <0x0 0x85 0x4>;
1775			power-domains = <0x24>;
1776			#stream-id-cells = <0x4>;
1777			clocks = <0x3 0x16>;
1778			ceva,p0-cominit-params = <0x18401828>;
1779			ceva,p0-comwake-params = <0x614080e>;
1780			ceva,p0-burst-params = <0x13084a06>;
1781			ceva,p0-retry-params = <0x96a43ffc>;
1782			ceva,p1-cominit-params = <0x18401828>;
1783			ceva,p1-comwake-params = <0x614080e>;
1784			ceva,p1-burst-params = <0x13084a06>;
1785			ceva,p1-retry-params = <0x96a43ffc>;
1786			phy-names = "sata-phy";
1787			phys = <0x25 0x1 0x1 0x1 0x7735940>;
1788		};
1789
1790		mmc@ff160000 {
1791			u-boot,dm-pre-reloc;
1792			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
1793			status = "disabled";
1794			interrupt-parent = <0x4>;
1795			interrupts = <0x0 0x30 0x4>;
1796			reg = <0x0 0xff160000 0x0 0x1000>;
1797			clock-names = "clk_xin", "clk_ahb";
1798			xlnx,device_id = <0x0>;
1799			#stream-id-cells = <0x1>;
1800			iommus = <0xa 0x870>;
1801			power-domains = <0x26>;
1802			nvmem-cells = <0x22>;
1803			nvmem-cell-names = "soc_revision";
1804			broken-mmc-highspeed;
1805			clocks = <0x3 0x36 0x3 0x1f>;
1806		};
1807
1808		mmc@ff170000 {
1809			u-boot,dm-pre-reloc;
1810			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
1811			status = "okay";
1812			interrupt-parent = <0x4>;
1813			interrupts = <0x0 0x31 0x4>;
1814			reg = <0x0 0xff170000 0x0 0x1000>;
1815			clock-names = "clk_xin", "clk_ahb";
1816			xlnx,device_id = <0x1>;
1817			#stream-id-cells = <0x1>;
1818			iommus = <0xa 0x871>;
1819			power-domains = <0x27>;
1820			nvmem-cells = <0x22>;
1821			nvmem-cell-names = "soc_revision";
1822			broken-mmc-highspeed;
1823			clocks = <0x3 0x37 0x3 0x1f>;
1824			pinctrl-names = "default";
1825			pinctrl-0 = <0x28>;
1826			no-1-8-v;
1827			xlnx,mio_bank = <0x1>;
1828		};
1829
1830		spi@ff040000 {
1831			compatible = "cdns,spi-r1p6";
1832			status = "okay";
1833			interrupt-parent = <0x4>;
1834			interrupts = <0x0 0x13 0x4>;
1835			reg = <0x0 0xff040000 0x0 0x1000>;
1836			clock-names = "ref_clk", "pclk";
1837			#address-cells = <0x1>;
1838			#size-cells = <0x0>;
1839			power-domains = <0x29>;
1840			clocks = <0x3 0x3a 0x3 0x1f>;
1841
1842			ad9361-phy@0 {
1843				compatible = "adi,ad9361";
1844				reg = <0x0>;
1845				spi-cpha;
1846				spi-max-frequency = <0x989680>;
1847				clocks = <0x2a 0x0>;
1848				clock-names = "ad9361_ext_refclk";
1849				clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
1850				#clock-cells = <0x1>;
1851				adi,digital-interface-tune-skip-mode = <0x0>;
1852				adi,pp-tx-swap-enable;
1853				adi,pp-rx-swap-enable;
1854				adi,rx-frame-pulse-mode-enable;
1855				adi,lvds-mode-enable;
1856				adi,lvds-bias-mV = <0x96>;
1857				adi,lvds-rx-onchip-termination-enable;
1858				adi,rx-data-delay = <0x4>;
1859				adi,tx-fb-clock-delay = <0x7>;
1860				adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>;
1861				adi,2rx-2tx-mode-enable;
1862				adi,frequency-division-duplex-mode-enable;
1863				adi,rx-rf-port-input-select = <0x0>;
1864				adi,tx-rf-port-input-select = <0x0>;
1865				adi,tx-attenuation-mdB = <0x2710>;
1866				adi,tx-lo-powerdown-managed-enable;
1867				adi,rf-rx-bandwidth-hz = <0x112a880>;
1868				adi,rf-tx-bandwidth-hz = <0x112a880>;
1869				adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>;
1870				adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>;
1871				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
1872				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
1873				adi,gc-rx1-mode = <0x2>;
1874				adi,gc-rx2-mode = <0x2>;
1875				adi,gc-adc-ovr-sample-size = <0x4>;
1876				adi,gc-adc-small-overload-thresh = <0x2f>;
1877				adi,gc-adc-large-overload-thresh = <0x3a>;
1878				adi,gc-lmt-overload-high-thresh = <0x320>;
1879				adi,gc-lmt-overload-low-thresh = <0x2c0>;
1880				adi,gc-dec-pow-measurement-duration = <0x2000>;
1881				adi,gc-low-power-thresh = <0x18>;
1882				adi,mgc-inc-gain-step = <0x2>;
1883				adi,mgc-dec-gain-step = <0x2>;
1884				adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>;
1885				adi,agc-attack-delay-extra-margin-us = <0x1>;
1886				adi,agc-outer-thresh-high = <0x5>;
1887				adi,agc-outer-thresh-high-dec-steps = <0x2>;
1888				adi,agc-inner-thresh-high = <0xa>;
1889				adi,agc-inner-thresh-high-dec-steps = <0x1>;
1890				adi,agc-inner-thresh-low = <0xc>;
1891				adi,agc-inner-thresh-low-inc-steps = <0x1>;
1892				adi,agc-outer-thresh-low = <0x12>;
1893				adi,agc-outer-thresh-low-inc-steps = <0x2>;
1894				adi,agc-adc-small-overload-exceed-counter = <0xa>;
1895				adi,agc-adc-large-overload-exceed-counter = <0xa>;
1896				adi,agc-adc-large-overload-inc-steps = <0x2>;
1897				adi,agc-lmt-overload-large-exceed-counter = <0xa>;
1898				adi,agc-lmt-overload-small-exceed-counter = <0xa>;
1899				adi,agc-lmt-overload-large-inc-steps = <0x2>;
1900				adi,agc-gain-update-interval-us = <0x3e8>;
1901				adi,fagc-dec-pow-measurement-duration = <0x40>;
1902				adi,fagc-lp-thresh-increment-steps = <0x1>;
1903				adi,fagc-lp-thresh-increment-time = <0x5>;
1904				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>;
1905				adi,fagc-final-overrange-count = <0x3>;
1906				adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>;
1907				adi,fagc-lmt-final-settling-steps = <0x1>;
1908				adi,fagc-lock-level = <0xa>;
1909				adi,fagc-lock-level-gain-increase-upper-limit = <0x5>;
1910				adi,fagc-lock-level-lmt-gain-increase-enable;
1911				adi,fagc-lpf-final-settling-steps = <0x1>;
1912				adi,fagc-optimized-gain-offset = <0x5>;
1913				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
1914				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
1915				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>;
1916				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
1917				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>;
1918				adi,fagc-rst-gla-large-adc-overload-enable;
1919				adi,fagc-rst-gla-large-lmt-overload-enable;
1920				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>;
1921				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
1922				adi,fagc-state-wait-time-ns = <0x104>;
1923				adi,fagc-use-last-lock-level-for-set-gain-enable;
1924				adi,rssi-restart-mode = <0x3>;
1925				adi,rssi-delay = <0x1>;
1926				adi,rssi-wait = <0x1>;
1927				adi,rssi-duration = <0x3e8>;
1928				adi,ctrl-outs-index = <0x0>;
1929				adi,ctrl-outs-enable-mask = <0xff>;
1930				adi,temp-sense-measurement-interval-ms = <0x3e8>;
1931				adi,temp-sense-offset-signed = <0xce>;
1932				adi,temp-sense-periodic-measurement-enable;
1933				adi,aux-dac-manual-mode-enable;
1934				adi,aux-dac1-default-value-mV = <0x0>;
1935				adi,aux-dac1-rx-delay-us = <0x0>;
1936				adi,aux-dac1-tx-delay-us = <0x0>;
1937				adi,aux-dac2-default-value-mV = <0x0>;
1938				adi,aux-dac2-rx-delay-us = <0x0>;
1939				adi,aux-dac2-tx-delay-us = <0x0>;
1940				en_agc-gpios = <0x1a 0x7a 0x0>;
1941				sync-gpios = <0x1a 0x7b 0x0>;
1942				reset-gpios = <0x1a 0x7c 0x0>;
1943				enable-gpios = <0x1a 0x7d 0x0>;
1944				txnrx-gpios = <0x1a 0x7e 0x0>;
1945				linux,phandle = <0x45>;
1946				phandle = <0x45>;
1947			};
1948		};
1949
1950		spi@ff050000 {
1951			compatible = "cdns,spi-r1p6";
1952			status = "disabled";
1953			interrupt-parent = <0x4>;
1954			interrupts = <0x0 0x14 0x4>;
1955			reg = <0x0 0xff050000 0x0 0x1000>;
1956			clock-names = "ref_clk", "pclk";
1957			#address-cells = <0x1>;
1958			#size-cells = <0x0>;
1959			power-domains = <0x2b>;
1960			clocks = <0x3 0x3b 0x3 0x1f>;
1961		};
1962
1963		timer@ff110000 {
1964			compatible = "cdns,ttc";
1965			status = "disabled";
1966			interrupt-parent = <0x4>;
1967			interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
1968			reg = <0x0 0xff110000 0x0 0x1000>;
1969			timer-width = <0x20>;
1970			power-domains = <0x2c>;
1971			clocks = <0x3 0x1f>;
1972		};
1973
1974		timer@ff120000 {
1975			compatible = "cdns,ttc";
1976			status = "disabled";
1977			interrupt-parent = <0x4>;
1978			interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
1979			reg = <0x0 0xff120000 0x0 0x1000>;
1980			timer-width = <0x20>;
1981			power-domains = <0x2d>;
1982			clocks = <0x3 0x1f>;
1983		};
1984
1985		timer@ff130000 {
1986			compatible = "cdns,ttc";
1987			status = "disabled";
1988			interrupt-parent = <0x4>;
1989			interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
1990			reg = <0x0 0xff130000 0x0 0x1000>;
1991			timer-width = <0x20>;
1992			power-domains = <0x2e>;
1993			clocks = <0x3 0x1f>;
1994		};
1995
1996		timer@ff140000 {
1997			compatible = "cdns,ttc";
1998			status = "disabled";
1999			interrupt-parent = <0x4>;
2000			interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
2001			reg = <0x0 0xff140000 0x0 0x1000>;
2002			timer-width = <0x20>;
2003			power-domains = <0x2f>;
2004			clocks = <0x3 0x1f>;
2005		};
2006
2007		serial@ff000000 {
2008			u-boot,dm-pre-reloc;
2009			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
2010			status = "okay";
2011			interrupt-parent = <0x4>;
2012			interrupts = <0x0 0x15 0x4>;
2013			reg = <0x0 0xff000000 0x0 0x1000>;
2014			clock-names = "uart_clk", "pclk";
2015			power-domains = <0x30>;
2016			clocks = <0x3 0x38 0x3 0x1f>;
2017			pinctrl-names = "default";
2018			pinctrl-0 = <0x31>;
2019		};
2020
2021		serial@ff010000 {
2022			u-boot,dm-pre-reloc;
2023			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
2024			status = "okay";
2025			interrupt-parent = <0x4>;
2026			interrupts = <0x0 0x16 0x4>;
2027			reg = <0x0 0xff010000 0x0 0x1000>;
2028			clock-names = "uart_clk", "pclk";
2029			power-domains = <0x32>;
2030			clocks = <0x3 0x39 0x3 0x1f>;
2031			pinctrl-names = "default";
2032			pinctrl-0 = <0x33>;
2033		};
2034
2035		usb0@ff9d0000 {
2036			#address-cells = <0x2>;
2037			#size-cells = <0x2>;
2038			status = "okay";
2039			compatible = "xlnx,zynqmp-dwc3";
2040			reg = <0x0 0xff9d0000 0x0 0x100>;
2041			clock-names = "bus_clk", "ref_clk";
2042			power-domains = <0x34>;
2043			ranges;
2044			nvmem-cells = <0x22>;
2045			nvmem-cell-names = "soc_revision";
2046			clocks = <0x3 0x20 0x3 0x22>;
2047			pinctrl-names = "default";
2048			pinctrl-0 = <0x35>;
2049
2050			dwc3@fe200000 {
2051				compatible = "snps,dwc3";
2052				status = "okay";
2053				reg = <0x0 0xfe200000 0x0 0x40000>;
2054				interrupt-parent = <0x4>;
2055				interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>;
2056				#stream-id-cells = <0x1>;
2057				iommus = <0xa 0x860>;
2058				snps,quirk-frame-length-adjustment = <0x20>;
2059				snps,refclk_fladj;
2060				snps,enable_guctl1_resume_quirk;
2061				snps,enable_guctl1_ipd_quirk;
2062				snps,xhci-stream-quirk;
2063				dr_mode = "otg";
2064				snps,usb3_lpm_capable;
2065				phy-names = "usb3-phy";
2066				phys = <0x36 0x4 0x0 0x2 0x18cba80>;
2067				maximum-speed = "super-speed";
2068			};
2069		};
2070
2071		usb1@ff9e0000 {
2072			#address-cells = <0x2>;
2073			#size-cells = <0x2>;
2074			status = "disabled";
2075			compatible = "xlnx,zynqmp-dwc3";
2076			reg = <0x0 0xff9e0000 0x0 0x100>;
2077			clock-names = "bus_clk", "ref_clk";
2078			power-domains = <0x37>;
2079			ranges;
2080			nvmem-cells = <0x22>;
2081			nvmem-cell-names = "soc_revision";
2082			clocks = <0x3 0x21 0x3 0x22>;
2083
2084			dwc3@fe300000 {
2085				compatible = "snps,dwc3";
2086				status = "disabled";
2087				reg = <0x0 0xfe300000 0x0 0x40000>;
2088				interrupt-parent = <0x4>;
2089				interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>;
2090				#stream-id-cells = <0x1>;
2091				iommus = <0xa 0x861>;
2092				snps,quirk-frame-length-adjustment = <0x20>;
2093				snps,refclk_fladj;
2094				snps,enable_guctl1_resume_quirk;
2095				snps,enable_guctl1_ipd_quirk;
2096				snps,xhci-stream-quirk;
2097			};
2098		};
2099
2100		watchdog@fd4d0000 {
2101			compatible = "cdns,wdt-r1p2";
2102			status = "okay";
2103			interrupt-parent = <0x4>;
2104			interrupts = <0x0 0x71 0x1>;
2105			reg = <0x0 0xfd4d0000 0x0 0x1000>;
2106			timeout-sec = <0x3c>;
2107			reset-on-timeout;
2108			clocks = <0x3 0x4b>;
2109		};
2110
2111		watchdog@ff150000 {
2112			compatible = "cdns,wdt-r1p2";
2113			status = "disabled";
2114			interrupt-parent = <0x4>;
2115			interrupts = <0x0 0x34 0x1>;
2116			reg = <0x0 0xff150000 0x0 0x1000>;
2117			timeout-sec = <0xa>;
2118			clocks = <0x3 0x4b>;
2119		};
2120
2121		ams@ffa50000 {
2122			compatible = "xlnx,zynqmp-ams";
2123			status = "okay";
2124			interrupt-parent = <0x4>;
2125			interrupts = <0x0 0x38 0x4>;
2126			interrupt-names = "ams-irq";
2127			reg = <0x0 0xffa50000 0x0 0x800>;
2128			reg-names = "ams-base";
2129			#address-cells = <0x2>;
2130			#size-cells = <0x2>;
2131			#io-channel-cells = <0x1>;
2132			ranges;
2133			clocks = <0x3 0x46>;
2134
2135			ams_ps@ffa50800 {
2136				compatible = "xlnx,zynqmp-ams-ps";
2137				status = "okay";
2138				reg = <0x0 0xffa50800 0x0 0x400>;
2139			};
2140
2141			ams_pl@ffa50c00 {
2142				compatible = "xlnx,zynqmp-ams-pl";
2143				status = "okay";
2144				reg = <0x0 0xffa50c00 0x0 0x400>;
2145			};
2146		};
2147
2148		dma@fd4c0000 {
2149			compatible = "xlnx,dpdma";
2150			status = "okay";
2151			reg = <0x0 0xfd4c0000 0x0 0x1000>;
2152			interrupts = <0x0 0x7a 0x4>;
2153			interrupt-parent = <0x4>;
2154			clock-names = "axi_clk";
2155			power-domains = <0x38>;
2156			dma-channels = <0x6>;
2157			#dma-cells = <0x1>;
2158			clocks = <0x3 0x14>;
2159			linux,phandle = <0x3b>;
2160			phandle = <0x3b>;
2161
2162			dma-video0channel {
2163				compatible = "xlnx,video0";
2164			};
2165
2166			dma-video1channel {
2167				compatible = "xlnx,video1";
2168			};
2169
2170			dma-video2channel {
2171				compatible = "xlnx,video2";
2172			};
2173
2174			dma-graphicschannel {
2175				compatible = "xlnx,graphics";
2176			};
2177
2178			dma-audio0channel {
2179				compatible = "xlnx,audio0";
2180			};
2181
2182			dma-audio1channel {
2183				compatible = "xlnx,audio1";
2184			};
2185		};
2186
2187		zynqmp-display@fd4a0000 {
2188			compatible = "xlnx,zynqmp-dpsub-1.7";
2189			status = "okay";
2190			reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>;
2191			reg-names = "dp", "blend", "av_buf", "aud";
2192			interrupts = <0x0 0x77 0x4>;
2193			interrupt-parent = <0x4>;
2194			clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
2195			power-domains = <0x38>;
2196			clocks = <0x39 0x3 0x11 0x3 0x10>;
2197			phy-names = "dp-phy0";
2198			phys = <0x3a 0x5 0x0 0x3 0x19bfcc0>;
2199
2200			vid-layer {
2201				dma-names = "vid0", "vid1", "vid2";
2202				dmas = <0x3b 0x0 0x3b 0x1 0x3b 0x2>;
2203			};
2204
2205			gfx-layer {
2206				dma-names = "gfx0";
2207				dmas = <0x3b 0x3>;
2208			};
2209
2210			i2c-bus {
2211			};
2212
2213			zynqmp_dp_snd_codec0 {
2214				compatible = "xlnx,dp-snd-codec";
2215				clock-names = "aud_clk";
2216				clocks = <0x3 0x11>;
2217				status = "okay";
2218				linux,phandle = <0x3e>;
2219				phandle = <0x3e>;
2220			};
2221
2222			zynqmp_dp_snd_pcm0 {
2223				compatible = "xlnx,dp-snd-pcm";
2224				dmas = <0x3b 0x4>;
2225				dma-names = "tx";
2226				status = "okay";
2227				linux,phandle = <0x3c>;
2228				phandle = <0x3c>;
2229			};
2230
2231			zynqmp_dp_snd_pcm1 {
2232				compatible = "xlnx,dp-snd-pcm";
2233				dmas = <0x3b 0x5>;
2234				dma-names = "tx";
2235				status = "okay";
2236				linux,phandle = <0x3d>;
2237				phandle = <0x3d>;
2238			};
2239
2240			zynqmp_dp_snd_card {
2241				compatible = "xlnx,dp-snd-card";
2242				xlnx,dp-snd-pcm = <0x3c 0x3d>;
2243				xlnx,dp-snd-codec = <0x3e>;
2244				status = "okay";
2245			};
2246		};
2247	};
2248
2249	fclk0 {
2250		status = "disabled";
2251		compatible = "xlnx,fclk";
2252		clocks = <0x3 0x47>;
2253	};
2254
2255	fclk1 {
2256		status = "disabled";
2257		compatible = "xlnx,fclk";
2258		clocks = <0x3 0x48>;
2259	};
2260
2261	fclk2 {
2262		status = "disabled";
2263		compatible = "xlnx,fclk";
2264		clocks = <0x3 0x49>;
2265	};
2266
2267	fclk3 {
2268		status = "disabled";
2269		compatible = "xlnx,fclk";
2270		clocks = <0x3 0x4a>;
2271	};
2272
2273	pss_ref_clk {
2274		u-boot,dm-pre-reloc;
2275		compatible = "fixed-clock";
2276		#clock-cells = <0x0>;
2277		clock-frequency = <0x1fca055>;
2278		linux,phandle = <0x3f>;
2279		phandle = <0x3f>;
2280	};
2281
2282	video_clk {
2283		u-boot,dm-pre-reloc;
2284		compatible = "fixed-clock";
2285		#clock-cells = <0x0>;
2286		clock-frequency = <0x19bfcc0>;
2287		linux,phandle = <0x40>;
2288		phandle = <0x40>;
2289	};
2290
2291	pss_alt_ref_clk {
2292		u-boot,dm-pre-reloc;
2293		compatible = "fixed-clock";
2294		#clock-cells = <0x0>;
2295		clock-frequency = <0x0>;
2296		linux,phandle = <0x41>;
2297		phandle = <0x41>;
2298	};
2299
2300	gt_crx_ref_clk {
2301		u-boot,dm-pre-reloc;
2302		compatible = "fixed-clock";
2303		#clock-cells = <0x0>;
2304		clock-frequency = <0x66ff300>;
2305		linux,phandle = <0x43>;
2306		phandle = <0x43>;
2307	};
2308
2309	aux_ref_clk {
2310		u-boot,dm-pre-reloc;
2311		compatible = "fixed-clock";
2312		#clock-cells = <0x0>;
2313		clock-frequency = <0x19bfcc0>;
2314		linux,phandle = <0x42>;
2315		phandle = <0x42>;
2316	};
2317
2318	clk {
2319		u-boot,dm-pre-reloc;
2320		#clock-cells = <0x1>;
2321		compatible = "xlnx,zynqmp-clk";
2322		clocks = <0x3f 0x40 0x41 0x42 0x43>;
2323		clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
2324		linux,phandle = <0x3>;
2325		phandle = <0x3>;
2326	};
2327
2328	dp_aclk {
2329		compatible = "fixed-clock";
2330		#clock-cells = <0x0>;
2331		clock-frequency = <0x5f5e100>;
2332		clock-accuracy = <0x64>;
2333		linux,phandle = <0x39>;
2334		phandle = <0x39>;
2335	};
2336
2337	aliases {
2338		ethernet0 = "/amba/ethernet@ff0e0000";
2339		gpio0 = "/amba/gpio@ff0a0000";
2340		i2c0 = "/amba/i2c@ff020000";
2341		i2c1 = "/amba/i2c@ff030000";
2342		mmc0 = "/amba/mmc@ff170000";
2343		rtc0 = "/amba/rtc@ffa60000";
2344		serial0 = "/amba/serial@ff000000";
2345		serial1 = "/amba/serial@ff010000";
2346		serial2 = "/dcc";
2347		spi0 = "/amba/spi@ff0f0000";
2348		usb0 = "/amba/usb0@ff9d0000";
2349	};
2350
2351	chosen {
2352		bootargs = "earlycon";
2353		stdout-path = "serial0:115200n8";
2354	};
2355
2356	memory@0 {
2357		device_type = "memory";
2358		reg = <0x0 0x0 0x0 0x80000000 0x8 0x0 0x0 0x80000000>;
2359	};
2360
2361	gpio-keys {
2362		compatible = "gpio-keys";
2363		autorepeat;
2364
2365		sw19 {
2366			label = "sw19";
2367			gpios = <0x1a 0x16 0x0>;
2368			linux,code = <0x6c>;
2369			gpio-key,wakeup;
2370			autorepeat;
2371		};
2372	};
2373
2374	leds {
2375		compatible = "gpio-leds";
2376
2377		heartbeat_led {
2378			label = "heartbeat";
2379			gpios = <0x1a 0x17 0x0>;
2380			linux,default-trigger = "heartbeat";
2381		};
2382	};
2383
2384	fpga-axi@0 {
2385		interrupt-parent = <0x4>;
2386		compatible = "simple-bus";
2387		#address-cells = <0x1>;
2388		#size-cells = <0x1>;
2389		ranges = <0x0 0x0 0x0 0xffffffff>;
2390
2391		// dma@9c400000 {
2392		// 	compatible = "adi,axi-dmac-1.00.a";
2393		// 	reg = <0x9c400000 0x10000>;
2394		// 	#dma-cells = <0x1>;
2395		// 	#clock-cells = <0x0>;
2396		// 	interrupts = <0x0 0x6d 0x0>;
2397		// 	clocks = <0x3 0x47>;
2398		// 	linux,phandle = <0x44>;
2399		// 	phandle = <0x44>;
2400
2401		// 	adi,channels {
2402		// 		#size-cells = <0x0>;
2403		// 		#address-cells = <0x1>;
2404
2405		// 		dma-channel@0 {
2406		// 			reg = <0x0>;
2407		// 			adi,source-bus-width = <0x40>;
2408		// 			adi,source-bus-type = <0x2>;
2409		// 			adi,destination-bus-width = <0x40>;
2410		// 			adi,destination-bus-type = <0x0>;
2411		// 		};
2412		// 	};
2413		// };
2414
2415		// dma@9c420000 {
2416		// 	compatible = "adi,axi-dmac-1.00.a";
2417		// 	reg = <0x9c420000 0x10000>;
2418		// 	#dma-cells = <0x1>;
2419		// 	#clock-cells = <0x0>;
2420		// 	interrupts = <0x0 0x6c 0x0>;
2421		// 	clocks = <0x3 0x47>;
2422		// 	linux,phandle = <0x46>;
2423		// 	phandle = <0x46>;
2424
2425		// 	adi,channels {
2426		// 		#size-cells = <0x0>;
2427		// 		#address-cells = <0x1>;
2428
2429		// 		dma-channel@0 {
2430		// 			reg = <0x0>;
2431		// 			adi,source-bus-width = <0x40>;
2432		// 			adi,source-bus-type = <0x0>;
2433		// 			adi,destination-bus-width = <0x40>;
2434		// 			adi,destination-bus-type = <0x2>;
2435		// 		};
2436		// 	};
2437		// };
2438
2439		sdr: sdr {
2440			compatible ="sdr,sdr";
2441			dmas = <&rx_dma 1
2442					&tx_dma 0>;
2443			dma-names = "rx_dma_s2mm", "tx_dma_mm2s";
2444			interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt_useless", "tx_itrpt";
2445			interrupts = <0 89 1 0 90 1 0 93 1 0 94 1>;
2446		} ;
2447
2448		axidmatest_1: axidmatest@1 {
2449			compatible ="xlnx,axi-dma-test-1.00.a";
2450			dmas = <&rx_dma 0
2451				    &rx_dma 1>;
2452			dma-names = "axidma0", "axidma1";
2453		} ;
2454
2455		tx_dma: dma@a0000000 {
2456			#dma-cells = <1>;
2457			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
2458			clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>, <0x3 0x49>;
2459			compatible = "xlnx,axi-dma-1.00.a";
2460			interrupt-names = "mm2s_introut", "s2mm_introut";
2461			interrupts = <0 95 4 0 96 4>;
2462			reg = <0xA0000000 0x1000>;
2463			xlnx,addrwidth = <0x28>;
2464			xlnx,include-sg ;
2465			xlnx,sg-length-width = <0xe>;
2466			dma-channel@a0000000 {
2467				compatible = "xlnx,axi-dma-mm2s-channel";
2468				dma-channels = <0x1>;
2469				interrupts = <0 95 4>;
2470				xlnx,datawidth = <0x40>;
2471				xlnx,device-id = <0x0>;
2472			};
2473			dma-channel@A0000030 {
2474				compatible = "xlnx,axi-dma-s2mm-channel";
2475				dma-channels = <0x1>;
2476				interrupts = <0 96 4>;
2477				xlnx,datawidth = <0x40>;
2478				xlnx,device-id = <0x0>;
2479			};
2480		};
2481
2482		rx_dma: dma@a0001000 {
2483			#dma-cells = <1>;
2484			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
2485			clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>, <0x3 0x49>;
2486			compatible = "xlnx,axi-dma-1.00.a";
2487			//dma-coherent ;
2488			interrupt-names = "mm2s_introut", "s2mm_introut";
2489			interrupts = <0 91 4 0 92 4>;
2490			reg = <0xA0001000 0x1000>;
2491			xlnx,addrwidth = <0x28>;
2492			xlnx,include-sg ;
2493			xlnx,sg-length-width = <0xe>;
2494			dma-channel@a0001000 {
2495				compatible = "xlnx,axi-dma-mm2s-channel";
2496				dma-channels = <0x1>;
2497				interrupts = <0 91 4>;
2498				xlnx,datawidth = <0x40>;
2499				xlnx,device-id = <0x1>;
2500			};
2501			dma-channel@A0001030 {
2502				compatible = "xlnx,axi-dma-s2mm-channel";
2503				dma-channels = <0x1>;
2504				interrupts = <0 92 4>;
2505				xlnx,datawidth = <0x40>;
2506				xlnx,device-id = <0x1>;
2507			};
2508		};
2509
2510		tx_intf_0: tx_intf@a0005000 {
2511			clock-names = "s00_axi_aclk", "s00_axis_aclk";//, "s01_axis_aclk", "m00_axis_aclk";
2512			clocks = <0x3 0x49>, <0x3 0x49>;//, <0x3 0x49>, <0x3 0x49>;
2513			compatible = "sdr,tx_intf";
2514			interrupt-names = "tx_itrpt";
2515			interrupts = <0 94 1>;
2516			reg = <0xA0005000 0x1000>;
2517			xlnx,s00-axi-addr-width = <0x7>;
2518			xlnx,s00-axi-data-width = <0x20>;
2519		};
2520
2521		rx_intf_0: rx_intf@a0004000 {
2522			clock-names = "s00_axi_aclk", "m00_axis_aclk";//, "s00_axis_aclk";
2523			clocks = <0x3 0x49>, <0x3 0x49>;//, <0x3 0x49>;
2524			compatible = "sdr,rx_intf";
2525			interrupt-names = "not_valid_anymore", "rx_pkt_intr";
2526			interrupts = <0 89 1 0 90 1>;
2527			reg = <0xA0004000 0x1000>;
2528			xlnx,s00-axi-addr-width = <0x7>;
2529			xlnx,s00-axi-data-width = <0x20>;
2530		};
2531
2532		openofdm_tx_0: openofdm_tx@a0003000 {
2533			clock-names = "clk";
2534			clocks = <0x3 0x49>;
2535			compatible = "sdr,openofdm_tx";
2536			reg = <0xA0003000 0x1000>;
2537		};
2538
2539		openofdm_rx_0: openofdm_rx@a0002000 {
2540			clock-names = "clk";
2541			clocks = <0x3 0x49>;
2542			compatible = "sdr,openofdm_rx";
2543			reg = <0xA0002000 0x1000>;
2544		};
2545
2546		xpu_0: xpu@a0006000 {
2547			clock-names = "s00_axi_aclk";
2548			clocks = <0x3 0x49>;
2549			compatible = "sdr,xpu";
2550			reg = <0xA0006000 0x1000>;
2551		};
2552
2553		side_ch_0: side_ch@a0007000 {
2554			clock-names = "s00_axi_aclk";
2555			clocks = <0x3 0x49>;
2556			compatible = "sdr,side_ch";
2557			reg = <0xA0007000 0x1000>;
2558			dmas = <&rx_dma 0
2559					&tx_dma 1>;
2560			dma-names = "rx_dma_mm2s", "tx_dma_s2mm";
2561		};
2562
2563		cf-ad9361-lpc@99020000 {
2564			compatible = "adi,axi-ad9361-6.00.a";
2565			reg = <0x99020000 0x6000>;
2566			// dmas = <0x44 0x0>;
2567			// dma-names = "rx";
2568			spibus-connected = <0x45>;
2569		};
2570
2571		cf-ad9361-dds-core-lpc@99024000 {
2572			compatible = "adi,axi-ad9361-dds-6.00.a";
2573			reg = <0x99024000 0x1000>;
2574			clocks = <0x45 0xd>;
2575			clock-names = "sampl_clk";
2576			// dmas = <0x46 0x0>;
2577			// dma-names = "tx";
2578		};
2579
2580		/*axi-sysid-0@85000000 {
2581			compatible = "adi,axi-sysid-1.00.a";
2582			reg = <0x85000000 0x10000>;
2583		};*/
2584	};
2585
2586	clocks {
2587
2588		clock@0 {
2589			compatible = "fixed-clock";
2590			clock-frequency = <0x2625a00>;
2591			clock-output-names = "ad9361_ext_refclk";
2592			#clock-cells = <0x0>;
2593			linux,phandle = <0x2a>;
2594			phandle = <0x2a>;
2595		};
2596	};
2597};
2598