1/dts-v1/; 2 3/ { 4 #address-cells = <0x1>; 5 #size-cells = <0x1>; 6 compatible = "xlnx,zynq-7000"; 7 interrupt-parent = <0x1>; 8 model = "Xilinx Zynq ZC702"; 9 10 cpus { 11 #address-cells = <0x1>; 12 #size-cells = <0x0>; 13 14 cpu@0 { 15 compatible = "arm,cortex-a9"; 16 device_type = "cpu"; 17 reg = <0x0>; 18 clocks = <0x2 0x3>; 19 clock-latency = <0x3e8>; 20 cpu0-supply = <0x3>; 21 operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22 }; 23 24 cpu@1 { 25 compatible = "arm,cortex-a9"; 26 device_type = "cpu"; 27 reg = <0x1>; 28 clocks = <0x2 0x3>; 29 }; 30 }; 31 32 fpga-full { 33 compatible = "fpga-region"; 34 fpga-mgr = <0x4>; 35 #address-cells = <0x1>; 36 #size-cells = <0x1>; 37 ranges; 38 }; 39 40 pmu@f8891000 { 41 compatible = "arm,cortex-a9-pmu"; 42 interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43 interrupt-parent = <0x1>; 44 reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45 }; 46 47 fixedregulator { 48 compatible = "regulator-fixed"; 49 regulator-name = "VCCPINT"; 50 regulator-min-microvolt = <0xf4240>; 51 regulator-max-microvolt = <0xf4240>; 52 regulator-boot-on; 53 regulator-always-on; 54 linux,phandle = <0x3>; 55 phandle = <0x3>; 56 }; 57 58 amba { 59 u-boot,dm-pre-reloc; 60 compatible = "simple-bus"; 61 #address-cells = <0x1>; 62 #size-cells = <0x1>; 63 interrupt-parent = <0x1>; 64 ranges; 65 66 adc@f8007100 { 67 compatible = "xlnx,zynq-xadc-1.00.a"; 68 reg = <0xf8007100 0x20>; 69 interrupts = <0x0 0x7 0x4>; 70 interrupt-parent = <0x1>; 71 clocks = <0x2 0xc>; 72 }; 73 74 can@e0008000 { 75 compatible = "xlnx,zynq-can-1.0"; 76 status = "disabled"; 77 clocks = <0x2 0x13 0x2 0x24>; 78 clock-names = "can_clk", "pclk"; 79 reg = <0xe0008000 0x1000>; 80 interrupts = <0x0 0x1c 0x4>; 81 interrupt-parent = <0x1>; 82 tx-fifo-depth = <0x40>; 83 rx-fifo-depth = <0x40>; 84 }; 85 86 can@e0009000 { 87 compatible = "xlnx,zynq-can-1.0"; 88 status = "disabled"; 89 clocks = <0x2 0x14 0x2 0x25>; 90 clock-names = "can_clk", "pclk"; 91 reg = <0xe0009000 0x1000>; 92 interrupts = <0x0 0x33 0x4>; 93 interrupt-parent = <0x1>; 94 tx-fifo-depth = <0x40>; 95 rx-fifo-depth = <0x40>; 96 }; 97 98 gpio@e000a000 { 99 compatible = "xlnx,zynq-gpio-1.0"; 100 #gpio-cells = <0x2>; 101 clocks = <0x2 0x2a>; 102 gpio-controller; 103 interrupt-controller; 104 #interrupt-cells = <0x2>; 105 interrupt-parent = <0x1>; 106 interrupts = <0x0 0x14 0x4>; 107 reg = <0xe000a000 0x1000>; 108 linux,phandle = <0x6>; 109 phandle = <0x6>; 110 }; 111 112 i2c@e0004000 { 113 compatible = "cdns,i2c-r1p10"; 114 status = "disabled"; 115 clocks = <0x2 0x26>; 116 interrupt-parent = <0x1>; 117 interrupts = <0x0 0x19 0x4>; 118 reg = <0xe0004000 0x1000>; 119 #address-cells = <0x1>; 120 #size-cells = <0x0>; 121 }; 122 123 i2c@e0005000 { 124 compatible = "cdns,i2c-r1p10"; 125 status = "disabled"; 126 clocks = <0x2 0x27>; 127 interrupt-parent = <0x1>; 128 interrupts = <0x0 0x30 0x4>; 129 reg = <0xe0005000 0x1000>; 130 #address-cells = <0x1>; 131 #size-cells = <0x0>; 132 }; 133 134 interrupt-controller@f8f01000 { 135 compatible = "arm,cortex-a9-gic"; 136 #interrupt-cells = <0x3>; 137 interrupt-controller; 138 reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139 linux,phandle = <0x1>; 140 phandle = <0x1>; 141 }; 142 143 cache-controller@f8f02000 { 144 compatible = "arm,pl310-cache"; 145 reg = <0xf8f02000 0x1000>; 146 interrupts = <0x0 0x2 0x4>; 147 arm,data-latency = <0x3 0x2 0x2>; 148 arm,tag-latency = <0x2 0x2 0x2>; 149 cache-unified; 150 cache-level = <0x2>; 151 }; 152 153 memory-controller@f8006000 { 154 compatible = "xlnx,zynq-ddrc-a05"; 155 reg = <0xf8006000 0x1000>; 156 }; 157 158 ocmc@f800c000 { 159 compatible = "xlnx,zynq-ocmc-1.0"; 160 interrupt-parent = <0x1>; 161 interrupts = <0x0 0x3 0x4>; 162 reg = <0xf800c000 0x1000>; 163 }; 164 165 serial@e0000000 { 166 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167 status = "disabled"; 168 clocks = <0x2 0x17 0x2 0x28>; 169 clock-names = "uart_clk", "pclk"; 170 reg = <0xe0000000 0x1000>; 171 interrupts = <0x0 0x1b 0x4>; 172 }; 173 174 serial@e0001000 { 175 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176 status = "okay"; 177 clocks = <0x2 0x18 0x2 0x29>; 178 clock-names = "uart_clk", "pclk"; 179 reg = <0xe0001000 0x1000>; 180 interrupts = <0x0 0x32 0x4>; 181 }; 182 183 spi@e0006000 { 184 compatible = "xlnx,zynq-spi-r1p6"; 185 reg = <0xe0006000 0x1000>; 186 status = "okay"; 187 interrupt-parent = <0x1>; 188 interrupts = <0x0 0x1a 0x4>; 189 clocks = <0x2 0x19 0x2 0x22>; 190 clock-names = "ref_clk", "pclk"; 191 #address-cells = <0x1>; 192 #size-cells = <0x0>; 193 194 ad9361-phy@0 { 195 #address-cells = <0x1>; 196 #size-cells = <0x0>; 197 #clock-cells = <0x1>; 198 compatible = "adi,ad9361"; 199 reg = <0x0>; 200 spi-cpha; 201 spi-max-frequency = <0x989680>; 202 clocks = <0x5 0x0>; 203 clock-names = "ad9361_ext_refclk"; 204 clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 205 adi,digital-interface-tune-skip-mode = <0x0>; 206 adi,pp-tx-swap-enable; 207 adi,pp-rx-swap-enable; 208 adi,rx-frame-pulse-mode-enable; 209 adi,lvds-mode-enable; 210 adi,lvds-bias-mV = <0x96>; 211 adi,lvds-rx-onchip-termination-enable; 212 adi,rx-data-delay = <0x4>; 213 adi,tx-fb-clock-delay = <0x7>; 214 adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; 215 adi,2rx-2tx-mode-enable; 216 adi,frequency-division-duplex-mode-enable; 217 adi,rx-rf-port-input-select = <0x0>; 218 adi,tx-rf-port-input-select = <0x0>; 219 adi,tx-attenuation-mdB = <0x2710>; 220 adi,rf-rx-bandwidth-hz = <0x112a880>; 221 adi,rf-tx-bandwidth-hz = <0x112a880>; 222 adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 223 adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 224 adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225 adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 226 adi,gc-rx1-mode = <0x2>; 227 adi,gc-rx2-mode = <0x2>; 228 adi,gc-adc-ovr-sample-size = <0x4>; 229 adi,gc-adc-small-overload-thresh = <0x2f>; 230 adi,gc-adc-large-overload-thresh = <0x3a>; 231 adi,gc-lmt-overload-high-thresh = <0x320>; 232 adi,gc-lmt-overload-low-thresh = <0x2c0>; 233 adi,gc-dec-pow-measurement-duration = <0x2000>; 234 adi,gc-low-power-thresh = <0x18>; 235 adi,mgc-inc-gain-step = <0x2>; 236 adi,mgc-dec-gain-step = <0x2>; 237 adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 238 adi,agc-attack-delay-extra-margin-us = <0x1>; 239 adi,agc-outer-thresh-high = <0x5>; 240 adi,agc-outer-thresh-high-dec-steps = <0x2>; 241 adi,agc-inner-thresh-high = <0xa>; 242 adi,agc-inner-thresh-high-dec-steps = <0x1>; 243 adi,agc-inner-thresh-low = <0xc>; 244 adi,agc-inner-thresh-low-inc-steps = <0x1>; 245 adi,agc-outer-thresh-low = <0x12>; 246 adi,agc-outer-thresh-low-inc-steps = <0x2>; 247 adi,agc-adc-small-overload-exceed-counter = <0xa>; 248 adi,agc-adc-large-overload-exceed-counter = <0xa>; 249 adi,agc-adc-large-overload-inc-steps = <0x2>; 250 adi,agc-lmt-overload-large-exceed-counter = <0xa>; 251 adi,agc-lmt-overload-small-exceed-counter = <0xa>; 252 adi,agc-lmt-overload-large-inc-steps = <0x2>; 253 adi,agc-gain-update-interval-us = <0x3e8>; 254 adi,fagc-dec-pow-measurement-duration = <0x40>; 255 adi,fagc-lp-thresh-increment-steps = <0x1>; 256 adi,fagc-lp-thresh-increment-time = <0x5>; 257 adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 258 adi,fagc-final-overrange-count = <0x3>; 259 adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 260 adi,fagc-lmt-final-settling-steps = <0x1>; 261 adi,fagc-lock-level = <0xa>; 262 adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 263 adi,fagc-lock-level-lmt-gain-increase-enable; 264 adi,fagc-lpf-final-settling-steps = <0x1>; 265 adi,fagc-optimized-gain-offset = <0x5>; 266 adi,fagc-power-measurement-duration-in-state5 = <0x40>; 267 adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 268 adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 269 adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 270 adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 271 adi,fagc-rst-gla-large-adc-overload-enable; 272 adi,fagc-rst-gla-large-lmt-overload-enable; 273 adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 274 adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 275 adi,fagc-state-wait-time-ns = <0x104>; 276 adi,fagc-use-last-lock-level-for-set-gain-enable; 277 adi,rssi-restart-mode = <0x3>; 278 adi,rssi-delay = <0x1>; 279 adi,rssi-wait = <0x1>; 280 adi,rssi-duration = <0x3e8>; 281 adi,ctrl-outs-index = <0x0>; 282 adi,ctrl-outs-enable-mask = <0xff>; 283 adi,temp-sense-measurement-interval-ms = <0x3e8>; 284 adi,temp-sense-offset-signed = <0xce>; 285 adi,temp-sense-periodic-measurement-enable; 286 adi,aux-dac-manual-mode-enable; 287 adi,aux-dac1-default-value-mV = <0x0>; 288 adi,aux-dac1-rx-delay-us = <0x0>; 289 adi,aux-dac1-tx-delay-us = <0x0>; 290 adi,aux-dac2-default-value-mV = <0x0>; 291 adi,aux-dac2-rx-delay-us = <0x0>; 292 adi,aux-dac2-tx-delay-us = <0x0>; 293 en_agc-gpios = <0x6 0x62 0x0>; 294 sync-gpios = <0x6 0x63 0x0>; 295 reset-gpios = <0x6 0x64 0x0>; 296 enable-gpios = <0x6 0x65 0x0>; 297 txnrx-gpios = <0x6 0x66 0x0>; 298 linux,phandle = <0x11>; 299 phandle = <0x11>; 300 }; 301 }; 302 303 spi@e0007000 { 304 compatible = "xlnx,zynq-spi-r1p6"; 305 reg = <0xe0007000 0x1000>; 306 status = "okay"; 307 interrupt-parent = <0x1>; 308 interrupts = <0x0 0x31 0x4>; 309 clocks = <0x2 0x1a 0x2 0x23>; 310 clock-names = "ref_clk", "pclk"; 311 #address-cells = <0x1>; 312 #size-cells = <0x0>; 313 314 adf4351-udc-tx-pmod@0 { 315 #address-cells = <0x1>; 316 #size-cells = <0x0>; 317 compatible = "adi,adf4351"; 318 reg = <0x0>; 319 spi-max-frequency = <0x989680>; 320 clocks = <0x7>; 321 clock-names = "clkin"; 322 adi,channel-spacing = <0xf4240>; 323 adi,power-up-frequency = <0x160dc080>; 324 adi,phase-detector-polarity-positive-enable; 325 adi,charge-pump-current = <0x9c4>; 326 adi,output-power = <0x3>; 327 adi,mute-till-lock-enable; 328 adi,muxout-select = <0x6>; 329 gpios = <0x6 0x68 0x0>; 330 }; 331 332 adf4351-udc-rx-pmod@1 { 333 #address-cells = <0x1>; 334 #size-cells = <0x0>; 335 compatible = "adi,adf4351"; 336 reg = <0x1>; 337 spi-max-frequency = <0x989680>; 338 clocks = <0x7>; 339 clock-names = "clkin"; 340 adi,channel-spacing = <0xf4240>; 341 adi,power-up-frequency = <0x1443fd00>; 342 adi,phase-detector-polarity-positive-enable; 343 adi,charge-pump-current = <0x9c4>; 344 adi,output-power = <0x3>; 345 adi,mute-till-lock-enable; 346 adi,muxout-select = <0x6>; 347 gpios = <0x6 0x67 0x0>; 348 }; 349 }; 350 351 spi@e000d000 { 352 clock-names = "ref_clk", "pclk"; 353 clocks = <0x2 0xa 0x2 0x2b>; 354 compatible = "xlnx,zynq-qspi-1.0"; 355 status = "okay"; 356 interrupt-parent = <0x1>; 357 interrupts = <0x0 0x13 0x4>; 358 reg = <0xe000d000 0x1000>; 359 #address-cells = <0x1>; 360 #size-cells = <0x0>; 361 is-dual = <0x0>; 362 num-cs = <0x1>; 363 364 ps7-qspi@0 { 365 #address-cells = <0x1>; 366 #size-cells = <0x1>; 367 compatible = "n25q128a11"; 368 reg = <0x0>; 369 spi-tx-bus-width = <0x1>; 370 spi-rx-bus-width = <0x4>; 371 372 partition@0 { 373 label = "boot"; 374 reg = <0x0 0x500000>; 375 }; 376 377 partition@500000 { 378 label = "bootenv"; 379 reg = <0x500000 0x20000>; 380 }; 381 382 partition@520000 { 383 label = "config"; 384 reg = <0x520000 0x20000>; 385 }; 386 387 partition@540000 { 388 label = "image"; 389 reg = <0x540000 0xa80000>; 390 }; 391 392 partition@fc0000 { 393 label = "spare"; 394 reg = <0xfc0000 0x0>; 395 }; 396 }; 397 }; 398 399 memory-controller@e000e000 { 400 #address-cells = <0x1>; 401 #size-cells = <0x1>; 402 status = "disabled"; 403 clock-names = "memclk", "aclk"; 404 clocks = <0x2 0xb 0x2 0x2c>; 405 compatible = "arm,pl353-smc-r2p1"; 406 interrupt-parent = <0x1>; 407 interrupts = <0x0 0x12 0x4>; 408 ranges; 409 reg = <0xe000e000 0x1000>; 410 411 flash@e1000000 { 412 status = "disabled"; 413 compatible = "arm,pl353-nand-r2p1"; 414 reg = <0xe1000000 0x1000000>; 415 #address-cells = <0x1>; 416 #size-cells = <0x1>; 417 }; 418 419 flash@e2000000 { 420 status = "disabled"; 421 compatible = "cfi-flash"; 422 reg = <0xe2000000 0x2000000>; 423 #address-cells = <0x1>; 424 #size-cells = <0x1>; 425 }; 426 }; 427 428 ethernet@e000b000 { 429 compatible = "cdns,zynq-gem", "cdns,gem"; 430 reg = <0xe000b000 0x1000>; 431 status = "okay"; 432 interrupts = <0x0 0x16 0x4>; 433 clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 434 clock-names = "pclk", "hclk", "tx_clk"; 435 #address-cells = <0x1>; 436 #size-cells = <0x0>; 437 phy-handle = <0x8>; 438 phy-mode = "rgmii-id"; 439 440 phy@7 { 441 device_type = "ethernet-phy"; 442 reg = <0x7>; 443 linux,phandle = <0x8>; 444 phandle = <0x8>; 445 }; 446 }; 447 448 ethernet@e000c000 { 449 compatible = "cdns,zynq-gem", "cdns,gem"; 450 reg = <0xe000c000 0x1000>; 451 status = "disabled"; 452 interrupts = <0x0 0x2d 0x4>; 453 clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 454 clock-names = "pclk", "hclk", "tx_clk"; 455 #address-cells = <0x1>; 456 #size-cells = <0x0>; 457 }; 458 459 sdhci@e0100000 { 460 compatible = "arasan,sdhci-8.9a"; 461 status = "okay"; 462 clock-names = "clk_xin", "clk_ahb"; 463 clocks = <0x2 0x15 0x2 0x20>; 464 interrupt-parent = <0x1>; 465 interrupts = <0x0 0x18 0x4>; 466 reg = <0xe0100000 0x1000>; 467 broken-adma2; 468 }; 469 470 sdhci@e0101000 { 471 compatible = "arasan,sdhci-8.9a"; 472 status = "disabled"; 473 clock-names = "clk_xin", "clk_ahb"; 474 clocks = <0x2 0x16 0x2 0x21>; 475 interrupt-parent = <0x1>; 476 interrupts = <0x0 0x2f 0x4>; 477 reg = <0xe0101000 0x1000>; 478 broken-adma2; 479 }; 480 481 slcr@f8000000 { 482 #address-cells = <0x1>; 483 #size-cells = <0x1>; 484 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 485 reg = <0xf8000000 0x1000>; 486 ranges; 487 linux,phandle = <0x9>; 488 phandle = <0x9>; 489 490 clkc@100 { 491 #clock-cells = <0x1>; 492 compatible = "xlnx,ps7-clkc"; 493 fclk-enable = <0xf>; 494 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 495 reg = <0x100 0x100>; 496 ps-clk-frequency = <0x1fca055>; 497 linux,phandle = <0x2>; 498 phandle = <0x2>; 499 }; 500 501 rstc@200 { 502 compatible = "xlnx,zynq-reset"; 503 reg = <0x200 0x48>; 504 #reset-cells = <0x1>; 505 syscon = <0x9>; 506 }; 507 508 pinctrl@700 { 509 compatible = "xlnx,pinctrl-zynq"; 510 reg = <0x700 0x200>; 511 syscon = <0x9>; 512 }; 513 }; 514 515 dmac@f8003000 { 516 compatible = "arm,pl330", "arm,primecell"; 517 reg = <0xf8003000 0x1000>; 518 interrupt-parent = <0x1>; 519 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 520 interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 521 #dma-cells = <0x1>; 522 #dma-channels = <0x8>; 523 #dma-requests = <0x4>; 524 clocks = <0x2 0x1b>; 525 clock-names = "apb_pclk"; 526 linux,phandle = <0xe>; 527 phandle = <0xe>; 528 }; 529 530 devcfg@f8007000 { 531 compatible = "xlnx,zynq-devcfg-1.0"; 532 interrupt-parent = <0x1>; 533 interrupts = <0x0 0x8 0x4>; 534 reg = <0xf8007000 0x100>; 535 clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 536 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 537 syscon = <0x9>; 538 linux,phandle = <0x4>; 539 phandle = <0x4>; 540 }; 541 542 efuse@f800d000 { 543 compatible = "xlnx,zynq-efuse"; 544 reg = <0xf800d000 0x20>; 545 }; 546 547 timer@f8f00200 { 548 compatible = "arm,cortex-a9-global-timer"; 549 reg = <0xf8f00200 0x20>; 550 interrupts = <0x1 0xb 0x301>; 551 interrupt-parent = <0x1>; 552 clocks = <0x2 0x4>; 553 }; 554 555 timer@f8001000 { 556 interrupt-parent = <0x1>; 557 interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 558 compatible = "cdns,ttc"; 559 clocks = <0x2 0x6>; 560 reg = <0xf8001000 0x1000>; 561 }; 562 563 timer@f8002000 { 564 interrupt-parent = <0x1>; 565 interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 566 compatible = "cdns,ttc"; 567 clocks = <0x2 0x6>; 568 reg = <0xf8002000 0x1000>; 569 }; 570 571 timer@f8f00600 { 572 interrupt-parent = <0x1>; 573 interrupts = <0x1 0xd 0x301>; 574 compatible = "arm,cortex-a9-twd-timer"; 575 reg = <0xf8f00600 0x20>; 576 clocks = <0x2 0x4>; 577 }; 578 579 usb@e0002000 { 580 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 581 status = "okay"; 582 clocks = <0x2 0x1c>; 583 interrupt-parent = <0x1>; 584 interrupts = <0x0 0x15 0x4>; 585 reg = <0xe0002000 0x1000>; 586 phy_type = "ulpi"; 587 dr_mode = "host"; 588 xlnx,phy-reset-gpio = <0x6 0x7 0x0>; 589 }; 590 591 usb@e0003000 { 592 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 593 status = "disabled"; 594 clocks = <0x2 0x1d>; 595 interrupt-parent = <0x1>; 596 interrupts = <0x0 0x2c 0x4>; 597 reg = <0xe0003000 0x1000>; 598 phy_type = "ulpi"; 599 }; 600 601 watchdog@f8005000 { 602 clocks = <0x2 0x2d>; 603 compatible = "cdns,wdt-r1p2"; 604 interrupt-parent = <0x1>; 605 interrupts = <0x0 0x9 0x1>; 606 reg = <0xf8005000 0x1000>; 607 timeout-sec = <0xa>; 608 }; 609 }; 610 611 aliases { 612 ethernet0 = "/amba/ethernet@e000b000"; 613 serial0 = "/amba/serial@e0001000"; 614 }; 615 616 memory { 617 device_type = "memory"; 618 reg = <0x0 0x40000000>; 619 }; 620 621 chosen { 622 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait"; 623 linux,stdout-path = "/amba@0/uart@E0001000"; 624 }; 625 626 leds { 627 compatible = "gpio-leds"; 628 629 ds12 { 630 label = "ds12:green"; 631 gpios = <0x6 0x8 0x0>; 632 }; 633 634 ds15 { 635 label = "ds15:green"; 636 gpios = <0x6 0x3a 0x0>; 637 }; 638 639 ds16 { 640 label = "ds16:green"; 641 gpios = <0x6 0x3b 0x0>; 642 }; 643 644 ds17 { 645 label = "ds17:green"; 646 gpios = <0x6 0x3c 0x0>; 647 }; 648 649 ds18 { 650 label = "ds18:green"; 651 gpios = <0x6 0x3d 0x0>; 652 }; 653 654 ds19 { 655 label = "ds19:green"; 656 gpios = <0x6 0x3e 0x0>; 657 }; 658 659 ds20 { 660 label = "ds20:green"; 661 gpios = <0x6 0x3f 0x0>; 662 }; 663 664 ds21 { 665 label = "ds21:green"; 666 gpios = <0x6 0x40 0x0>; 667 }; 668 669 ds22 { 670 label = "ds22:green"; 671 gpios = <0x6 0x41 0x0>; 672 }; 673 674 ds23 { 675 label = "ds23:green"; 676 gpios = <0x6 0xa 0x0>; 677 }; 678 }; 679 680 gpio_keys { 681 compatible = "gpio-keys"; 682 #address-cells = <0x1>; 683 #size-cells = <0x0>; 684 autorepeat; 685 686 sw5 { 687 label = "Left"; 688 linux,code = <0x69>; 689 gpios = <0x6 0x36 0x0>; 690 }; 691 692 sw7 { 693 label = "Right"; 694 linux,code = <0x6a>; 695 gpios = <0x6 0x37 0x0>; 696 }; 697 698 sw15_0 { 699 label = "SW15_0"; 700 linux,code = <0x0>; 701 linux,input-type = <0x5>; 702 gpios = <0x6 0x38 0x0>; 703 }; 704 705 sw15_1 { 706 label = "SW15_1"; 707 linux,code = <0x1>; 708 linux,input-type = <0x5>; 709 gpios = <0x6 0x39 0x0>; 710 }; 711 712 sw13 { 713 label = "Select"; 714 linux,code = <0x1c>; 715 gpios = <0x6 0xe 0x0>; 716 }; 717 718 sw14 { 719 label = "SW14"; 720 linux,code = <0x1>; 721 gpios = <0x6 0xc 0x0>; 722 }; 723 }; 724 725 fpga-axi@0 { 726 compatible = "simple-bus"; 727 #address-cells = <0x1>; 728 #size-cells = <0x1>; 729 ranges; 730 731 i2c@41600000 { 732 compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a"; 733 reg = <0x41600000 0x10000>; 734 interrupt-parent = <0x1>; 735 interrupts = <0x0 0x3a 0x4>; 736 clocks = <0x2 0xf>; 737 clock-names = "pclk"; 738 #address-cells = <0x1>; 739 #size-cells = <0x0>; 740 741 mux@74 { 742 compatible = "pca9548"; 743 reg = <0x74>; 744 #address-cells = <0x1>; 745 #size-cells = <0x0>; 746 747 i2c@1 { 748 #size-cells = <0x0>; 749 #address-cells = <0x1>; 750 reg = <0x1>; 751 752 adv7511@39 { 753 compatible = "adi,adv7511"; 754 reg = <0x39 0x3f>; 755 reg-names = "primary", "edid"; 756 adi,input-depth = <0x8>; 757 adi,input-colorspace = "yuv422"; 758 adi,input-clock = "1x"; 759 adi,input-style = <0x1>; 760 adi,input-justification = "right"; 761 adi,clock-delay = <0x0>; 762 #sound-dai-cells = <0x0>; 763 linux,phandle = <0x14>; 764 phandle = <0x14>; 765 766 ports { 767 #address-cells = <0x1>; 768 #size-cells = <0x0>; 769 770 port@0 { 771 reg = <0x0>; 772 773 endpoint { 774 remote-endpoint = <0xa>; 775 linux,phandle = <0xd>; 776 phandle = <0xd>; 777 }; 778 }; 779 780 port@1 { 781 reg = <0x1>; 782 }; 783 }; 784 }; 785 }; 786 787 i2c@4 { 788 #size-cells = <0x0>; 789 #address-cells = <0x1>; 790 reg = <0x4>; 791 792 rtc@51 { 793 compatible = "rtc8564"; 794 reg = <0x51>; 795 }; 796 }; 797 798 i2c@5 { 799 #size-cells = <0x0>; 800 #address-cells = <0x1>; 801 reg = <0x5>; 802 803 ad7291@2f { 804 compatible = "adi,ad7291"; 805 reg = <0x2f>; 806 }; 807 808 eeprom@50 { 809 compatible = "at24,24c02"; 810 reg = <0x50>; 811 }; 812 }; 813 }; 814 }; 815/* 816 axivdma@43000000 { 817 #address-cells = <0x1>; 818 #size-cells = <0x1>; 819 #dma-cells = <0x1>; 820 compatible = "xlnx,axi-vdma-1.00.a"; 821 reg = <0x43000000 0x1000>; 822 xlnx,num-fstores = <0x3>; 823 linux,phandle = <0xb>; 824 phandle = <0xb>; 825 826 dma-channel@7e200000 { 827 compatible = "xlnx,axi-vdma-mm2s-channel"; 828 interrupts = <0x0 0x3b 0x4>; 829 xlnx,datawidth = <0x40>; 830 xlnx,genlock-mode = <0x0>; 831 xlnx,include-dre = <0x0>; 832 }; 833 }; 834 835 axi-clkgen@79000000 { 836 compatible = "adi,axi-clkgen-2.00.a"; 837 reg = <0x79000000 0x10000>; 838 #clock-cells = <0x0>; 839 clocks = <0x2 0x10>; 840 linux,phandle = <0xc>; 841 phandle = <0xc>; 842 }; 843 844 axi_hdmi@70e00000 { 845 compatible = "adi,axi-hdmi-tx-1.00.a"; 846 reg = <0x70e00000 0x10000>; 847 dmas = <0xb 0x0>; 848 dma-names = "video"; 849 clocks = <0xc>; 850 851 port { 852 853 endpoint { 854 remote-endpoint = <0xd>; 855 linux,phandle = <0xa>; 856 phandle = <0xa>; 857 }; 858 }; 859 }; 860 861 axi-spdif-tx@75c00000 { 862 compatible = "adi,axi-spdif-tx-1.00.a"; 863 reg = <0x75c00000 0x1000>; 864 dmas = <0xe 0x0>; 865 dma-names = "tx"; 866 clocks = <0x2 0xf 0xf>; 867 clock-names = "axi", "ref"; 868 #sound-dai-cells = <0x0>; 869 linux,phandle = <0x13>; 870 phandle = <0x13>; 871 }; 872*/ 873 dma@7c400000 { 874 compatible = "adi,axi-dmac-1.00.a"; 875 reg = <0x7c400000 0x10000>; 876 #dma-cells = <0x1>; 877 interrupts = <0x0 0x39 0x0>; 878 clocks = <0x2 0x10>; 879 linux,phandle = <0x10>; 880 phandle = <0x10>; 881 882 adi,channels { 883 #size-cells = <0x0>; 884 #address-cells = <0x1>; 885 886 dma-channel@0 { 887 reg = <0x0>; 888 adi,source-bus-width = <0x40>; 889 adi,source-bus-type = <0x2>; 890 adi,destination-bus-width = <0x40>; 891 adi,destination-bus-type = <0x0>; 892 adi,length-width = <0x18>; 893 }; 894 }; 895 }; 896 897 dma@7c420000 { 898 compatible = "adi,axi-dmac-1.00.a"; 899 reg = <0x7c420000 0x10000>; 900 #dma-cells = <0x1>; 901 interrupts = <0x0 0x38 0x0>; 902 clocks = <0x2 0x10>; 903 linux,phandle = <0x12>; 904 phandle = <0x12>; 905 906 adi,channels { 907 #size-cells = <0x0>; 908 #address-cells = <0x1>; 909 910 dma-channel@0 { 911 reg = <0x0>; 912 adi,source-bus-width = <0x40>; 913 adi,source-bus-type = <0x0>; 914 adi,destination-bus-width = <0x40>; 915 adi,destination-bus-type = <0x2>; 916 adi,length-width = <0x18>; 917 adi,cyclic; 918 }; 919 }; 920 }; 921 922 sdr: sdr { 923 compatible ="sdr,sdr"; 924 dmas = <&rx_dma 0 925 &rx_dma 1 926 &tx_dma 0 927 &tx_dma 1>; 928 dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm"; 929 interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1"; 930 interrupt-parent = <1>; 931 interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 932 } ; 933 934 axidmatest_1: axidmatest@1 { 935 compatible ="xlnx,axi-dma-test-1.00.a"; 936 dmas = <&rx_dma 0 937 &rx_dma 1>; 938 dma-names = "axidma0", "axidma1"; 939 } ; 940 941 tx_dma: dma@80400000 { 942 #dma-cells = <1>; 943 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 944 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 945 compatible = "xlnx,axi-dma-1.00.a"; 946 interrupt-names = "mm2s_introut", "s2mm_introut"; 947 interrupt-parent = <1>; 948 interrupts = <0 35 4 0 36 4>; 949 reg = <0x80400000 0x10000>; 950 xlnx,addrwidth = <0x20>; 951 xlnx,include-sg ; 952 xlnx,sg-length-width = <0xe>; 953 dma-channel@80400000 { 954 compatible = "xlnx,axi-dma-mm2s-channel"; 955 dma-channels = <0x1>; 956 interrupts = <0 35 4>; 957 xlnx,datawidth = <0x40>; 958 xlnx,device-id = <0x0>; 959 }; 960 dma-channel@80400030 { 961 compatible = "xlnx,axi-dma-s2mm-channel"; 962 dma-channels = <0x1>; 963 interrupts = <0 36 4>; 964 xlnx,datawidth = <0x40>; 965 xlnx,device-id = <0x0>; 966 }; 967 }; 968 969 rx_dma: dma@80410000 { 970 #dma-cells = <1>; 971 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 972 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 973 compatible = "xlnx,axi-dma-1.00.a"; 974 //dma-coherent ; 975 interrupt-names = "mm2s_introut", "s2mm_introut"; 976 interrupt-parent = <1>; 977 interrupts = <0 31 4 0 32 4>; 978 reg = <0x80410000 0x10000>; 979 xlnx,addrwidth = <0x20>; 980 xlnx,include-sg ; 981 xlnx,sg-length-width = <0xe>; 982 dma-channel@80410000 { 983 compatible = "xlnx,axi-dma-mm2s-channel"; 984 dma-channels = <0x1>; 985 interrupts = <0 31 4>; 986 xlnx,datawidth = <0x40>; 987 xlnx,device-id = <0x1>; 988 }; 989 dma-channel@80410030 { 990 compatible = "xlnx,axi-dma-s2mm-channel"; 991 dma-channels = <0x1>; 992 interrupts = <0 32 4>; 993 xlnx,datawidth = <0x40>; 994 xlnx,device-id = <0x1>; 995 }; 996 }; 997 998 tx_intf_0: tx_intf@83c00000 { 999 clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk"; 1000 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 1001 compatible = "sdr,tx_intf"; 1002 interrupt-names = "tx_itrpt0", "tx_itrpt1"; 1003 interrupt-parent = <1>; 1004 interrupts = <0 33 1 0 34 1>; 1005 reg = <0x83c00000 0x10000>; 1006 xlnx,s00-axi-addr-width = <0x7>; 1007 xlnx,s00-axi-data-width = <0x20>; 1008 }; 1009 1010 rx_intf_0: rx_intf@83c20000 { 1011 clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk"; 1012 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 1013 compatible = "sdr,rx_intf"; 1014 interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 1015 interrupt-parent = <1>; 1016 interrupts = <0 29 1 0 30 1>; 1017 reg = <0x83c20000 0x10000>; 1018 xlnx,s00-axi-addr-width = <0x7>; 1019 xlnx,s00-axi-data-width = <0x20>; 1020 }; 1021 1022 openofdm_tx_0: openofdm_tx@83c10000 { 1023 clock-names = "clk"; 1024 clocks = <0x2 0x11>; 1025 compatible = "sdr,openofdm_tx"; 1026 reg = <0x83c10000 0x10000>; 1027 }; 1028 1029 openofdm_rx_0: openofdm_rx@83c30000 { 1030 clock-names = "clk"; 1031 clocks = <0x2 0x11>; 1032 compatible = "sdr,openofdm_rx"; 1033 reg = <0x83c30000 0x10000>; 1034 }; 1035 1036 xpu_0: xpu@83c40000 { 1037 clock-names = "s00_axi_aclk"; 1038 clocks = <0x2 0x11>; 1039 compatible = "sdr,xpu"; 1040 reg = <0x83c40000 0x10000>; 1041 }; 1042 1043 cf-ad9361-lpc@79020000 { 1044 compatible = "adi,axi-ad9361-6.00.a"; 1045 reg = <0x79020000 0x6000>; 1046 dmas = <0x10 0x0>; 1047 dma-names = "rx"; 1048 spibus-connected = <0x11>; 1049 }; 1050 1051 cf-ad9361-dds-core-lpc@79024000 { 1052 compatible = "adi,axi-ad9361-dds-6.00.a"; 1053 reg = <0x79024000 0x1000>; 1054 clocks = <0x11 0xd>; 1055 clock-names = "sampl_clk"; 1056 dmas = <0x12 0x0>; 1057 dma-names = "tx"; 1058 }; 1059 }; 1060/* 1061 audio_clock { 1062 compatible = "fixed-clock"; 1063 #clock-cells = <0x0>; 1064 clock-frequency = <0xbb8000>; 1065 linux,phandle = <0xf>; 1066 phandle = <0xf>; 1067 }; 1068 1069 adv7511_hdmi_snd { 1070 compatible = "simple-audio-card"; 1071 simple-audio-card,name = "HDMI monitor"; 1072 simple-audio-card,widgets = "Speaker", "Speaker"; 1073 simple-audio-card,routing = "Speaker", "TX"; 1074 1075 simple-audio-card,dai-link@0 { 1076 format = "spdif"; 1077 1078 cpu { 1079 sound-dai = <0x13>; 1080 frame-master; 1081 bitclock-master; 1082 }; 1083 1084 codec { 1085 sound-dai = <0x14>; 1086 }; 1087 }; 1088 }; 1089*/ 1090 clocks { 1091 1092 clock@0 { 1093 #clock-cells = <0x0>; 1094 compatible = "fixed-clock"; 1095 clock-frequency = <0x2625a00>; 1096 clock-output-names = "ad9361_ext_refclk"; 1097 linux,phandle = <0x5>; 1098 phandle = <0x5>; 1099 }; 1100 1101 clock@1 { 1102 #clock-cells = <0x0>; 1103 compatible = "fixed-clock"; 1104 clock-frequency = <0x17d7840>; 1105 clock-output-names = "refclk"; 1106 linux,phandle = <0x7>; 1107 phandle = <0x7>; 1108 }; 1109 }; 1110}; 1111