1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include <../../drivers/iio/adc/ad9361_regs.h> 49 #include <../../drivers/iio/adc/ad9361.h> 50 #include <../../drivers/iio/adc/ad9361_private.h> 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 extern int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num); 54 extern int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb, 55 bool tx1, bool tx2, bool immed); 56 extern int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy, 57 struct ctrl_outs_control *ctrl); 58 59 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 60 #include "hw_def.h" 61 #include "sdr.h" 62 #include "git_rev.h" 63 64 // driver API of component driver 65 extern struct tx_intf_driver_api *tx_intf_api; 66 extern struct rx_intf_driver_api *rx_intf_api; 67 extern struct openofdm_tx_driver_api *openofdm_tx_api; 68 extern struct openofdm_rx_driver_api *openofdm_rx_api; 69 extern struct xpu_driver_api *xpu_api; 70 71 u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes); 72 u8 gen_mpdu_delim_crc(u16 m); 73 74 static int test_mode = 0; // 0 normal; 1 rx test 75 76 MODULE_AUTHOR("Xianjun Jiao"); 77 MODULE_DESCRIPTION("SDR driver"); 78 MODULE_LICENSE("GPL v2"); 79 80 module_param(test_mode, int, 0); 81 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 82 83 // ---------------rfkill--------------------------------------- 84 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 85 { 86 int reg; 87 88 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 89 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 90 else 91 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 92 93 if (reg == AD9361_RADIO_ON_TX_ATT) 94 return true;// 0 off, 1 on 95 return false; 96 } 97 98 void openwifi_rfkill_init(struct ieee80211_hw *hw) 99 { 100 struct openwifi_priv *priv = hw->priv; 101 102 priv->rfkill_off = openwifi_is_radio_enabled(priv); 103 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 104 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 105 wiphy_rfkill_start_polling(hw->wiphy); 106 } 107 108 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 109 { 110 bool enabled; 111 struct openwifi_priv *priv = hw->priv; 112 113 enabled = openwifi_is_radio_enabled(priv); 114 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 115 if (unlikely(enabled != priv->rfkill_off)) { 116 priv->rfkill_off = enabled; 117 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 118 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 119 } 120 } 121 122 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 123 { 124 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 125 wiphy_rfkill_stop_polling(hw->wiphy); 126 } 127 //----------------rfkill end----------------------------------- 128 129 //static void ad9361_rf_init(void); 130 //static void ad9361_rf_stop(void); 131 //static void ad9361_rf_calc_rssi(void); 132 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 133 struct ieee80211_conf *conf) 134 { 135 struct openwifi_priv *priv = dev->priv; 136 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 137 u32 actual_tx_lo; 138 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 139 int static_lbt_th, auto_lbt_th, fpga_lbt_th; 140 141 if (change_flag) { 142 priv->actual_rx_lo = actual_rx_lo; 143 144 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 145 146 clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 147 clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 148 149 if (actual_rx_lo<2412) { 150 priv->rssi_correction = 153; 151 } else if (actual_rx_lo<=2484) { 152 priv->rssi_correction = 153; 153 } else if (actual_rx_lo<5160) { 154 priv->rssi_correction = 153; 155 } else if (actual_rx_lo<=5240) { 156 priv->rssi_correction = 145; 157 } else if (actual_rx_lo<=5320) { 158 priv->rssi_correction = 148; 159 } else { 160 priv->rssi_correction = 148; 161 } 162 163 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 164 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 165 auto_lbt_th = ((priv->rssi_correction-62-16)<<1); 166 static_lbt_th = priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]; 167 fpga_lbt_th = (static_lbt_th==0?auto_lbt_th:static_lbt_th); 168 xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th); 169 170 priv->last_auto_fpga_lbt_th = auto_lbt_th; 171 172 if (actual_rx_lo < 2500) { 173 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 174 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 175 if (priv->band != BAND_2_4GHZ) { 176 priv->band = BAND_2_4GHZ; 177 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 178 } 179 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 180 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 181 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 182 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 183 } 184 else { 185 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 186 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 187 if (priv->band != BAND_5_8GHZ) { 188 priv->band = BAND_5_8GHZ; 189 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 190 } 191 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 192 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 193 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 194 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 195 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 196 } 197 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 198 // //-- use less 199 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 200 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 201 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 202 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 203 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d) fpga_lbt_th %d (auto %d static %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag,fpga_lbt_th,auto_lbt_th,static_lbt_th); 204 } 205 } 206 207 const struct openwifi_rf_ops ad9361_rf_ops = { 208 .name = "ad9361", 209 // .init = ad9361_rf_init, 210 // .stop = ad9361_rf_stop, 211 .set_chan = ad9361_rf_set_channel, 212 // .calc_rssi = ad9361_rf_calc_rssi, 213 }; 214 215 u16 reverse16(u16 d) { 216 union u16_byte2 tmp0, tmp1; 217 tmp0.a = d; 218 tmp1.c[0] = tmp0.c[1]; 219 tmp1.c[1] = tmp0.c[0]; 220 return(tmp1.a); 221 } 222 223 u32 reverse32(u32 d) { 224 union u32_byte4 tmp0, tmp1; 225 tmp0.a = d; 226 tmp1.c[0] = tmp0.c[3]; 227 tmp1.c[1] = tmp0.c[2]; 228 tmp1.c[2] = tmp0.c[1]; 229 tmp1.c[3] = tmp0.c[0]; 230 return(tmp1.a); 231 } 232 233 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 234 { 235 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 236 int i; 237 238 ring->stop_flag = 0; 239 ring->bd_wr_idx = 0; 240 ring->bd_rd_idx = 0; 241 ring->queued_cnt = 0; 242 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 243 if (ring->bds==NULL) { 244 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 245 return -ENOMEM; 246 } 247 248 for (i = 0; i < NUM_TX_BD; i++) { 249 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 250 //at first right after skb allocated, head, data, tail are the same. 251 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 252 ring->bds[i].aggr_flag = false; 253 ring->bds[i].seq_no = 0; 254 } 255 256 return 0; 257 } 258 259 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 260 { 261 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 262 int i; 263 264 ring->stop_flag = 0; 265 ring->bd_wr_idx = 0; 266 ring->bd_rd_idx = 0; 267 ring->queued_cnt = 0; 268 for (i = 0; i < NUM_TX_BD; i++) { 269 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 270 continue; 271 if (ring->bds[i].dma_mapping_addr != 0) 272 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 273 // if (ring->bds[i].skb_linked!=NULL) 274 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 275 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 276 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 277 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str, 278 ring_idx, i, (void*)(ring->bds[i].skb_linked), (unsigned int)(ring->bds[i].dma_mapping_addr)); 279 280 ring->bds[i].skb_linked=0; 281 ring->bds[i].dma_mapping_addr = 0; 282 ring->bds[i].aggr_flag = false; 283 ring->bds[i].seq_no = 0; 284 } 285 if (ring->bds) 286 kfree(ring->bds); 287 ring->bds = NULL; 288 } 289 290 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 291 { 292 int i; 293 u8 *pdata_tmp; 294 295 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 296 if (!priv->rx_cyclic_buf) { 297 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 298 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 299 return(-1); 300 } 301 302 // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 303 for (i=0; i<NUM_RX_BD; i++) { 304 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 305 (*((u32*)(pdata_tmp+0 ))) = 0; 306 (*((u32*)(pdata_tmp+4 ))) = 0; 307 } 308 printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 309 310 return 0; 311 } 312 313 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 314 { 315 if (priv->rx_cyclic_buf) 316 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 317 318 priv->rx_cyclic_buf_dma_mapping_addr = 0; 319 priv->rx_cyclic_buf = 0; 320 } 321 322 static int rx_dma_setup(struct ieee80211_hw *dev){ 323 struct openwifi_priv *priv = dev->priv; 324 struct dma_device *rx_dev = priv->rx_chan->device; 325 326 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 327 if (!(priv->rxd)) { 328 openwifi_free_rx_ring(priv); 329 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 330 return(-1); 331 } 332 priv->rxd->callback = 0; 333 priv->rxd->callback_param = 0; 334 335 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 336 337 if (dma_submit_error(priv->rx_cookie)) { 338 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 339 return(-1); 340 } 341 342 dma_async_issue_pending(priv->rx_chan); 343 return(0); 344 } 345 346 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 347 { 348 struct ieee80211_hw *dev = dev_id; 349 struct openwifi_priv *priv = dev->priv; 350 struct ieee80211_rx_status rx_status = {0}; 351 struct sk_buff *skb; 352 struct ieee80211_hdr *hdr; 353 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0;//, fc_di; 354 bool ht_flag, short_gi, ht_aggr, ht_aggr_last; 355 // u32 dma_driver_buf_idx_mod; 356 u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 357 s8 signal; 358 u16 agc_status_and_pkt_exist_flag, rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 359 bool content_ok = false, len_overflow = false; 360 361 #ifdef USE_NEW_RX_INTERRUPT 362 int i; 363 spin_lock(&priv->lock); 364 for (i=0; i<NUM_RX_BD; i++) { 365 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; 366 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); //check rx_intf_pl_to_m_axis.v. FPGA TODO: add pkt exist 1bit flag next to gpio_status_lock_by_sig_valid 367 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 368 continue; 369 #else 370 static u8 target_buf_idx_old = 0; 371 spin_lock(&priv->lock); 372 while(1) { // loop all rx buffers that have new rx packets 373 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 374 agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); 375 if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 376 break; 377 #endif 378 379 tsft_low = (*((u32*)(pdata_tmp+0 ))); 380 tsft_high = (*((u32*)(pdata_tmp+4 ))); 381 rssi_val = (*((u16*)(pdata_tmp+8 ))); 382 len = (*((u16*)(pdata_tmp+12))); 383 384 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 385 386 rate_idx = (*((u16*)(pdata_tmp+14))); 387 ht_flag = ((rate_idx&0x10)!=0); 388 short_gi = ((rate_idx&0x20)!=0); 389 ht_aggr = (ht_flag & ((rate_idx&0x40)!=0)); 390 ht_aggr_last = (ht_flag & ((rate_idx&0x80)!=0)); 391 rate_idx = (rate_idx&0x1F); 392 393 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 394 395 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 396 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 397 // dma_driver_buf_idx_mod = (state.residue&0x7f); 398 fcs_ok = ((fcs_ok&0x80)!=0); 399 400 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 401 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 402 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 403 // } 404 content_ok = true; 405 } else { 406 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 407 content_ok = false; 408 } 409 410 rssi_val = (rssi_val>>1); 411 if ( (rssi_val+128)<priv->rssi_correction ) 412 signal = -128; 413 else 414 signal = rssi_val - priv->rssi_correction; 415 416 // fc_di = (*((u32*)(pdata_tmp+16))); 417 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 418 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 419 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 420 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 421 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 422 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 423 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 424 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 425 addr1_low32 = *((u32*)(hdr->addr1+2)); 426 addr1_high16 = *((u16*)(hdr->addr1)); 427 if (len>=20) { 428 addr2_low32 = *((u32*)(hdr->addr2+2)); 429 addr2_high16 = *((u16*)(hdr->addr2)); 430 } 431 if (len>=26) { 432 addr3_low32 = *((u32*)(hdr->addr3+2)); 433 addr3_high16 = *((u16*)(hdr->addr3)); 434 } 435 if (len>=28) 436 sc = hdr->seq_ctrl; 437 438 if ( (addr1_low32!=0xffffffff || addr1_high16!=0xffff) || (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&4) ) 439 printk("%s openwifi_rx_interrupt:%4dbytes ht%d aggr%d/%d sgi%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 440 len, ht_flag, ht_aggr, ht_aggr_last, short_gi, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 441 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 442 #ifdef USE_NEW_RX_INTERRUPT 443 sc, fcs_ok, i, signal); 444 #else 445 sc, fcs_ok, target_buf_idx_old, signal); 446 #endif 447 } 448 449 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 450 if (content_ok) { 451 skb = dev_alloc_skb(len); 452 if (skb) { 453 skb_put_data(skb,pdata_tmp+16,len); 454 455 rx_status.antenna = 0; 456 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 457 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 458 rx_status.signal = signal; 459 rx_status.freq = dev->conf.chandef.chan->center_freq; 460 rx_status.band = dev->conf.chandef.chan->band; 461 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 462 rx_status.flag |= RX_FLAG_MACTIME_START; 463 if (!fcs_ok) 464 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 465 if (rate_idx <= 15) 466 rx_status.encoding = RX_ENC_LEGACY; 467 else 468 rx_status.encoding = RX_ENC_HT; 469 rx_status.bw = RATE_INFO_BW_20; 470 if (short_gi) 471 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 472 if(ht_aggr) 473 { 474 rx_status.ampdu_reference = priv->ampdu_reference; 475 rx_status.flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 476 if (ht_aggr_last) 477 rx_status.flag |= RX_FLAG_AMPDU_IS_LAST; 478 } 479 480 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 481 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 482 } else 483 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 484 485 if(ht_aggr_last) 486 priv->ampdu_reference++; 487 } 488 (*((u16*)(pdata_tmp+10))) = 0; // clear the field (set by rx_intf_pl_to_m_axis.v) to indicate the packet has been processed 489 loop_count++; 490 #ifndef USE_NEW_RX_INTERRUPT 491 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 492 #endif 493 } 494 495 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 496 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 497 498 // openwifi_rx_interrupt_out: 499 spin_unlock(&priv->lock); 500 return IRQ_HANDLED; 501 } 502 503 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 504 { 505 struct ieee80211_hw *dev = dev_id; 506 struct openwifi_priv *priv = dev->priv; 507 struct openwifi_ring *ring; 508 struct sk_buff *skb; 509 struct ieee80211_tx_info *info; 510 u32 reg_val1, reg_val2, prio, queue_idx, dma_fifo_no_room, num_slot_random, cw, loop_count=0; 511 u16 seq_no, pkt_cnt, blk_ack_ssn, start_idx; 512 u8 nof_retx=-1, last_bd_rd_idx, i; 513 u64 blk_ack_bitmap; 514 // u16 prio_rd_idx_store[64]={0}; 515 bool aggr_flag, tx_fail=false; 516 517 spin_lock(&priv->lock); 518 519 while(1) { // loop all packets that have been sent by FPGA 520 reg_val1 = tx_intf_api->TX_INTF_REG_PKT_INFO1_read(); 521 reg_val2 = tx_intf_api->TX_INTF_REG_PKT_INFO2_read(); 522 blk_ack_bitmap = (tx_intf_api->TX_INTF_REG_PKT_INFO3_read() | ((u64)tx_intf_api->TX_INTF_REG_PKT_INFO4_read())<<32); 523 524 if (reg_val1!=0xFFFFFFFF) { 525 nof_retx = (reg_val1&0xF); 526 last_bd_rd_idx = ((reg_val1>>5)&(NUM_TX_BD-1)); 527 queue_idx = ((reg_val1>>15)&(MAX_NUM_HW_QUEUE-1)); 528 prio = ((reg_val1>>17)&0x3); 529 num_slot_random = ((reg_val1>>19)&0x1FF); 530 //num_slot_random = ((0xFF80000 ®_val1)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 531 cw = ((reg_val1>>28)&0xF); 532 //cw = ((0xF0000000 & reg_val1) >> 28); 533 if(cw > 10) { 534 cw = 10 ; 535 num_slot_random += 512 ; 536 } 537 pkt_cnt = (reg_val2&0x3F); 538 blk_ack_ssn = ((reg_val2>>6)&0xFFF); 539 540 ring = &(priv->tx_ring[prio]); 541 // Wake up Linux queue if FPGA and driver ring have room 542 dma_fifo_no_room = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 543 544 if ( ring->stop_flag == 1 && dma_fifo_no_room < 200 && (NUM_TX_BD-ring->queued_cnt)>=RING_ROOM_THRESHOLD ) { 545 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 546 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room %d queued_cnt %d wr %d rd %d\n", sdr_compatible_str, 547 prio, queue_idx, dma_fifo_no_room, ring->queued_cnt, ring->bd_wr_idx, last_bd_rd_idx); 548 ieee80211_wake_queue(dev, prio); 549 ring->stop_flag = 0; 550 } 551 552 for(i = 1; i <= pkt_cnt; i++) 553 { 554 ring->bd_rd_idx = (last_bd_rd_idx + i - pkt_cnt + 64)%64; 555 ring->queued_cnt--; 556 aggr_flag = ring->bds[ring->bd_rd_idx].aggr_flag; 557 seq_no = ring->bds[ring->bd_rd_idx].seq_no; 558 skb = ring->bds[ring->bd_rd_idx].skb_linked; 559 560 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 561 skb->len, DMA_MEM_TO_DEV); 562 563 if(aggr_flag) 564 { 565 skb_pull(skb, LEN_MPDU_DELIM); 566 //skb_trim(skb, num_byte_pad_skb); 567 } 568 info = IEEE80211_SKB_CB(skb); 569 ieee80211_tx_info_clear_status(info); 570 571 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 572 if(aggr_flag) 573 { 574 start_idx = (seq_no>blk_ack_ssn) ? (seq_no-blk_ack_ssn) : (seq_no+(~blk_ack_ssn)); 575 tx_fail = (((blk_ack_bitmap>>start_idx)&0x1)==0); 576 } 577 else 578 { 579 tx_fail = ((blk_ack_bitmap&0x1)==0); 580 } 581 582 if (tx_fail == false) 583 info->flags |= IEEE80211_TX_STAT_ACK; 584 585 if ((pkt_cnt > 1) && (info->flags & IEEE80211_TX_CTL_AMPDU)) 586 { 587 info->flags |= IEEE80211_TX_STAT_AMPDU; 588 info->status.ampdu_len = 1; 589 info->status.ampdu_ack_len = (tx_fail == true) ? 0 : 1; 590 } 591 else 592 { 593 info->flags &= (~IEEE80211_TX_CTL_AMPDU); 594 } 595 596 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 597 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 598 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 599 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 600 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 601 } 602 603 info->status.rates[0].count = nof_retx + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 604 info->status.rates[1].idx = -1; 605 info->status.rates[2].idx = -1; 606 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 607 608 if ( ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 609 printk("%s openwifi_tx_interrupt: WARNING pkt_no %d/%d tx_result [nof_retx %d pass %d] prio%d wr%d rd%d\n", sdr_compatible_str, i, pkt_cnt, nof_retx+1, !tx_fail, prio, ring->bd_wr_idx, ring->bd_rd_idx); 610 if ( ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK))||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 611 printk("%s openwifi_tx_interrupt: tx_result [nof_retx %d pass %d] prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, nof_retx+1, !tx_fail, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random, cw); 612 613 ieee80211_tx_status_irqsafe(dev, skb); 614 } 615 616 loop_count++; 617 618 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 619 620 } else 621 break; 622 } 623 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 624 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 625 626 spin_unlock(&priv->lock); 627 return IRQ_HANDLED; 628 } 629 630 u32 crc_table[16] = {0x4DBDF21C, 0x500AE278, 0x76D3D2D4, 0x6B64C2B0, 0x3B61B38C, 0x26D6A3E8, 0x000F9344, 0x1DB88320, 0xA005713C, 0xBDB26158, 0x9B6B51F4, 0x86DC4190, 0xD6D930AC, 0xCB6E20C8, 0xEDB71064, 0xF0000000}; 631 u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes) 632 { 633 u32 i, crc = 0; 634 u8 idx; 635 for( i = 0; i < num_bytes; i++) 636 { 637 idx = (crc & 0x0F) ^ (data_in[i] & 0x0F); 638 crc = (crc >> 4) ^ crc_table[idx]; 639 640 idx = (crc & 0x0F) ^ ((data_in[i] >> 4) & 0x0F); 641 crc = (crc >> 4) ^ crc_table[idx]; 642 } 643 644 return crc; 645 } 646 647 u8 gen_mpdu_delim_crc(u16 m) 648 { 649 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, mpdu_delim_crc; 650 651 for (i = 0; i < 16; i++) 652 { 653 temp = c[7] ^ ((m >> i) & 0x01); 654 655 c[7] = c[6]; 656 c[6] = c[5]; 657 c[5] = c[4]; 658 c[4] = c[3]; 659 c[3] = c[2]; 660 c[2] = c[1] ^ temp; 661 c[1] = c[0] ^ temp; 662 c[0] = temp; 663 } 664 mpdu_delim_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 665 666 return mpdu_delim_crc; 667 } 668 669 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 670 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 671 { 672 return container_of(led_cdev, struct gpio_led_data, cdev); 673 } 674 675 static void openwifi_tx(struct ieee80211_hw *dev, 676 struct ieee80211_tx_control *control, 677 struct sk_buff *skb) 678 { 679 struct openwifi_priv *priv = dev->priv; 680 unsigned long flags; 681 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 682 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 683 struct openwifi_ring *ring = NULL; 684 dma_addr_t dma_mapping_addr; 685 unsigned int prio=0, i; 686 u32 num_dma_symbol, len_mpdu = 0, len_mpdu_delim_pad = 0, num_dma_byte, len_psdu, num_byte_pad; 687 u32 rate_signal_value,rate_hw_value=0,ack_flag; 688 u32 pkt_need_ack=0, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, tx_config, cts_reg, phy_hdr_config;//, openofdm_state_history; 689 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value=0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 690 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw=0,*dma_buf,retry_limit_hw_value,rc_flags,*qos_hdr; 691 bool use_rts_cts, use_cts_protect=false, ht_aggr_start=false, use_ht_rate=false, use_short_gi=false, use_ht_aggr=false, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 692 __le16 frame_control,duration_id; 693 u32 s_axis_fifo_threshold, dma_fifo_no_room; 694 enum dma_status status; 695 696 static u32 rate_hw_value_prev = -1, pkt_need_ack_prev = -1; 697 static unsigned int prio_prev = -1; 698 static u8 retry_limit_raw_prev = -1; 699 static bool use_short_gi_prev; 700 701 // static bool led_status=0; 702 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 703 704 // if ( (priv->phy_tx_sn&7) ==0 ) { 705 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 706 // if (openofdm_state_history!=openofdm_state_history_old){ 707 // led_status = (~led_status); 708 // openofdm_state_history_old = openofdm_state_history; 709 // gpiod_set_value(led_dat->gpiod, led_status); 710 // } 711 // } 712 713 if (test_mode==1){ 714 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 715 goto openwifi_tx_early_out; 716 } 717 718 if (skb->data_len>0) {// more data are not in linear data area skb->data 719 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 720 goto openwifi_tx_early_out; 721 } 722 723 len_mpdu = skb->len; 724 725 // get Linux priority/queue setting info and target mac address 726 prio = skb_get_queue_mapping(skb); 727 addr1_low32 = *((u32*)(hdr->addr1+2)); 728 ring = &(priv->tx_ring[prio]); 729 730 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 731 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 732 queue_idx = prio; 733 } else {// customized prio to queue_idx mapping 734 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 735 // check current packet belonging to which slice/hw-queue 736 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 737 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 738 break; 739 } 740 } 741 //} 742 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 743 } 744 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 745 // get other info from packet header 746 addr1_high16 = *((u16*)(hdr->addr1)); 747 if (len_mpdu>=20) { 748 addr2_low32 = *((u32*)(hdr->addr2+2)); 749 addr2_high16 = *((u16*)(hdr->addr2)); 750 } 751 if (len_mpdu>=26) { 752 addr3_low32 = *((u32*)(hdr->addr3+2)); 753 addr3_high16 = *((u16*)(hdr->addr3)); 754 } 755 756 duration_id = hdr->duration_id; 757 frame_control=hdr->frame_control; 758 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 759 fc_type = ((frame_control)>>2)&3; 760 fc_subtype = ((frame_control)>>4)&0xf; 761 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 762 //if it is broadcasting or multicasting addr 763 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 764 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 765 (addr1_high16==0x3333) || 766 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 767 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 768 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 769 } else { 770 pkt_need_ack = 0; 771 } 772 773 // get Linux rate (MCS) setting 774 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 775 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 776 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 777 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 778 779 retry_limit_raw = info->control.rates[0].count; 780 781 rc_flags = info->control.rates[0].flags; 782 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 783 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 784 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 785 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 786 use_ht_aggr = ((info->flags&IEEE80211_TX_CTL_AMPDU)!=0); 787 788 if (use_rts_cts) 789 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 790 791 if (use_cts_protect) { 792 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 793 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mpdu,info)); 794 } else if (force_use_cts_protect) { // could override mac80211 setting here. 795 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 796 sifs = (priv->actual_rx_lo<2500?10:16); 797 if (pkt_need_ack) 798 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 799 traffic_pkt_duration = 20 + 4*(((22+len_mpdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 800 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 801 } 802 803 // this is 11b stuff 804 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 805 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 806 807 if (len_mpdu>=28) { 808 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 809 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 810 priv->seqno += 0x10; 811 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 812 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 813 } 814 sc = hdr->seq_ctrl; 815 } 816 817 if ( ( (!addr_flag)||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 818 printk("%s openwifi_tx: %4dbytes ht%d aggr%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 819 len_mpdu, (use_ht_rate == false ? 0 : 1), (use_ht_aggr == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 820 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 821 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 822 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 823 ring->bd_wr_idx,ring->bd_rd_idx); 824 825 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 826 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 827 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 828 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 829 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 830 831 // -----------end of preprocess some info from header and skb---------------- 832 833 // /* HW will perform RTS-CTS when only RTS flags is set. 834 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 835 // * RTS rate and RTS duration will be used also for CTS-to-self. 836 // */ 837 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 838 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 839 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 840 // len_mpdu, info); 841 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 842 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 843 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 844 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 845 // len_mpdu, info); 846 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 847 // } 848 849 if(use_ht_aggr) 850 { 851 qos_hdr = ieee80211_get_qos_ctl(hdr); 852 if(ieee80211_is_data_qos(frame_control) == false || qos_hdr[0] != priv->tid) 853 { 854 printk("%s openwifi_tx: WARNING packet is either not qos or tid %u does not match registered tid %u\n", sdr_compatible_str, qos_hdr[0], priv->tid); 855 goto openwifi_tx_early_out; 856 } 857 858 // psdu = [ MPDU DEL | MPDU | CRC | MPDU padding ] 859 len_mpdu_delim_pad = ((len_mpdu + LEN_PHY_CRC)%4 == 0) ? 0 :(4 - (len_mpdu + LEN_PHY_CRC)%4); 860 len_psdu = LEN_MPDU_DELIM + len_mpdu + LEN_PHY_CRC + len_mpdu_delim_pad; 861 862 if( (rate_hw_value != rate_hw_value_prev) || (use_short_gi != use_short_gi_prev) || (prio != prio_prev) || (retry_limit_raw != retry_limit_raw_prev) || (pkt_need_ack != pkt_need_ack_prev) ) 863 { 864 rate_hw_value_prev = rate_hw_value; 865 use_short_gi_prev = use_short_gi; 866 prio_prev = prio; 867 retry_limit_raw_prev = retry_limit_raw; 868 pkt_need_ack_prev = pkt_need_ack; 869 870 ht_aggr_start = true; 871 } 872 } 873 else 874 { 875 // psdu = [ MPDU ] 876 len_psdu = len_mpdu; 877 878 //use_short_gi_prev = false; 879 rate_hw_value_prev = -1; 880 prio_prev = -1; 881 retry_limit_raw_prev = -1; 882 pkt_need_ack_prev = -1; 883 } 884 num_dma_symbol = (len_psdu>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_psdu&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 885 886 // check whether the packet is bigger than DMA buffer size 887 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 888 if (num_dma_byte > TX_BD_BUF_SIZE) { 889 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 890 goto openwifi_tx_early_out; 891 } 892 893 // Copy MPDU delimiter and padding into sk_buff 894 if(use_ht_aggr) 895 { 896 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 897 if (skb_headroom(skb)<LEN_MPDU_DELIM) { 898 struct sk_buff *skb_new; // in case original skb headroom is not enough to host MPDU delimiter 899 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_MPDU_DELIM\n", sdr_compatible_str, ring->bd_wr_idx); 900 if ((skb_new = skb_realloc_headroom(skb, LEN_MPDU_DELIM)) == NULL) { 901 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 902 goto openwifi_tx_early_out; 903 } 904 if (skb->sk != NULL) 905 skb_set_owner_w(skb_new, skb->sk); 906 dev_kfree_skb(skb); 907 skb = skb_new; 908 } 909 skb_push( skb, LEN_MPDU_DELIM ); 910 dma_buf = skb->data; 911 912 // fill in MPDU delimiter 913 *((u16*)(dma_buf+0)) = ((u16)(len_mpdu+LEN_PHY_CRC) << 4) & 0xFFF0; 914 *((u8 *)(dma_buf+2)) = gen_mpdu_delim_crc(*((u16 *)dma_buf)); 915 *((u8 *)(dma_buf+3)) = 0x4e; 916 917 // Extend sk_buff to hold CRC + MPDU padding + empty MPDU delimiter 918 num_byte_pad = num_dma_byte - (LEN_MPDU_DELIM + len_mpdu); 919 if (skb_tailroom(skb)<num_byte_pad) { 920 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 921 // skb_pull(skb, LEN_PHY_HEADER); 922 goto openwifi_tx_early_out; 923 } 924 skb_put( skb, num_byte_pad ); 925 926 // fill in MPDU CRC 927 *((u32*)(dma_buf+LEN_MPDU_DELIM+len_mpdu)) = gen_mpdu_crc(dma_buf+LEN_MPDU_DELIM, len_mpdu); 928 929 // fill in MPDU delimiter padding 930 memset(dma_buf+LEN_MPDU_DELIM+len_mpdu+LEN_PHY_CRC, 0, len_mpdu_delim_pad); 931 932 // num_dma_byte is on 8-byte boundary and len_psdu is on 4 byte boundary. 933 // If they have different lengths, add "empty MPDU delimiter" for alignment 934 if(num_dma_byte == len_psdu + 4) 935 { 936 *((u32*)(dma_buf+len_psdu)) = 0x4e140000; 937 len_psdu = num_dma_byte; 938 } 939 } 940 else 941 { 942 dma_buf = skb->data; 943 } 944 // for(i = 0; i <= num_dma_symbol; i++) 945 // printk("%16llx\n", (*(u64*)(&(dma_buf[i*8])))); 946 947 rate_signal_value = (use_ht_rate ? rate_hw_value : wifi_mcs_table_11b_force_up[rate_hw_value]); 948 949 retry_limit_hw_value = ( retry_limit_raw==0?0:((retry_limit_raw - 1)&0xF) ); 950 951 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 952 cts_reg = ((use_cts_protect|force_use_cts_protect)<<31 | cts_use_traffic_rate<<30 | cts_duration<<8 | cts_rate_signal_value<<4 | rate_signal_value); 953 tx_config = ( prio<<26 | ring->bd_wr_idx<<20 | queue_idx<<18 | retry_limit_hw_value<<14 | pkt_need_ack<<13 | (len_mpdu+LEN_PHY_CRC) ); 954 phy_hdr_config = ( ht_aggr_start<<20 | rate_hw_value<<16 | use_ht_rate<<15 | use_short_gi<<14 | use_ht_aggr<<13 | len_psdu ); 955 956 /* We must be sure that tx_flags is written last because the HW 957 * looks at it to check if the rest of data is valid or not 958 */ 959 //wmb(); 960 // entry->flags = cpu_to_le32(tx_flags); 961 /* We must be sure this has been written before following HW 962 * register write, because this write will make the HW attempts 963 * to DMA the just-written data 964 */ 965 //wmb(); 966 967 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 968 969 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 970 s_axis_fifo_threshold = (priv->fpga_type == LARGE_FPGA) ? (8192-200) : (4096-200); // MAX_NUM_DMA_SYMBOL: LARGE_FPGA = 8192 and SMALL_FPGA = 4096 971 dma_fifo_no_room = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 972 if ( (dma_fifo_no_room > s_axis_fifo_threshold) || ((NUM_TX_BD-ring->queued_cnt)<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 973 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 974 // printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room %d queued_cnt %d request %d wr %d rd %d\n", sdr_compatible_str, 975 // prio, queue_idx, dma_fifo_no_room, ring->queued_cnt, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 976 ring->stop_flag = 1; 977 //goto openwifi_tx_early_out_after_lock; 978 } 979 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 980 981 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 982 if (status!=DMA_COMPLETE) { 983 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 984 goto openwifi_tx_early_out_after_lock; 985 } 986 987 //-------------------------fire skb DMA to hardware---------------------------------- 988 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 989 num_dma_byte, DMA_MEM_TO_DEV); 990 991 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 992 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 993 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 994 goto openwifi_tx_early_out_after_lock; 995 } 996 997 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 998 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 999 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 1000 1001 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 1002 tx_intf_api->TX_INTF_REG_TX_CONFIG_write(tx_config); 1003 tx_intf_api->TX_INTF_REG_PHY_HDR_CONFIG_write(phy_hdr_config); 1004 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 1005 if (!(priv->txd)) { 1006 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 1007 goto openwifi_tx_after_dma_mapping; 1008 } 1009 1010 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 1011 1012 if (dma_submit_error(priv->tx_cookie)) { 1013 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 1014 goto openwifi_tx_after_dma_mapping; 1015 } 1016 1017 // seems everything is ok. let's mark this pkt in bd descriptor ring 1018 ring->bds[ring->bd_wr_idx].aggr_flag = use_ht_aggr; 1019 ring->bds[ring->bd_wr_idx].seq_no = (sc&IEEE80211_SCTL_SEQ)>>4; 1020 ring->bds[ring->bd_wr_idx].skb_linked = skb; 1021 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 1022 1023 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 1024 ring->queued_cnt++; 1025 1026 dma_async_issue_pending(priv->tx_chan); 1027 1028 spin_unlock_irqrestore(&priv->lock, flags); 1029 1030 return; 1031 1032 openwifi_tx_after_dma_mapping: 1033 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 1034 1035 openwifi_tx_early_out_after_lock: 1036 dev_kfree_skb(skb); 1037 spin_unlock_irqrestore(&priv->lock, flags); 1038 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 1039 return; 1040 1041 openwifi_tx_early_out: 1042 dev_kfree_skb(skb); 1043 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 1044 } 1045 1046 static int openwifi_start(struct ieee80211_hw *dev) 1047 { 1048 struct openwifi_priv *priv = dev->priv; 1049 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 1050 u32 reg; 1051 1052 for (i=0; i<MAX_NUM_VIF; i++) { 1053 priv->vif[i] = NULL; 1054 } 1055 1056 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 1057 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 1058 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 1059 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 1060 1061 //turn on radio 1062 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 1063 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1064 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1065 } else { 1066 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 1067 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1068 } 1069 if (reg == AD9361_RADIO_ON_TX_ATT) { 1070 priv->rfkill_off = 1;// 0 off, 1 on 1071 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 1072 } 1073 else 1074 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 1075 1076 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1077 priv->ctrl_out.index=0x16; 1078 else 1079 priv->ctrl_out.index=0x17; 1080 1081 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1082 if (ret < 0) { 1083 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 1084 } else { 1085 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1086 } 1087 1088 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1089 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1090 1091 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 1092 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8); 1093 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 1094 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 1095 xpu_api->hw_init(priv->xpu_cfg); 1096 1097 agc_gain_delay = 50; //samples 1098 rssi_half_db_offset = 150; // to be consistent 1099 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 1100 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 1101 1102 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1103 // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 1104 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1105 xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1106 1107 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1108 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1109 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1110 1111 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1112 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1113 1114 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1115 1116 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1117 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1118 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1119 1120 // setup time schedule of 4 slices 1121 // slice 0 1122 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1123 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1124 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1125 1126 // slice 1 1127 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1128 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1129 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1130 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1131 1132 // slice 2 1133 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1134 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1135 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1136 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1137 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1138 1139 // slice 3 1140 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1141 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1142 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1143 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1144 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1145 1146 // all slice sync rest 1147 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1148 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1149 1150 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1151 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1152 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1153 1154 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1155 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1156 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1157 1158 if (test_mode==1) { 1159 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1160 goto normal_out; 1161 } 1162 1163 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1164 if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) { 1165 ret = PTR_ERR(priv->rx_chan); 1166 pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan); 1167 goto err_dma; 1168 } 1169 1170 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1171 if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) { 1172 ret = PTR_ERR(priv->tx_chan); 1173 pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan); 1174 goto err_dma; 1175 } 1176 printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan); 1177 1178 ret = openwifi_init_rx_ring(priv); 1179 if (ret) { 1180 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1181 goto err_free_rings; 1182 } 1183 1184 priv->seqno=0; 1185 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1186 if ((ret = openwifi_init_tx_ring(priv, i))) { 1187 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1188 goto err_free_rings; 1189 } 1190 } 1191 1192 if ( (ret = rx_dma_setup(dev)) ) { 1193 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1194 goto err_free_rings; 1195 } 1196 1197 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1198 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1199 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1200 if (ret) { 1201 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1202 goto err_free_rings; 1203 } else { 1204 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1205 } 1206 1207 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1208 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1209 IRQF_SHARED, "sdr,tx_itrpt", dev); 1210 if (ret) { 1211 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1212 goto err_free_rings; 1213 } else { 1214 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1215 } 1216 1217 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1218 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1219 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1220 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1221 1222 //ieee80211_wake_queue(dev, 0); 1223 1224 normal_out: 1225 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1226 return 0; 1227 1228 err_free_rings: 1229 openwifi_free_rx_ring(priv); 1230 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1231 openwifi_free_tx_ring(priv, i); 1232 1233 err_dma: 1234 ret = -1; 1235 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1236 return ret; 1237 } 1238 1239 static void openwifi_stop(struct ieee80211_hw *dev) 1240 { 1241 struct openwifi_priv *priv = dev->priv; 1242 u32 reg, reg1; 1243 int i; 1244 1245 if (test_mode==1){ 1246 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1247 goto normal_out; 1248 } 1249 1250 //turn off radio 1251 #if 1 1252 ad9361_tx_mute(priv->ad9361_phy, 1); 1253 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1254 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1255 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1256 priv->rfkill_off = 0;// 0 off, 1 on 1257 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1258 } 1259 else 1260 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1261 #endif 1262 1263 //ieee80211_stop_queue(dev, 0); 1264 1265 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1266 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1267 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1268 1269 for (i=0; i<MAX_NUM_VIF; i++) { 1270 priv->vif[i] = NULL; 1271 } 1272 1273 openwifi_free_rx_ring(priv); 1274 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1275 openwifi_free_tx_ring(priv, i); 1276 1277 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1278 dmaengine_terminate_all(priv->rx_chan); 1279 dma_release_channel(priv->rx_chan); 1280 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1281 dmaengine_terminate_all(priv->tx_chan); 1282 dma_release_channel(priv->tx_chan); 1283 1284 //priv->rf->stop(dev); 1285 1286 free_irq(priv->irq_rx, dev); 1287 free_irq(priv->irq_tx, dev); 1288 1289 normal_out: 1290 printk("%s openwifi_stop\n", sdr_compatible_str); 1291 } 1292 1293 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1294 struct ieee80211_vif *vif) 1295 { 1296 u32 tsft_low, tsft_high; 1297 1298 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1299 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1300 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1301 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1302 } 1303 1304 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1305 { 1306 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1307 u32 tsft_low = (tsf&0xffffffff); 1308 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1309 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1310 } 1311 1312 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1313 { 1314 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1315 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1316 } 1317 1318 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1319 { 1320 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1321 return(0); 1322 } 1323 1324 static void openwifi_beacon_work(struct work_struct *work) 1325 { 1326 struct openwifi_vif *vif_priv = 1327 container_of(work, struct openwifi_vif, beacon_work.work); 1328 struct ieee80211_vif *vif = 1329 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1330 struct ieee80211_hw *dev = vif_priv->dev; 1331 struct ieee80211_mgmt *mgmt; 1332 struct sk_buff *skb; 1333 1334 /* don't overflow the tx ring */ 1335 if (ieee80211_queue_stopped(dev, 0)) 1336 goto resched; 1337 1338 /* grab a fresh beacon */ 1339 skb = ieee80211_beacon_get(dev, vif); 1340 if (!skb) 1341 goto resched; 1342 1343 /* 1344 * update beacon timestamp w/ TSF value 1345 * TODO: make hardware update beacon timestamp 1346 */ 1347 mgmt = (struct ieee80211_mgmt *)skb->data; 1348 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1349 1350 /* TODO: use actual beacon queue */ 1351 skb_set_queue_mapping(skb, 0); 1352 openwifi_tx(dev, NULL, skb); 1353 1354 resched: 1355 /* 1356 * schedule next beacon 1357 * TODO: use hardware support for beacon timing 1358 */ 1359 schedule_delayed_work(&vif_priv->beacon_work, 1360 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1361 } 1362 1363 static int openwifi_add_interface(struct ieee80211_hw *dev, 1364 struct ieee80211_vif *vif) 1365 { 1366 int i; 1367 struct openwifi_priv *priv = dev->priv; 1368 struct openwifi_vif *vif_priv; 1369 1370 switch (vif->type) { 1371 case NL80211_IFTYPE_AP: 1372 case NL80211_IFTYPE_STATION: 1373 case NL80211_IFTYPE_ADHOC: 1374 case NL80211_IFTYPE_MONITOR: 1375 case NL80211_IFTYPE_MESH_POINT: 1376 break; 1377 default: 1378 return -EOPNOTSUPP; 1379 } 1380 // let's support more than 1 interface 1381 for (i=0; i<MAX_NUM_VIF; i++) { 1382 if (priv->vif[i] == NULL) 1383 break; 1384 } 1385 1386 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1387 1388 if (i==MAX_NUM_VIF) 1389 return -EBUSY; 1390 1391 priv->vif[i] = vif; 1392 1393 /* Initialize driver private area */ 1394 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1395 vif_priv->idx = i; 1396 1397 vif_priv->dev = dev; 1398 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1399 vif_priv->enable_beacon = false; 1400 1401 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1402 1403 return 0; 1404 } 1405 1406 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1407 struct ieee80211_vif *vif) 1408 { 1409 struct openwifi_vif *vif_priv; 1410 struct openwifi_priv *priv = dev->priv; 1411 1412 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1413 priv->vif[vif_priv->idx] = NULL; 1414 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1415 } 1416 1417 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1418 { 1419 struct openwifi_priv *priv = dev->priv; 1420 struct ieee80211_conf *conf = &dev->conf; 1421 1422 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1423 priv->rf->set_chan(dev, conf); 1424 else 1425 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1426 1427 return 0; 1428 } 1429 1430 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1431 struct ieee80211_vif *vif, 1432 struct ieee80211_bss_conf *info, 1433 u32 changed) 1434 { 1435 struct openwifi_priv *priv = dev->priv; 1436 struct openwifi_vif *vif_priv; 1437 u32 bssid_low, bssid_high; 1438 1439 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1440 1441 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1442 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1443 if (changed & BSS_CHANGED_BSSID) { 1444 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1445 // write new bssid to our HW, and do not change bssid filter 1446 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1447 bssid_low = ( *( (u32*)(info->bssid) ) ); 1448 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1449 1450 //bssid_filter_high = (bssid_filter_high&0x80000000); 1451 //bssid_high = (bssid_high|bssid_filter_high); 1452 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1453 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1454 } 1455 1456 if (changed & BSS_CHANGED_BEACON_INT) { 1457 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1458 } 1459 1460 if (changed & BSS_CHANGED_TXPOWER) 1461 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1462 1463 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1464 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1465 1466 if (changed & BSS_CHANGED_BASIC_RATES) 1467 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1468 1469 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1470 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1471 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1472 if (info->use_short_slot && priv->use_short_slot==false) { 1473 priv->use_short_slot=true; 1474 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1475 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1476 priv->use_short_slot=false; 1477 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1478 } 1479 } 1480 1481 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1482 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1483 vif_priv->enable_beacon = info->enable_beacon; 1484 } 1485 1486 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1487 cancel_delayed_work_sync(&vif_priv->beacon_work); 1488 if (vif_priv->enable_beacon) 1489 schedule_work(&vif_priv->beacon_work.work); 1490 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1491 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1492 } 1493 } 1494 // helper function 1495 u32 log2val(u32 val){ 1496 u32 ret_val = 0 ; 1497 while(val>1){ 1498 val = val >> 1 ; 1499 ret_val ++ ; 1500 } 1501 return ret_val ; 1502 } 1503 1504 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1505 const struct ieee80211_tx_queue_params *params) 1506 { 1507 u32 reg_val, cw_min_exp, cw_max_exp; 1508 1509 printk("%s openwifi_conf_tx: [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1510 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1511 1512 reg_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1513 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1514 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1515 switch(queue){ 1516 case 0: reg_val = ( (reg_val & 0xFFFFFF00) | ((cw_min_exp | (cw_max_exp << 4)) << 0) ); break; 1517 case 1: reg_val = ( (reg_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8) ); break; 1518 case 2: reg_val = ( (reg_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16) ); break; 1519 case 3: reg_val = ( (reg_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24) ); break; 1520 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1521 } 1522 xpu_api->XPU_REG_CSMA_CFG_write(reg_val); 1523 return(0); 1524 } 1525 1526 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1527 struct netdev_hw_addr_list *mc_list) 1528 { 1529 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1530 return netdev_hw_addr_list_count(mc_list); 1531 } 1532 1533 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1534 unsigned int changed_flags, 1535 unsigned int *total_flags, 1536 u64 multicast) 1537 { 1538 u32 filter_flag; 1539 1540 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1541 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1542 1543 filter_flag = (*total_flags); 1544 1545 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1546 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1547 1548 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1549 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1550 filter_flag = (filter_flag|MONITOR_ALL); 1551 else 1552 filter_flag = (filter_flag&(~MONITOR_ALL)); 1553 1554 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1555 filter_flag = (filter_flag|MY_BEACON); 1556 1557 filter_flag = (filter_flag|FIF_PSPOLL); 1558 1559 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1560 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1561 1562 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1563 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1564 } 1565 1566 static int openwifi_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_ampdu_params *params) 1567 { 1568 struct ieee80211_sta *sta = params->sta; 1569 enum ieee80211_ampdu_mlme_action action = params->action; 1570 struct openwifi_priv *priv = hw->priv; 1571 u16 max_tx_bytes, buf_size, aggr_dur_us; 1572 u32 ampdu_action_config; 1573 1574 switch (action) 1575 { 1576 case IEEE80211_AMPDU_TX_START: 1577 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1578 break; 1579 case IEEE80211_AMPDU_TX_STOP_CONT: 1580 case IEEE80211_AMPDU_TX_STOP_FLUSH: 1581 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1582 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1583 break; 1584 case IEEE80211_AMPDU_TX_OPERATIONAL: 1585 priv->tid = params->tid; 1586 aggr_dur_us = 100; 1587 buf_size = 4; 1588 // buf_size = (params->buf_size) - 1; 1589 max_tx_bytes = (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + sta->ht_cap.ampdu_factor)) - 1; 1590 ampdu_action_config = ( aggr_dur_us<<21 | buf_size<<16 | max_tx_bytes ); 1591 tx_intf_api->TX_INTF_REG_AMPDU_ACTION_CONFIG_write(ampdu_action_config); 1592 break; 1593 case IEEE80211_AMPDU_RX_START: 1594 xpu_api->XPU_REG_AMPDU_ACTION_write((params->tid & 0x000F)<<1 | 1); 1595 break; 1596 case IEEE80211_AMPDU_RX_STOP: 1597 xpu_api->XPU_REG_AMPDU_ACTION_write((params->tid & 0x000F)<<1 | 0); 1598 break; 1599 default: 1600 return -EOPNOTSUPP; 1601 } 1602 1603 return 0; 1604 } 1605 1606 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1607 { 1608 struct openwifi_priv *priv = hw->priv; 1609 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1610 struct sk_buff *skb; 1611 int err; 1612 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1613 1614 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1615 if (err) 1616 return err; 1617 1618 if (!tb[OPENWIFI_ATTR_CMD]) 1619 return -EINVAL; 1620 1621 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1622 case OPENWIFI_CMD_SET_GAP: 1623 if (!tb[OPENWIFI_ATTR_GAP]) 1624 return -EINVAL; 1625 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1626 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1627 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1628 return 0; 1629 case OPENWIFI_CMD_GET_GAP: 1630 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1631 if (!skb) 1632 return -ENOMEM; 1633 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1634 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1635 goto nla_put_failure; 1636 return cfg80211_testmode_reply(skb); 1637 case OPENWIFI_CMD_SET_SLICE_IDX: 1638 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1639 return -EINVAL; 1640 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1641 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1642 if (tmp == MAX_NUM_HW_QUEUE) { 1643 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1644 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1645 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1646 } else { 1647 priv->slice_idx = tmp; 1648 } 1649 return 0; 1650 case OPENWIFI_CMD_GET_SLICE_IDX: 1651 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1652 if (!skb) 1653 return -ENOMEM; 1654 tmp = priv->slice_idx; 1655 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1656 goto nla_put_failure; 1657 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1658 return cfg80211_testmode_reply(skb); 1659 case OPENWIFI_CMD_SET_ADDR: 1660 if (!tb[OPENWIFI_ATTR_ADDR]) 1661 return -EINVAL; 1662 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1663 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1664 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1665 } else { 1666 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1667 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1668 } 1669 return 0; 1670 case OPENWIFI_CMD_GET_ADDR: 1671 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1672 if (!skb) 1673 return -ENOMEM; 1674 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1675 tmp = -1; 1676 } else { 1677 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1678 } 1679 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1680 goto nla_put_failure; 1681 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1682 return cfg80211_testmode_reply(skb); 1683 1684 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1685 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1686 return -EINVAL; 1687 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1688 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1689 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1690 } else { 1691 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1692 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1693 } 1694 return 0; 1695 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1696 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1697 if (!skb) 1698 return -ENOMEM; 1699 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1700 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1701 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1702 goto nla_put_failure; 1703 return cfg80211_testmode_reply(skb); 1704 1705 case OPENWIFI_CMD_SET_SLICE_START: 1706 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1707 return -EINVAL; 1708 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1709 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1710 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1711 } else { 1712 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1713 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1714 } 1715 return 0; 1716 case OPENWIFI_CMD_GET_SLICE_START: 1717 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1718 if (!skb) 1719 return -ENOMEM; 1720 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1721 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1722 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1723 goto nla_put_failure; 1724 return cfg80211_testmode_reply(skb); 1725 1726 case OPENWIFI_CMD_SET_SLICE_END: 1727 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1728 return -EINVAL; 1729 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1730 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1731 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1732 } else { 1733 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1734 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1735 } 1736 return 0; 1737 case OPENWIFI_CMD_GET_SLICE_END: 1738 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1739 if (!skb) 1740 return -ENOMEM; 1741 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1742 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1743 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1744 goto nla_put_failure; 1745 return cfg80211_testmode_reply(skb); 1746 1747 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1748 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1749 // return -EINVAL; 1750 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1751 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1752 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1753 // return 0; 1754 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1755 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1756 // if (!skb) 1757 // return -ENOMEM; 1758 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1759 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1760 // goto nla_put_failure; 1761 // return cfg80211_testmode_reply(skb); 1762 1763 // case OPENWIFI_CMD_SET_SLICE_START1: 1764 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1765 // return -EINVAL; 1766 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1767 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1768 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1769 // return 0; 1770 // case OPENWIFI_CMD_GET_SLICE_START1: 1771 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1772 // if (!skb) 1773 // return -ENOMEM; 1774 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1775 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1776 // goto nla_put_failure; 1777 // return cfg80211_testmode_reply(skb); 1778 1779 // case OPENWIFI_CMD_SET_SLICE_END1: 1780 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1781 // return -EINVAL; 1782 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1783 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1784 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1785 // return 0; 1786 // case OPENWIFI_CMD_GET_SLICE_END1: 1787 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1788 // if (!skb) 1789 // return -ENOMEM; 1790 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1791 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1792 // goto nla_put_failure; 1793 // return cfg80211_testmode_reply(skb); 1794 1795 case OPENWIFI_CMD_SET_RSSI_TH: 1796 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1797 return -EINVAL; 1798 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1799 // printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1800 // xpu_api->XPU_REG_LBT_TH_write(tmp); 1801 // return 0; 1802 printk("%s WARNING Please use command: sdrctl dev sdr0 set reg drv_xpu 0 reg_value! (1~2047, 0 means AUTO)!\n", sdr_compatible_str); 1803 return -EOPNOTSUPP; 1804 case OPENWIFI_CMD_GET_RSSI_TH: 1805 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1806 if (!skb) 1807 return -ENOMEM; 1808 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1809 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1810 goto nla_put_failure; 1811 return cfg80211_testmode_reply(skb); 1812 1813 case OPENWIFI_CMD_SET_TSF: 1814 printk("openwifi_set_tsf_1"); 1815 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1816 return -EINVAL; 1817 printk("openwifi_set_tsf_2"); 1818 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1819 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1820 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1821 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1822 return 0; 1823 1824 case REG_CMD_SET: 1825 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1826 return -EINVAL; 1827 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1828 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1829 reg_cat = ((reg_addr>>16)&0xFFFF); 1830 reg_addr = (reg_addr&0xFFFF); 1831 reg_addr_idx = (reg_addr>>2); 1832 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1833 if (reg_cat==1) 1834 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1835 else if (reg_cat==2) 1836 rx_intf_api->reg_write(reg_addr,reg_val); 1837 else if (reg_cat==3) 1838 tx_intf_api->reg_write(reg_addr,reg_val); 1839 else if (reg_cat==4) 1840 openofdm_rx_api->reg_write(reg_addr,reg_val); 1841 else if (reg_cat==5) 1842 openofdm_tx_api->reg_write(reg_addr,reg_val); 1843 else if (reg_cat==6) 1844 xpu_api->reg_write(reg_addr,reg_val); 1845 else if (reg_cat==7) { 1846 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1847 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1848 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1849 if (reg_val==0) 1850 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1851 else 1852 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1853 1854 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1855 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1856 } 1857 } else 1858 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1859 } 1860 else if (reg_cat==8) { 1861 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1862 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1863 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1864 if (reg_val==0) { 1865 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1866 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1867 } else { 1868 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1869 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1870 } 1871 1872 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1873 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1874 } 1875 } else 1876 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1877 } 1878 else if (reg_cat==9) { 1879 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1880 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1881 if (reg_addr_idx==DRV_XPU_REG_IDX_LBT_TH) { 1882 if (reg_val) { 1883 xpu_api->XPU_REG_LBT_TH_write(reg_val); 1884 printk("%s override FPGA LBT threshold to %d. The last_auto_fpga_lbt_th %d\n", sdr_compatible_str, reg_val, priv->last_auto_fpga_lbt_th); 1885 } else { 1886 xpu_api->XPU_REG_LBT_TH_write(priv->last_auto_fpga_lbt_th); 1887 printk("%s Restore last_auto_fpga_lbt_th %d to FPGA. ad9361_rf_set_channel will take control\n", sdr_compatible_str, priv->last_auto_fpga_lbt_th); 1888 } 1889 } 1890 } else 1891 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1892 } 1893 else 1894 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1895 1896 return 0; 1897 case REG_CMD_GET: 1898 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1899 if (!skb) 1900 return -ENOMEM; 1901 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1902 reg_cat = ((reg_addr>>16)&0xFFFF); 1903 reg_addr = (reg_addr&0xFFFF); 1904 reg_addr_idx = (reg_addr>>2); 1905 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1906 if (reg_cat==1) { 1907 printk("%s WARNING reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1908 tmp = 0xFFFFFFFF; 1909 } 1910 else if (reg_cat==2) 1911 tmp = rx_intf_api->reg_read(reg_addr); 1912 else if (reg_cat==3) 1913 tmp = tx_intf_api->reg_read(reg_addr); 1914 else if (reg_cat==4) 1915 tmp = openofdm_rx_api->reg_read(reg_addr); 1916 else if (reg_cat==5) 1917 tmp = openofdm_tx_api->reg_read(reg_addr); 1918 else if (reg_cat==6) 1919 tmp = xpu_api->reg_read(reg_addr); 1920 else if (reg_cat==7) { 1921 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1922 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1923 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1924 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1925 1926 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1927 priv->drv_rx_reg_val[reg_addr_idx]=0; 1928 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1929 priv->drv_rx_reg_val[reg_addr_idx]=1; 1930 } 1931 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1932 } else 1933 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1934 } 1935 else if (reg_cat==8) { 1936 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1937 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1938 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1939 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1940 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1941 priv->drv_tx_reg_val[reg_addr_idx]=0; 1942 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1943 priv->drv_tx_reg_val[reg_addr_idx]=1; 1944 } 1945 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1946 } else 1947 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1948 } 1949 else if (reg_cat==9) { 1950 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1951 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1952 else 1953 printk("%s WARNING reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1954 } 1955 else 1956 printk("%s WARNING reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1957 1958 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1959 goto nla_put_failure; 1960 return cfg80211_testmode_reply(skb); 1961 1962 default: 1963 return -EOPNOTSUPP; 1964 } 1965 1966 nla_put_failure: 1967 dev_kfree_skb(skb); 1968 return -ENOBUFS; 1969 } 1970 1971 static const struct ieee80211_ops openwifi_ops = { 1972 .tx = openwifi_tx, 1973 .start = openwifi_start, 1974 .stop = openwifi_stop, 1975 .add_interface = openwifi_add_interface, 1976 .remove_interface = openwifi_remove_interface, 1977 .config = openwifi_config, 1978 .bss_info_changed = openwifi_bss_info_changed, 1979 .conf_tx = openwifi_conf_tx, 1980 .prepare_multicast = openwifi_prepare_multicast, 1981 .configure_filter = openwifi_configure_filter, 1982 .rfkill_poll = openwifi_rfkill_poll, 1983 .get_tsf = openwifi_get_tsf, 1984 .set_tsf = openwifi_set_tsf, 1985 .reset_tsf = openwifi_reset_tsf, 1986 .set_rts_threshold = openwifi_set_rts_threshold, 1987 .ampdu_action = openwifi_ampdu_action, 1988 .testmode_cmd = openwifi_testmode_cmd, 1989 }; 1990 1991 static const struct of_device_id openwifi_dev_of_ids[] = { 1992 { .compatible = "sdr,sdr", }, 1993 {} 1994 }; 1995 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1996 1997 static int custom_match_spi_dev(struct device *dev, void *data) 1998 { 1999 const char *name = data; 2000 2001 bool ret = sysfs_streq(name, dev->of_node->name); 2002 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 2003 return ret; 2004 } 2005 2006 static int custom_match_platform_dev(struct device *dev, void *data) 2007 { 2008 struct platform_device *plat_dev = to_platform_device(dev); 2009 const char *name = data; 2010 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 2011 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 2012 2013 if (match_flag) { 2014 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 2015 } 2016 return(match_flag); 2017 } 2018 2019 static int openwifi_dev_probe(struct platform_device *pdev) 2020 { 2021 struct ieee80211_hw *dev; 2022 struct openwifi_priv *priv; 2023 int err=1, rand_val; 2024 const char *chip_name, *fpga_model; 2025 u32 reg;//, reg1; 2026 2027 struct device_node *np = pdev->dev.of_node; 2028 2029 struct device *tmp_dev; 2030 struct platform_device *tmp_pdev; 2031 struct iio_dev *tmp_indio_dev; 2032 // struct gpio_leds_priv *tmp_led_priv; 2033 2034 printk("\n"); 2035 2036 if (np) { 2037 const struct of_device_id *match; 2038 2039 match = of_match_node(openwifi_dev_of_ids, np); 2040 if (match) { 2041 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 2042 err = 0; 2043 } 2044 } 2045 2046 if (err) 2047 return err; 2048 2049 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 2050 if (!dev) { 2051 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 2052 err = -ENOMEM; 2053 goto err_free_dev; 2054 } 2055 2056 priv = dev->priv; 2057 priv->pdev = pdev; 2058 2059 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 2060 if(err < 0) { 2061 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 2062 priv->fpga_type = SMALL_FPGA; 2063 } else { 2064 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 2065 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 2066 priv->fpga_type = LARGE_FPGA; 2067 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 2068 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 2069 priv->fpga_type = SMALL_FPGA; 2070 } 2071 2072 // //-------------find ad9361-phy driver for lo/channel control--------------- 2073 priv->actual_rx_lo = 0; 2074 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 2075 if (tmp_dev == NULL) { 2076 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 2077 err = -ENOMEM; 2078 goto err_free_dev; 2079 } 2080 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 2081 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 2082 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 2083 err = -ENOMEM; 2084 goto err_free_dev; 2085 } 2086 2087 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 2088 if (!(priv->ad9361_phy)) { 2089 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 2090 err = -ENOMEM; 2091 goto err_free_dev; 2092 } 2093 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 2094 2095 priv->ctrl_out.en_mask=0xFF; 2096 priv->ctrl_out.index=0x16; 2097 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 2098 if (err < 0) { 2099 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 2100 } else { 2101 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 2102 } 2103 2104 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 2105 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 2106 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 2107 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 2108 2109 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 2110 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 2111 if (!tmp_dev) { 2112 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 2113 err = -ENOMEM; 2114 goto err_free_dev; 2115 } 2116 2117 tmp_pdev = to_platform_device(tmp_dev); 2118 if (!tmp_pdev) { 2119 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 2120 err = -ENOMEM; 2121 goto err_free_dev; 2122 } 2123 2124 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 2125 if (!tmp_indio_dev) { 2126 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 2127 err = -ENOMEM; 2128 goto err_free_dev; 2129 } 2130 2131 priv->dds_st = iio_priv(tmp_indio_dev); 2132 if (!(priv->dds_st)) { 2133 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 2134 err = -ENOMEM; 2135 goto err_free_dev; 2136 } 2137 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 2138 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 2139 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 2140 2141 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 2142 // turn off radio by muting tx 2143 // ad9361_tx_mute(priv->ad9361_phy, 1); 2144 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2145 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2146 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2147 // priv->rfkill_off = 0;// 0 off, 1 on 2148 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2149 // } 2150 // else 2151 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2152 2153 priv->last_auto_fpga_lbt_th = 134;//just to avoid uninitialized 2154 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2155 2156 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2157 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2158 2159 priv->xpu_cfg = XPU_NORMAL; 2160 2161 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2162 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2163 2164 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2165 if (priv->rf_bw == 20000000) { 2166 priv->rx_intf_cfg = RX_INTF_BYPASS; 2167 priv->tx_intf_cfg = TX_INTF_BYPASS; 2168 //priv->rx_freq_offset_to_lo_MHz = 0; 2169 //priv->tx_freq_offset_to_lo_MHz = 0; 2170 } else if (priv->rf_bw == 40000000) { 2171 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2172 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2173 2174 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2175 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2176 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2177 // // try another antenna option 2178 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2179 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2180 2181 #if 0 2182 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2183 priv->rx_freq_offset_to_lo_MHz = -10; 2184 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2185 priv->rx_freq_offset_to_lo_MHz = 10; 2186 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2187 priv->rx_freq_offset_to_lo_MHz = 0; 2188 } else { 2189 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2190 } 2191 #endif 2192 } else { 2193 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2194 } 2195 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2196 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2197 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2198 2199 //let's by default turn radio on when probing 2200 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2201 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2202 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2203 } else { 2204 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2205 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2206 } 2207 if (reg == AD9361_RADIO_ON_TX_ATT) { 2208 priv->rfkill_off = 1;// 0 off, 1 on 2209 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2210 } else 2211 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2212 2213 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2214 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2215 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2216 2217 // //set ad9361 in certain mode 2218 #if 0 2219 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2220 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2221 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2222 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2223 2224 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2225 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8); 2226 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2227 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2228 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2229 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2230 #endif 2231 2232 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2233 2234 SET_IEEE80211_DEV(dev, &pdev->dev); 2235 platform_set_drvdata(pdev, dev); 2236 2237 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2238 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2239 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2240 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2241 2242 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2243 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2244 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2245 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2246 2247 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2248 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2249 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2250 priv->ampdu_reference = 0; 2251 2252 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2253 priv->band_2GHz.channels = priv->channels_2GHz; 2254 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2255 priv->band_2GHz.bitrates = priv->rates_2GHz; 2256 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2257 priv->band_2GHz.ht_cap.ht_supported = true; 2258 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2259 priv->band_2GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2260 priv->band_2GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2261 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2262 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2263 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2264 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2265 2266 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2267 priv->band_5GHz.channels = priv->channels_5GHz; 2268 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2269 priv->band_5GHz.bitrates = priv->rates_5GHz; 2270 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2271 priv->band_5GHz.ht_cap.ht_supported = true; 2272 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2273 priv->band_5GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2274 priv->band_5GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2275 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2276 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2277 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2278 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2279 2280 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2281 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2282 2283 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2284 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2285 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2286 ieee80211_hw_set(dev, AMPDU_AGGREGATION); 2287 2288 dev->vif_data_size = sizeof(struct openwifi_vif); 2289 dev->wiphy->interface_modes = 2290 BIT(NL80211_IFTYPE_MONITOR)| 2291 BIT(NL80211_IFTYPE_P2P_GO) | 2292 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2293 BIT(NL80211_IFTYPE_AP) | 2294 BIT(NL80211_IFTYPE_STATION) | 2295 BIT(NL80211_IFTYPE_ADHOC) | 2296 BIT(NL80211_IFTYPE_MESH_POINT) | 2297 BIT(NL80211_IFTYPE_OCB); 2298 dev->wiphy->iface_combinations = &openwifi_if_comb; 2299 dev->wiphy->n_iface_combinations = 1; 2300 2301 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2302 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2303 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2304 2305 chip_name = "ZYNQ"; 2306 2307 /* we declare to MAC80211 all the queues except for beacon queue 2308 * that will be eventually handled by DRV. 2309 * TX rings are arranged in such a way that lower is the IDX, 2310 * higher is the priority, in order to achieve direct mapping 2311 * with mac80211, however the beacon queue is an exception and it 2312 * is mapped on the highst tx ring IDX. 2313 */ 2314 dev->queues = MAX_NUM_HW_QUEUE; 2315 //dev->queues = 1; 2316 2317 ieee80211_hw_set(dev, SIGNAL_DBM); 2318 2319 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2320 2321 priv->rf = &ad9361_rf_ops; 2322 2323 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2324 priv->slice_idx = 0xFFFFFFFF; 2325 2326 sg_init_table(&(priv->tx_sg), 1); 2327 2328 get_random_bytes(&rand_val, sizeof(rand_val)); 2329 rand_val%=250; 2330 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2331 priv->mac_addr[5]=rand_val+1; 2332 //priv->mac_addr[5]=0x11; 2333 if (!is_valid_ether_addr(priv->mac_addr)) { 2334 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2335 eth_random_addr(priv->mac_addr); 2336 } else { 2337 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2338 } 2339 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2340 2341 spin_lock_init(&priv->lock); 2342 2343 err = ieee80211_register_hw(dev); 2344 if (err) { 2345 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2346 goto err_free_dev; 2347 } else { 2348 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2349 } 2350 2351 // // //--------------------hook leds (not complete yet)-------------------------------- 2352 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 2353 // if (!tmp_dev) { 2354 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2355 // err = -ENOMEM; 2356 // goto err_free_dev; 2357 // } 2358 2359 // tmp_pdev = to_platform_device(tmp_dev); 2360 // if (!tmp_pdev) { 2361 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2362 // err = -ENOMEM; 2363 // goto err_free_dev; 2364 // } 2365 2366 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2367 // if (!tmp_led_priv) { 2368 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2369 // err = -ENOMEM; 2370 // goto err_free_dev; 2371 // } 2372 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2373 // if (tmp_led_priv->num_leds!=4){ 2374 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2375 // err = -ENOMEM; 2376 // goto err_free_dev; 2377 // } 2378 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2379 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2380 // priv->num_led = tmp_led_priv->num_leds; 2381 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2382 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2383 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2384 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2385 2386 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2387 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2388 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2389 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2390 2391 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2392 priv->mac_addr, chip_name, priv->rf->name); 2393 2394 openwifi_rfkill_init(dev); 2395 return 0; 2396 2397 err_free_dev: 2398 ieee80211_free_hw(dev); 2399 2400 return err; 2401 } 2402 2403 static int openwifi_dev_remove(struct platform_device *pdev) 2404 { 2405 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2406 2407 if (!dev) { 2408 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2409 return(-1); 2410 } 2411 2412 openwifi_rfkill_exit(dev); 2413 ieee80211_unregister_hw(dev); 2414 ieee80211_free_hw(dev); 2415 return(0); 2416 } 2417 2418 static struct platform_driver openwifi_dev_driver = { 2419 .driver = { 2420 .name = "sdr,sdr", 2421 .owner = THIS_MODULE, 2422 .of_match_table = openwifi_dev_of_ids, 2423 }, 2424 .probe = openwifi_dev_probe, 2425 .remove = openwifi_dev_remove, 2426 }; 2427 2428 module_platform_driver(openwifi_dev_driver); 2429