17d0af6dfSXianjun Jiao // Author: Xianjun Jiao, Michael Mehari, Wei Liu, Jetmir Haxhibeqiri, Pablo Avila Campos 27d0af6dfSXianjun Jiao // SPDX-FileCopyrightText: 2022 UGent 3a6085186SLina Ceballos // SPDX-License-Identifier: AGPL-3.0-or-later 42ee67178SXianjun Jiao 52ee67178SXianjun Jiao #include <linux/bitops.h> 62ee67178SXianjun Jiao #include <linux/dmapool.h> 72ee67178SXianjun Jiao #include <linux/io.h> 82ee67178SXianjun Jiao #include <linux/iopoll.h> 92ee67178SXianjun Jiao #include <linux/of_address.h> 102ee67178SXianjun Jiao #include <linux/of_platform.h> 112ee67178SXianjun Jiao #include <linux/of_irq.h> 122ee67178SXianjun Jiao #include <linux/slab.h> 132ee67178SXianjun Jiao #include <linux/clk.h> 142ee67178SXianjun Jiao #include <linux/io-64-nonatomic-lo-hi.h> 152ee67178SXianjun Jiao 162ee67178SXianjun Jiao #include <linux/delay.h> 172ee67178SXianjun Jiao #include <linux/interrupt.h> 182ee67178SXianjun Jiao 192ee67178SXianjun Jiao #include <linux/dmaengine.h> 202ee67178SXianjun Jiao #include <linux/slab.h> 212ee67178SXianjun Jiao #include <linux/delay.h> 222ee67178SXianjun Jiao #include <linux/etherdevice.h> 232ee67178SXianjun Jiao 242ee67178SXianjun Jiao #include <linux/init.h> 252ee67178SXianjun Jiao #include <linux/kthread.h> 262ee67178SXianjun Jiao #include <linux/module.h> 272ee67178SXianjun Jiao #include <linux/of_dma.h> 282ee67178SXianjun Jiao #include <linux/platform_device.h> 292ee67178SXianjun Jiao #include <linux/random.h> 302ee67178SXianjun Jiao #include <linux/slab.h> 312ee67178SXianjun Jiao #include <linux/wait.h> 322ee67178SXianjun Jiao #include <linux/sched/task.h> 332ee67178SXianjun Jiao #include <linux/dma/xilinx_dma.h> 342ee67178SXianjun Jiao #include <linux/spi/spi.h> 352ee67178SXianjun Jiao #include <net/mac80211.h> 362ee67178SXianjun Jiao 372ee67178SXianjun Jiao #include <linux/clk.h> 382ee67178SXianjun Jiao #include <linux/clkdev.h> 392ee67178SXianjun Jiao #include <linux/clk-provider.h> 402ee67178SXianjun Jiao 412ee67178SXianjun Jiao #include <linux/iio/iio.h> 422ee67178SXianjun Jiao #include <linux/iio/sysfs.h> 432ee67178SXianjun Jiao 442ee67178SXianjun Jiao #include <linux/gpio.h> 452ee67178SXianjun Jiao #include <linux/leds.h> 462ee67178SXianjun Jiao 472ee67178SXianjun Jiao #define IIO_AD9361_USE_PRIVATE_H_ 4856fcab20SXianjun Jiao #include <../../drivers/iio/adc/ad9361_regs.h> 4956fcab20SXianjun Jiao #include <../../drivers/iio/adc/ad9361.h> 5056fcab20SXianjun Jiao #include <../../drivers/iio/adc/ad9361_private.h> 512ee67178SXianjun Jiao 522ee67178SXianjun Jiao #include <../../drivers/iio/frequency/cf_axi_dds.h> 5356fcab20SXianjun Jiao extern int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num); 5456fcab20SXianjun Jiao extern int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb, 5556fcab20SXianjun Jiao bool tx1, bool tx2, bool immed); 5656fcab20SXianjun Jiao extern int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy, 5756fcab20SXianjun Jiao struct ctrl_outs_control *ctrl); 582ee67178SXianjun Jiao 592ee67178SXianjun Jiao #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 602ee67178SXianjun Jiao #include "hw_def.h" 612ee67178SXianjun Jiao #include "sdr.h" 620a92505dSXianjun Jiao #include "git_rev.h" 632ee67178SXianjun Jiao 642ee67178SXianjun Jiao // driver API of component driver 652ee67178SXianjun Jiao extern struct tx_intf_driver_api *tx_intf_api; 662ee67178SXianjun Jiao extern struct rx_intf_driver_api *rx_intf_api; 672ee67178SXianjun Jiao extern struct openofdm_tx_driver_api *openofdm_tx_api; 682ee67178SXianjun Jiao extern struct openofdm_rx_driver_api *openofdm_rx_api; 692ee67178SXianjun Jiao extern struct xpu_driver_api *xpu_api; 702ee67178SXianjun Jiao 71f738aefaSmmehari u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes); 72f738aefaSmmehari u8 gen_mpdu_delim_crc(u16 m); 73f738aefaSmmehari 747d0af6dfSXianjun Jiao #include "sdrctl_intf.c" 757d0af6dfSXianjun Jiao #include "sysfs_intf.c" 767d0af6dfSXianjun Jiao 77*76b1a6a1SXianjun Jiao static int test_mode = 0; // bit0: aggregation enable(1)/disable(0); NO USE ANY MORE: bit1: tx offset tuning enable(0)/disable(1) 78*76b1a6a1SXianjun Jiao // Internal indication variables after parsing test_mode 79*76b1a6a1SXianjun Jiao static bool AGGR_ENABLE = false; 80*76b1a6a1SXianjun Jiao static bool TX_OFFSET_TUNING_ENABLE = false; 81*76b1a6a1SXianjun Jiao 82*76b1a6a1SXianjun Jiao static int init_tx_att = 0; 832ee67178SXianjun Jiao 842ee67178SXianjun Jiao MODULE_AUTHOR("Xianjun Jiao"); 852ee67178SXianjun Jiao MODULE_DESCRIPTION("SDR driver"); 862ee67178SXianjun Jiao MODULE_LICENSE("GPL v2"); 872ee67178SXianjun Jiao 882ee67178SXianjun Jiao module_param(test_mode, int, 0); 89*76b1a6a1SXianjun Jiao MODULE_PARM_DESC(myint, "test_mode. bit0: aggregation enable(1)/disable(0)"); 90*76b1a6a1SXianjun Jiao 91*76b1a6a1SXianjun Jiao module_param(init_tx_att, int, 0); 92*76b1a6a1SXianjun Jiao MODULE_PARM_DESC(myint, "init_tx_att. TX attenuation in dB*1000 example: set to 3000 for 3dB attenuation"); 932ee67178SXianjun Jiao 942ee67178SXianjun Jiao // ---------------rfkill--------------------------------------- 952ee67178SXianjun Jiao static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 962ee67178SXianjun Jiao { 972ee67178SXianjun Jiao int reg; 982ee67178SXianjun Jiao 9991a6d831SXianjun Jiao if (priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT0 || priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0 || priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT_BOTH) 1002ee67178SXianjun Jiao reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 10191a6d831SXianjun Jiao else 10291a6d831SXianjun Jiao reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1032ee67178SXianjun Jiao 10491a6d831SXianjun Jiao if (reg == (AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT])) 1052ee67178SXianjun Jiao return true;// 0 off, 1 on 1062ee67178SXianjun Jiao return false; 1072ee67178SXianjun Jiao } 1082ee67178SXianjun Jiao 1092ee67178SXianjun Jiao void openwifi_rfkill_init(struct ieee80211_hw *hw) 1102ee67178SXianjun Jiao { 1112ee67178SXianjun Jiao struct openwifi_priv *priv = hw->priv; 1122ee67178SXianjun Jiao 1132ee67178SXianjun Jiao priv->rfkill_off = openwifi_is_radio_enabled(priv); 1142ee67178SXianjun Jiao printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 1152ee67178SXianjun Jiao wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 1162ee67178SXianjun Jiao wiphy_rfkill_start_polling(hw->wiphy); 1172ee67178SXianjun Jiao } 1182ee67178SXianjun Jiao 1192ee67178SXianjun Jiao void openwifi_rfkill_poll(struct ieee80211_hw *hw) 1202ee67178SXianjun Jiao { 1212ee67178SXianjun Jiao bool enabled; 1222ee67178SXianjun Jiao struct openwifi_priv *priv = hw->priv; 1232ee67178SXianjun Jiao 1242ee67178SXianjun Jiao enabled = openwifi_is_radio_enabled(priv); 125838a9007SXianjun Jiao // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 1262ee67178SXianjun Jiao if (unlikely(enabled != priv->rfkill_off)) { 1272ee67178SXianjun Jiao priv->rfkill_off = enabled; 1282ee67178SXianjun Jiao printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 1292ee67178SXianjun Jiao wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 1302ee67178SXianjun Jiao } 1312ee67178SXianjun Jiao } 1322ee67178SXianjun Jiao 1332ee67178SXianjun Jiao void openwifi_rfkill_exit(struct ieee80211_hw *hw) 1342ee67178SXianjun Jiao { 1352ee67178SXianjun Jiao printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 1362ee67178SXianjun Jiao wiphy_rfkill_stop_polling(hw->wiphy); 1372ee67178SXianjun Jiao } 1382ee67178SXianjun Jiao //----------------rfkill end----------------------------------- 1392ee67178SXianjun Jiao 1402ee67178SXianjun Jiao //static void ad9361_rf_init(void); 1412ee67178SXianjun Jiao //static void ad9361_rf_stop(void); 1422ee67178SXianjun Jiao //static void ad9361_rf_calc_rssi(void); 1432ee67178SXianjun Jiao static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 1442ee67178SXianjun Jiao struct ieee80211_conf *conf) 1452ee67178SXianjun Jiao { 1462ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 14722dd0cc4SXianjun Jiao u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 148bb0a2c58SXianjun Jiao u32 actual_tx_lo; 1492ee67178SXianjun Jiao bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 1508598d294SXianjun Jiao int static_lbt_th, auto_lbt_th, fpga_lbt_th; 1512ee67178SXianjun Jiao 1522ee67178SXianjun Jiao if (change_flag) { 1532ee67178SXianjun Jiao priv->actual_rx_lo = actual_rx_lo; 154b196f496SXianjun Jiao priv->actual_tx_lo = actual_tx_lo; 1552ee67178SXianjun Jiao 1562ee67178SXianjun Jiao actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 1572ee67178SXianjun Jiao 15856fcab20SXianjun Jiao clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 15956fcab20SXianjun Jiao clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 1602ee67178SXianjun Jiao 1612ee67178SXianjun Jiao if (actual_rx_lo<2412) { 1622ee67178SXianjun Jiao priv->rssi_correction = 153; 1632ee67178SXianjun Jiao } else if (actual_rx_lo<=2484) { 1642ee67178SXianjun Jiao priv->rssi_correction = 153; 1652ee67178SXianjun Jiao } else if (actual_rx_lo<5160) { 1662ee67178SXianjun Jiao priv->rssi_correction = 153; 1672ee67178SXianjun Jiao } else if (actual_rx_lo<=5240) { 1682ee67178SXianjun Jiao priv->rssi_correction = 145; 1692ee67178SXianjun Jiao } else if (actual_rx_lo<=5320) { 1702ee67178SXianjun Jiao priv->rssi_correction = 148; 1712ee67178SXianjun Jiao } else { 1722ee67178SXianjun Jiao priv->rssi_correction = 148; 1732ee67178SXianjun Jiao } 1745deb8d18SXianjun Jiao 175aa239344SXianjun Jiao // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 1768598d294SXianjun Jiao // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44 1778598d294SXianjun Jiao auto_lbt_th = ((priv->rssi_correction-62-16)<<1); 1788598d294SXianjun Jiao static_lbt_th = priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]; 1798598d294SXianjun Jiao fpga_lbt_th = (static_lbt_th==0?auto_lbt_th:static_lbt_th); 1808598d294SXianjun Jiao xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th); 1818598d294SXianjun Jiao 1828598d294SXianjun Jiao priv->last_auto_fpga_lbt_th = auto_lbt_th; 1832ee67178SXianjun Jiao 1842ee67178SXianjun Jiao if (actual_rx_lo < 2500) { 1852ee67178SXianjun Jiao //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 1862ee67178SXianjun Jiao //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 1872ee67178SXianjun Jiao if (priv->band != BAND_2_4GHZ) { 1882ee67178SXianjun Jiao priv->band = BAND_2_4GHZ; 1892ee67178SXianjun Jiao xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1902ee67178SXianjun Jiao } 191febc5adfSXianjun Jiao // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 192febc5adfSXianjun Jiao // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 1932ee67178SXianjun Jiao // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 194febc5adfSXianjun Jiao // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 1952ee67178SXianjun Jiao } 1962ee67178SXianjun Jiao else { 1972ee67178SXianjun Jiao //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 1982ee67178SXianjun Jiao // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 1992ee67178SXianjun Jiao if (priv->band != BAND_5_8GHZ) { 2002ee67178SXianjun Jiao priv->band = BAND_5_8GHZ; 2012ee67178SXianjun Jiao xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 2022ee67178SXianjun Jiao } 203febc5adfSXianjun Jiao // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 204febc5adfSXianjun Jiao // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 205febc5adfSXianjun Jiao // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 206febc5adfSXianjun Jiao // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 207febc5adfSXianjun Jiao // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 2082ee67178SXianjun Jiao } 2092ee67178SXianjun Jiao //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 2102ee67178SXianjun Jiao // //-- use less 2112ee67178SXianjun Jiao //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 2122ee67178SXianjun Jiao //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 2132ee67178SXianjun Jiao //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 2142ee67178SXianjun Jiao //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 2158598d294SXianjun Jiao printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d) fpga_lbt_th %d (auto %d static %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag,fpga_lbt_th,auto_lbt_th,static_lbt_th); 2162ee67178SXianjun Jiao } 2172ee67178SXianjun Jiao } 2182ee67178SXianjun Jiao 2192ee67178SXianjun Jiao const struct openwifi_rf_ops ad9361_rf_ops = { 2202ee67178SXianjun Jiao .name = "ad9361", 2212ee67178SXianjun Jiao // .init = ad9361_rf_init, 2222ee67178SXianjun Jiao // .stop = ad9361_rf_stop, 2232ee67178SXianjun Jiao .set_chan = ad9361_rf_set_channel, 2242ee67178SXianjun Jiao // .calc_rssi = ad9361_rf_calc_rssi, 2252ee67178SXianjun Jiao }; 2262ee67178SXianjun Jiao 2272ee67178SXianjun Jiao u16 reverse16(u16 d) { 2282ee67178SXianjun Jiao union u16_byte2 tmp0, tmp1; 2292ee67178SXianjun Jiao tmp0.a = d; 2302ee67178SXianjun Jiao tmp1.c[0] = tmp0.c[1]; 2312ee67178SXianjun Jiao tmp1.c[1] = tmp0.c[0]; 2322ee67178SXianjun Jiao return(tmp1.a); 2332ee67178SXianjun Jiao } 2342ee67178SXianjun Jiao 2352ee67178SXianjun Jiao u32 reverse32(u32 d) { 2362ee67178SXianjun Jiao union u32_byte4 tmp0, tmp1; 2372ee67178SXianjun Jiao tmp0.a = d; 2382ee67178SXianjun Jiao tmp1.c[0] = tmp0.c[3]; 2392ee67178SXianjun Jiao tmp1.c[1] = tmp0.c[2]; 2402ee67178SXianjun Jiao tmp1.c[2] = tmp0.c[1]; 2412ee67178SXianjun Jiao tmp1.c[3] = tmp0.c[0]; 2422ee67178SXianjun Jiao return(tmp1.a); 2432ee67178SXianjun Jiao } 2442ee67178SXianjun Jiao 245838a9007SXianjun Jiao static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 2462ee67178SXianjun Jiao { 247838a9007SXianjun Jiao struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 2482ee67178SXianjun Jiao int i; 2492ee67178SXianjun Jiao 250838a9007SXianjun Jiao ring->stop_flag = 0; 2512ee67178SXianjun Jiao ring->bd_wr_idx = 0; 2522ee67178SXianjun Jiao ring->bd_rd_idx = 0; 2532ee67178SXianjun Jiao ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 2542ee67178SXianjun Jiao if (ring->bds==NULL) { 2552ee67178SXianjun Jiao printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 2562ee67178SXianjun Jiao return -ENOMEM; 2572ee67178SXianjun Jiao } 2582ee67178SXianjun Jiao 2592ee67178SXianjun Jiao for (i = 0; i < NUM_TX_BD; i++) { 2602ee67178SXianjun Jiao ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 261b1dd94e3Sluz paz //at first right after skb allocated, head, data, tail are the same. 26246c420aeSluz paz ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 263f738aefaSmmehari ring->bds[i].seq_no = 0; 2642ee67178SXianjun Jiao } 2652ee67178SXianjun Jiao 2662ee67178SXianjun Jiao return 0; 2672ee67178SXianjun Jiao } 2682ee67178SXianjun Jiao 269838a9007SXianjun Jiao static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 2702ee67178SXianjun Jiao { 271838a9007SXianjun Jiao struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 2722ee67178SXianjun Jiao int i; 2732ee67178SXianjun Jiao 274838a9007SXianjun Jiao ring->stop_flag = 0; 2752ee67178SXianjun Jiao ring->bd_wr_idx = 0; 2762ee67178SXianjun Jiao ring->bd_rd_idx = 0; 2772ee67178SXianjun Jiao for (i = 0; i < NUM_TX_BD; i++) { 2782ee67178SXianjun Jiao if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 2792ee67178SXianjun Jiao continue; 2802ee67178SXianjun Jiao if (ring->bds[i].dma_mapping_addr != 0) 281838a9007SXianjun Jiao dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 2822ee67178SXianjun Jiao // if (ring->bds[i].skb_linked!=NULL) 283838a9007SXianjun Jiao // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 2842ee67178SXianjun Jiao if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 2852ee67178SXianjun Jiao (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 28695d3c7c5SXianjun Jiao printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08x\n", sdr_compatible_str, 2878598d294SXianjun Jiao ring_idx, i, (void*)(ring->bds[i].skb_linked), (unsigned int)(ring->bds[i].dma_mapping_addr)); 2882ee67178SXianjun Jiao 2892ee67178SXianjun Jiao ring->bds[i].skb_linked=0; 2902ee67178SXianjun Jiao ring->bds[i].dma_mapping_addr = 0; 291f738aefaSmmehari ring->bds[i].seq_no = 0; 2922ee67178SXianjun Jiao } 2932ee67178SXianjun Jiao if (ring->bds) 2942ee67178SXianjun Jiao kfree(ring->bds); 2952ee67178SXianjun Jiao ring->bds = NULL; 2962ee67178SXianjun Jiao } 2972ee67178SXianjun Jiao 2982ee67178SXianjun Jiao static int openwifi_init_rx_ring(struct openwifi_priv *priv) 2992ee67178SXianjun Jiao { 300027d42ecSXianjun Jiao int i; 301027d42ecSXianjun Jiao u8 *pdata_tmp; 302027d42ecSXianjun Jiao 3032ee67178SXianjun Jiao priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 3042ee67178SXianjun Jiao if (!priv->rx_cyclic_buf) { 3052ee67178SXianjun Jiao printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 3062ee67178SXianjun Jiao dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 3072ee67178SXianjun Jiao return(-1); 3082ee67178SXianjun Jiao } 309027d42ecSXianjun Jiao 310027d42ecSXianjun Jiao // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 311027d42ecSXianjun Jiao for (i=0; i<NUM_RX_BD; i++) { 312027d42ecSXianjun Jiao pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 313027d42ecSXianjun Jiao (*((u32*)(pdata_tmp+0 ))) = 0; 314027d42ecSXianjun Jiao (*((u32*)(pdata_tmp+4 ))) = 0; 315027d42ecSXianjun Jiao } 316027d42ecSXianjun Jiao printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 317027d42ecSXianjun Jiao 3182ee67178SXianjun Jiao return 0; 3192ee67178SXianjun Jiao } 3202ee67178SXianjun Jiao 3212ee67178SXianjun Jiao static void openwifi_free_rx_ring(struct openwifi_priv *priv) 3222ee67178SXianjun Jiao { 3232ee67178SXianjun Jiao if (priv->rx_cyclic_buf) 3242ee67178SXianjun Jiao dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 3252ee67178SXianjun Jiao 3262ee67178SXianjun Jiao priv->rx_cyclic_buf_dma_mapping_addr = 0; 3272ee67178SXianjun Jiao priv->rx_cyclic_buf = 0; 3282ee67178SXianjun Jiao } 3292ee67178SXianjun Jiao 3302ee67178SXianjun Jiao static int rx_dma_setup(struct ieee80211_hw *dev){ 3312ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 3322ee67178SXianjun Jiao struct dma_device *rx_dev = priv->rx_chan->device; 3332ee67178SXianjun Jiao 3342ee67178SXianjun Jiao priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 3352ee67178SXianjun Jiao if (!(priv->rxd)) { 3362ee67178SXianjun Jiao openwifi_free_rx_ring(priv); 337febc5adfSXianjun Jiao printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 3382ee67178SXianjun Jiao return(-1); 3392ee67178SXianjun Jiao } 3402ee67178SXianjun Jiao priv->rxd->callback = 0; 3412ee67178SXianjun Jiao priv->rxd->callback_param = 0; 3422ee67178SXianjun Jiao 3432ee67178SXianjun Jiao priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 3442ee67178SXianjun Jiao 3452ee67178SXianjun Jiao if (dma_submit_error(priv->rx_cookie)) { 3462ee67178SXianjun Jiao printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 3472ee67178SXianjun Jiao return(-1); 3482ee67178SXianjun Jiao } 3492ee67178SXianjun Jiao 3502ee67178SXianjun Jiao dma_async_issue_pending(priv->rx_chan); 3512ee67178SXianjun Jiao return(0); 3522ee67178SXianjun Jiao } 3532ee67178SXianjun Jiao 3542ee67178SXianjun Jiao static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 3552ee67178SXianjun Jiao { 3562ee67178SXianjun Jiao struct ieee80211_hw *dev = dev_id; 3572ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 3582ee67178SXianjun Jiao struct ieee80211_rx_status rx_status = {0}; 3592ee67178SXianjun Jiao struct sk_buff *skb; 3602ee67178SXianjun Jiao struct ieee80211_hdr *hdr; 361261bb9eeSmmehari u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0;//, fc_di; 362261bb9eeSmmehari bool ht_flag, short_gi, ht_aggr, ht_aggr_last; 363838a9007SXianjun Jiao // u32 dma_driver_buf_idx_mod; 364027d42ecSXianjun Jiao u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 3652ee67178SXianjun Jiao s8 signal; 366109b1cfdSXianjun Jiao u16 agc_status_and_pkt_exist_flag, rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 3672a1e0746SXianjun Jiao bool content_ok = false, len_overflow = false; 3682ee67178SXianjun Jiao 369109b1cfdSXianjun Jiao #ifdef USE_NEW_RX_INTERRUPT 370109b1cfdSXianjun Jiao int i; 3712ee67178SXianjun Jiao spin_lock(&priv->lock); 372109b1cfdSXianjun Jiao for (i=0; i<NUM_RX_BD; i++) { 373109b1cfdSXianjun Jiao pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; 374109b1cfdSXianjun Jiao agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); //check rx_intf_pl_to_m_axis.v. FPGA TODO: add pkt exist 1bit flag next to gpio_status_lock_by_sig_valid 375109b1cfdSXianjun Jiao if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 376109b1cfdSXianjun Jiao continue; 377109b1cfdSXianjun Jiao #else 378109b1cfdSXianjun Jiao static u8 target_buf_idx_old = 0; 379109b1cfdSXianjun Jiao spin_lock(&priv->lock); 380027d42ecSXianjun Jiao while(1) { // loop all rx buffers that have new rx packets 381838a9007SXianjun Jiao pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 382109b1cfdSXianjun Jiao agc_status_and_pkt_exist_flag = (*((u16*)(pdata_tmp+10))); 383109b1cfdSXianjun Jiao if ( agc_status_and_pkt_exist_flag==0 ) // no packet in the buffer 384109b1cfdSXianjun Jiao break; 385109b1cfdSXianjun Jiao #endif 386109b1cfdSXianjun Jiao 3872ee67178SXianjun Jiao tsft_low = (*((u32*)(pdata_tmp+0 ))); 3882ee67178SXianjun Jiao tsft_high = (*((u32*)(pdata_tmp+4 ))); 3892ee67178SXianjun Jiao rssi_val = (*((u16*)(pdata_tmp+8 ))); 3902ee67178SXianjun Jiao len = (*((u16*)(pdata_tmp+12))); 3912a1e0746SXianjun Jiao 3922a1e0746SXianjun Jiao len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 3932a1e0746SXianjun Jiao 3942ee67178SXianjun Jiao rate_idx = (*((u16*)(pdata_tmp+14))); 395261bb9eeSmmehari ht_flag = ((rate_idx&0x10)!=0); 396b6d71713Smmehari short_gi = ((rate_idx&0x20)!=0); 397261bb9eeSmmehari ht_aggr = (ht_flag & ((rate_idx&0x40)!=0)); 398261bb9eeSmmehari ht_aggr_last = (ht_flag & ((rate_idx&0x80)!=0)); 399261bb9eeSmmehari rate_idx = (rate_idx&0x1F); 4002ee67178SXianjun Jiao 4012a1e0746SXianjun Jiao fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 4022ee67178SXianjun Jiao 4032a1e0746SXianjun Jiao //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 404838a9007SXianjun Jiao // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 405838a9007SXianjun Jiao // dma_driver_buf_idx_mod = (state.residue&0x7f); 4062ee67178SXianjun Jiao fcs_ok = ((fcs_ok&0x80)!=0); 4072ee67178SXianjun Jiao 408b6d71713Smmehari if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 4092ee67178SXianjun Jiao // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 4102ee67178SXianjun Jiao // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 4112ee67178SXianjun Jiao // } 4122ee67178SXianjun Jiao content_ok = true; 4132ee67178SXianjun Jiao } else { 4142ee67178SXianjun Jiao printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 4152ee67178SXianjun Jiao content_ok = false; 4162ee67178SXianjun Jiao } 4172ee67178SXianjun Jiao 4182ee67178SXianjun Jiao rssi_val = (rssi_val>>1); 4192ee67178SXianjun Jiao if ( (rssi_val+128)<priv->rssi_correction ) 4202ee67178SXianjun Jiao signal = -128; 4212ee67178SXianjun Jiao else 4222ee67178SXianjun Jiao signal = rssi_val - priv->rssi_correction; 4232a1e0746SXianjun Jiao 424838a9007SXianjun Jiao // fc_di = (*((u32*)(pdata_tmp+16))); 425838a9007SXianjun Jiao // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 426838a9007SXianjun Jiao // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 427838a9007SXianjun Jiao // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 428838a9007SXianjun Jiao // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 429838a9007SXianjun Jiao // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 430838a9007SXianjun Jiao // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 431838a9007SXianjun Jiao if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 432838a9007SXianjun Jiao hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 433838a9007SXianjun Jiao addr1_low32 = *((u32*)(hdr->addr1+2)); 434838a9007SXianjun Jiao addr1_high16 = *((u16*)(hdr->addr1)); 435838a9007SXianjun Jiao if (len>=20) { 436838a9007SXianjun Jiao addr2_low32 = *((u32*)(hdr->addr2+2)); 437838a9007SXianjun Jiao addr2_high16 = *((u16*)(hdr->addr2)); 438838a9007SXianjun Jiao } 439838a9007SXianjun Jiao if (len>=26) { 440838a9007SXianjun Jiao addr3_low32 = *((u32*)(hdr->addr3+2)); 441838a9007SXianjun Jiao addr3_high16 = *((u16*)(hdr->addr3)); 442838a9007SXianjun Jiao } 443838a9007SXianjun Jiao if (len>=28) 444838a9007SXianjun Jiao sc = hdr->seq_ctrl; 445838a9007SXianjun Jiao 4467cf9ba6eSXianjun Jiao if ( (addr1_low32!=0xffffffff || addr1_high16!=0xffff) || (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&4) ) 447261bb9eeSmmehari printk("%s openwifi_rx_interrupt:%4dbytes ht%d aggr%d/%d sgi%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 448261bb9eeSmmehari len, ht_flag, ht_aggr, ht_aggr_last, short_gi, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 4492ee67178SXianjun Jiao reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 450109b1cfdSXianjun Jiao #ifdef USE_NEW_RX_INTERRUPT 451109b1cfdSXianjun Jiao sc, fcs_ok, i, signal); 452109b1cfdSXianjun Jiao #else 453838a9007SXianjun Jiao sc, fcs_ok, target_buf_idx_old, signal); 454109b1cfdSXianjun Jiao #endif 455838a9007SXianjun Jiao } 4562ee67178SXianjun Jiao 4572ee67178SXianjun Jiao // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 4582ee67178SXianjun Jiao if (content_ok) { 4592ee67178SXianjun Jiao skb = dev_alloc_skb(len); 4602ee67178SXianjun Jiao if (skb) { 4612ee67178SXianjun Jiao skb_put_data(skb,pdata_tmp+16,len); 4622ee67178SXianjun Jiao 46356203843SXianjun Jiao rx_status.antenna = priv->runtime_rx_ant_cfg; 4642ee67178SXianjun Jiao // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 4652ee67178SXianjun Jiao rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 4662ee67178SXianjun Jiao rx_status.signal = signal; 4672ee67178SXianjun Jiao rx_status.freq = dev->conf.chandef.chan->center_freq; 4682ee67178SXianjun Jiao rx_status.band = dev->conf.chandef.chan->band; 4692ee67178SXianjun Jiao rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 4702ee67178SXianjun Jiao rx_status.flag |= RX_FLAG_MACTIME_START; 4712ee67178SXianjun Jiao if (!fcs_ok) 4722ee67178SXianjun Jiao rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 473b6d71713Smmehari if (rate_idx <= 15) 4742ee67178SXianjun Jiao rx_status.encoding = RX_ENC_LEGACY; 475b6d71713Smmehari else 476b6d71713Smmehari rx_status.encoding = RX_ENC_HT; 4772ee67178SXianjun Jiao rx_status.bw = RATE_INFO_BW_20; 478b6d71713Smmehari if (short_gi) 479b6d71713Smmehari rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 480261bb9eeSmmehari if(ht_aggr) 481261bb9eeSmmehari { 482261bb9eeSmmehari rx_status.ampdu_reference = priv->ampdu_reference; 483261bb9eeSmmehari rx_status.flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 484261bb9eeSmmehari if (ht_aggr_last) 485261bb9eeSmmehari rx_status.flag |= RX_FLAG_AMPDU_IS_LAST; 486261bb9eeSmmehari } 4872ee67178SXianjun Jiao 4882ee67178SXianjun Jiao memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 4892ee67178SXianjun Jiao ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 4902ee67178SXianjun Jiao } else 491838a9007SXianjun Jiao printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 492261bb9eeSmmehari 493261bb9eeSmmehari if(ht_aggr_last) 494261bb9eeSmmehari priv->ampdu_reference++; 4952ee67178SXianjun Jiao } 496109b1cfdSXianjun Jiao (*((u16*)(pdata_tmp+10))) = 0; // clear the field (set by rx_intf_pl_to_m_axis.v) to indicate the packet has been processed 497838a9007SXianjun Jiao loop_count++; 498109b1cfdSXianjun Jiao #ifndef USE_NEW_RX_INTERRUPT 499027d42ecSXianjun Jiao target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 500109b1cfdSXianjun Jiao #endif 501838a9007SXianjun Jiao } 502838a9007SXianjun Jiao 503838a9007SXianjun Jiao if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 504838a9007SXianjun Jiao printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 505838a9007SXianjun Jiao 506838a9007SXianjun Jiao // openwifi_rx_interrupt_out: 5072ee67178SXianjun Jiao spin_unlock(&priv->lock); 5082ee67178SXianjun Jiao return IRQ_HANDLED; 5092ee67178SXianjun Jiao } 5102ee67178SXianjun Jiao 5112ee67178SXianjun Jiao static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 5122ee67178SXianjun Jiao { 5132ee67178SXianjun Jiao struct ieee80211_hw *dev = dev_id; 5142ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 515838a9007SXianjun Jiao struct openwifi_ring *ring; 5162ee67178SXianjun Jiao struct sk_buff *skb; 5172ee67178SXianjun Jiao struct ieee80211_tx_info *info; 5180c0d5d82Smmehari u32 reg_val1, hw_queue_len, reg_val2, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0; 519f738aefaSmmehari u16 seq_no, pkt_cnt, blk_ack_ssn, start_idx; 520f738aefaSmmehari u8 nof_retx=-1, last_bd_rd_idx, i; 521f738aefaSmmehari u64 blk_ack_bitmap; 522838a9007SXianjun Jiao // u16 prio_rd_idx_store[64]={0}; 523385339abSmmehari bool tx_fail=false; 5242ee67178SXianjun Jiao 5252ee67178SXianjun Jiao spin_lock(&priv->lock); 5262ee67178SXianjun Jiao 527838a9007SXianjun Jiao while(1) { // loop all packets that have been sent by FPGA 528f738aefaSmmehari reg_val1 = tx_intf_api->TX_INTF_REG_PKT_INFO1_read(); 529f738aefaSmmehari reg_val2 = tx_intf_api->TX_INTF_REG_PKT_INFO2_read(); 530f738aefaSmmehari blk_ack_bitmap = (tx_intf_api->TX_INTF_REG_PKT_INFO3_read() | ((u64)tx_intf_api->TX_INTF_REG_PKT_INFO4_read())<<32); 531f738aefaSmmehari 532f738aefaSmmehari if (reg_val1!=0xFFFFFFFF) { 533f738aefaSmmehari nof_retx = (reg_val1&0xF); 534f738aefaSmmehari last_bd_rd_idx = ((reg_val1>>5)&(NUM_TX_BD-1)); 535f738aefaSmmehari prio = ((reg_val1>>17)&0x3); 536f738aefaSmmehari num_slot_random = ((reg_val1>>19)&0x1FF); 537f738aefaSmmehari //num_slot_random = ((0xFF80000 ®_val1)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 538f738aefaSmmehari cw = ((reg_val1>>28)&0xF); 539f738aefaSmmehari //cw = ((0xF0000000 & reg_val1) >> 28); 5402238b42bSweiliu if(cw > 10) { 5412238b42bSweiliu cw = 10 ; 5422238b42bSweiliu num_slot_random += 512 ; 5432238b42bSweiliu } 544f738aefaSmmehari pkt_cnt = (reg_val2&0x3F); 545f738aefaSmmehari blk_ack_ssn = ((reg_val2>>6)&0xFFF); 5462238b42bSweiliu 547838a9007SXianjun Jiao ring = &(priv->tx_ring[prio]); 548f738aefaSmmehari 5490c0d5d82Smmehari if ( ring->stop_flag == 1) { 5500c0d5d82Smmehari // Wake up Linux queue if FPGA and driver ring have room 5510c0d5d82Smmehari queue_idx = ((reg_val1>>15)&(MAX_NUM_HW_QUEUE-1)); 5520c0d5d82Smmehari dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 5530c0d5d82Smmehari hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 5540c0d5d82Smmehari 5550c0d5d82Smmehari if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 556f738aefaSmmehari // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 5570c0d5d82Smmehari printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 5580c0d5d82Smmehari prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, last_bd_rd_idx); 559f738aefaSmmehari ieee80211_wake_queue(dev, prio); 560f738aefaSmmehari ring->stop_flag = 0; 561f738aefaSmmehari } 5620c0d5d82Smmehari } 563f738aefaSmmehari 564f738aefaSmmehari for(i = 1; i <= pkt_cnt; i++) 565f738aefaSmmehari { 566f738aefaSmmehari ring->bd_rd_idx = (last_bd_rd_idx + i - pkt_cnt + 64)%64; 567f738aefaSmmehari seq_no = ring->bds[ring->bd_rd_idx].seq_no; 568838a9007SXianjun Jiao skb = ring->bds[ring->bd_rd_idx].skb_linked; 5692ee67178SXianjun Jiao 570838a9007SXianjun Jiao dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 571838a9007SXianjun Jiao skb->len, DMA_MEM_TO_DEV); 5722ee67178SXianjun Jiao 5732ee67178SXianjun Jiao info = IEEE80211_SKB_CB(skb); 5742ee67178SXianjun Jiao ieee80211_tx_info_clear_status(info); 5752ee67178SXianjun Jiao 576385339abSmmehari // Aggregation packet 577385339abSmmehari if(pkt_cnt > 1) 578f738aefaSmmehari { 579c0981124Smmehari start_idx = (seq_no>=blk_ack_ssn) ? (seq_no-blk_ack_ssn) : (seq_no+((~blk_ack_ssn+1)&0x0FFF)); 580f738aefaSmmehari tx_fail = (((blk_ack_bitmap>>start_idx)&0x1)==0); 581385339abSmmehari info->flags |= IEEE80211_TX_STAT_AMPDU; 582385339abSmmehari info->status.ampdu_len = 1; 583385339abSmmehari info->status.ampdu_ack_len = (tx_fail == true) ? 0 : 1; 584385339abSmmehari 585385339abSmmehari skb_pull(skb, LEN_MPDU_DELIM); 586385339abSmmehari //skb_trim(skb, num_byte_pad_skb); 587f738aefaSmmehari } 588385339abSmmehari // Normal packet 589f738aefaSmmehari else 590f738aefaSmmehari { 591f738aefaSmmehari tx_fail = ((blk_ack_bitmap&0x1)==0); 592385339abSmmehari info->flags &= (~IEEE80211_TX_CTL_AMPDU); 593f738aefaSmmehari } 594f738aefaSmmehari 595f738aefaSmmehari if (tx_fail == false) 5962ee67178SXianjun Jiao info->flags |= IEEE80211_TX_STAT_ACK; 5972ee67178SXianjun Jiao 598f738aefaSmmehari info->status.rates[0].count = nof_retx + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 5992ee67178SXianjun Jiao info->status.rates[1].idx = -1; 6002ee67178SXianjun Jiao info->status.rates[2].idx = -1; 6012ee67178SXianjun Jiao info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 60256203843SXianjun Jiao info->status.antenna = priv->runtime_tx_ant_cfg; 603838a9007SXianjun Jiao 604c0981124Smmehari if ( tx_fail && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 605f738aefaSmmehari printk("%s openwifi_tx_interrupt: WARNING pkt_no %d/%d tx_result [nof_retx %d pass %d] prio%d wr%d rd%d\n", sdr_compatible_str, i, pkt_cnt, nof_retx+1, !tx_fail, prio, ring->bd_wr_idx, ring->bd_rd_idx); 6067cf9ba6eSXianjun Jiao if ( ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK))||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 607f738aefaSmmehari printk("%s openwifi_tx_interrupt: tx_result [nof_retx %d pass %d] prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, nof_retx+1, !tx_fail, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random, cw); 6082ee67178SXianjun Jiao 6092ee67178SXianjun Jiao ieee80211_tx_status_irqsafe(dev, skb); 610f738aefaSmmehari } 6112ee67178SXianjun Jiao 612838a9007SXianjun Jiao loop_count++; 6132ee67178SXianjun Jiao 614838a9007SXianjun Jiao // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 615838a9007SXianjun Jiao 616838a9007SXianjun Jiao } else 617838a9007SXianjun Jiao break; 6182ee67178SXianjun Jiao } 619838a9007SXianjun Jiao if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 620838a9007SXianjun Jiao printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 6212ee67178SXianjun Jiao 6222ee67178SXianjun Jiao spin_unlock(&priv->lock); 6232ee67178SXianjun Jiao return IRQ_HANDLED; 6242ee67178SXianjun Jiao } 6252ee67178SXianjun Jiao 626f738aefaSmmehari u32 crc_table[16] = {0x4DBDF21C, 0x500AE278, 0x76D3D2D4, 0x6B64C2B0, 0x3B61B38C, 0x26D6A3E8, 0x000F9344, 0x1DB88320, 0xA005713C, 0xBDB26158, 0x9B6B51F4, 0x86DC4190, 0xD6D930AC, 0xCB6E20C8, 0xEDB71064, 0xF0000000}; 627f738aefaSmmehari u32 gen_mpdu_crc(u8 *data_in, u32 num_bytes) 628f738aefaSmmehari { 629f738aefaSmmehari u32 i, crc = 0; 630f738aefaSmmehari u8 idx; 631f738aefaSmmehari for( i = 0; i < num_bytes; i++) 632f738aefaSmmehari { 633f738aefaSmmehari idx = (crc & 0x0F) ^ (data_in[i] & 0x0F); 634f738aefaSmmehari crc = (crc >> 4) ^ crc_table[idx]; 635f738aefaSmmehari 636f738aefaSmmehari idx = (crc & 0x0F) ^ ((data_in[i] >> 4) & 0x0F); 637f738aefaSmmehari crc = (crc >> 4) ^ crc_table[idx]; 6382ee67178SXianjun Jiao } 6392ee67178SXianjun Jiao 640f738aefaSmmehari return crc; 641f738aefaSmmehari } 6422ee67178SXianjun Jiao 643f738aefaSmmehari u8 gen_mpdu_delim_crc(u16 m) 644f738aefaSmmehari { 645f738aefaSmmehari u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, mpdu_delim_crc; 646f738aefaSmmehari 647f738aefaSmmehari for (i = 0; i < 16; i++) 648b6d71713Smmehari { 649b6d71713Smmehari temp = c[7] ^ ((m >> i) & 0x01); 650b6d71713Smmehari 651b6d71713Smmehari c[7] = c[6]; 652b6d71713Smmehari c[6] = c[5]; 653b6d71713Smmehari c[5] = c[4]; 654b6d71713Smmehari c[4] = c[3]; 655b6d71713Smmehari c[3] = c[2]; 656b6d71713Smmehari c[2] = c[1] ^ temp; 657b6d71713Smmehari c[1] = c[0] ^ temp; 658b6d71713Smmehari c[0] = temp; 659b6d71713Smmehari } 660f738aefaSmmehari mpdu_delim_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 661b6d71713Smmehari 662f738aefaSmmehari return mpdu_delim_crc; 663b6d71713Smmehari } 6642ee67178SXianjun Jiao 6652ee67178SXianjun Jiao static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 6662ee67178SXianjun Jiao cdev_to_gpio_led_data(struct led_classdev *led_cdev) 6672ee67178SXianjun Jiao { 6682ee67178SXianjun Jiao return container_of(led_cdev, struct gpio_led_data, cdev); 6692ee67178SXianjun Jiao } 6702ee67178SXianjun Jiao 6712ee67178SXianjun Jiao static void openwifi_tx(struct ieee80211_hw *dev, 6722ee67178SXianjun Jiao struct ieee80211_tx_control *control, 6732ee67178SXianjun Jiao struct sk_buff *skb) 6742ee67178SXianjun Jiao { 675838a9007SXianjun Jiao struct openwifi_priv *priv = dev->priv; 676838a9007SXianjun Jiao unsigned long flags; 6772ee67178SXianjun Jiao struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 6782ee67178SXianjun Jiao struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 679f738aefaSmmehari struct openwifi_ring *ring = NULL; 6802ee67178SXianjun Jiao dma_addr_t dma_mapping_addr; 681f738aefaSmmehari unsigned int prio=0, i; 682f738aefaSmmehari u32 num_dma_symbol, len_mpdu = 0, len_mpdu_delim_pad = 0, num_dma_byte, len_psdu, num_byte_pad; 683f738aefaSmmehari u32 rate_signal_value,rate_hw_value=0,ack_flag; 684f738aefaSmmehari u32 pkt_need_ack=0, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, tx_config, cts_reg, phy_hdr_config;//, openofdm_state_history; 6852ee67178SXianjun Jiao u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value=0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 686c0981124Smmehari u8 fc_flag,fc_type,fc_subtype,retry_limit_raw=0,use_short_gi=0,*dma_buf,retry_limit_hw_value,rc_flags,*qos_hdr; 687c0981124Smmehari bool use_rts_cts, use_cts_protect=false, ht_aggr_start=false, use_ht_rate=false, use_ht_aggr=false, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 6882ee67178SXianjun Jiao __le16 frame_control,duration_id; 6890c0d5d82Smmehari u32 dma_fifo_no_room_flag, hw_queue_len; 690838a9007SXianjun Jiao enum dma_status status; 691f738aefaSmmehari 6929cd584f8Smmehari static u32 addr1_low32_prev = -1, rate_hw_value_prev = -1, pkt_need_ack_prev = -1; 6939cd584f8Smmehari static u16 addr1_high16_prev = -1; 6949cd584f8Smmehari static __le16 duration_id_prev = -1; 695f738aefaSmmehari static unsigned int prio_prev = -1; 696f738aefaSmmehari static u8 retry_limit_raw_prev = -1; 697c0981124Smmehari static u8 use_short_gi_prev = -1; 698f738aefaSmmehari 6992ee67178SXianjun Jiao // static bool led_status=0; 7002ee67178SXianjun Jiao // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 7012ee67178SXianjun Jiao 7022ee67178SXianjun Jiao // if ( (priv->phy_tx_sn&7) ==0 ) { 7032ee67178SXianjun Jiao // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 7042ee67178SXianjun Jiao // if (openofdm_state_history!=openofdm_state_history_old){ 7052ee67178SXianjun Jiao // led_status = (~led_status); 7062ee67178SXianjun Jiao // openofdm_state_history_old = openofdm_state_history; 7072ee67178SXianjun Jiao // gpiod_set_value(led_dat->gpiod, led_status); 7082ee67178SXianjun Jiao // } 7092ee67178SXianjun Jiao // } 7102ee67178SXianjun Jiao 7112ee67178SXianjun Jiao if (test_mode==1){ 712838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 7132ee67178SXianjun Jiao goto openwifi_tx_early_out; 7142ee67178SXianjun Jiao } 715838a9007SXianjun Jiao 716838a9007SXianjun Jiao if (skb->data_len>0) {// more data are not in linear data area skb->data 717838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 7182ee67178SXianjun Jiao goto openwifi_tx_early_out; 719838a9007SXianjun Jiao } 7202ee67178SXianjun Jiao 721f738aefaSmmehari len_mpdu = skb->len; 722838a9007SXianjun Jiao 723838a9007SXianjun Jiao // get Linux priority/queue setting info and target mac address 724838a9007SXianjun Jiao prio = skb_get_queue_mapping(skb); 725838a9007SXianjun Jiao addr1_low32 = *((u32*)(hdr->addr1+2)); 726838a9007SXianjun Jiao ring = &(priv->tx_ring[prio]); 727838a9007SXianjun Jiao 728838a9007SXianjun Jiao // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 729838a9007SXianjun Jiao if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 730838a9007SXianjun Jiao queue_idx = prio; 731838a9007SXianjun Jiao } else {// customized prio to queue_idx mapping 732838a9007SXianjun Jiao //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 733838a9007SXianjun Jiao // check current packet belonging to which slice/hw-queue 734838a9007SXianjun Jiao for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 735838a9007SXianjun Jiao if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 736838a9007SXianjun Jiao break; 737838a9007SXianjun Jiao } 738838a9007SXianjun Jiao } 739838a9007SXianjun Jiao //} 740b1dd94e3Sluz paz queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 741838a9007SXianjun Jiao } 742838a9007SXianjun Jiao // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 743838a9007SXianjun Jiao // get other info from packet header 7442ee67178SXianjun Jiao addr1_high16 = *((u16*)(hdr->addr1)); 745f738aefaSmmehari if (len_mpdu>=20) { 7462ee67178SXianjun Jiao addr2_low32 = *((u32*)(hdr->addr2+2)); 7472ee67178SXianjun Jiao addr2_high16 = *((u16*)(hdr->addr2)); 7482ee67178SXianjun Jiao } 749f738aefaSmmehari if (len_mpdu>=26) { 7502ee67178SXianjun Jiao addr3_low32 = *((u32*)(hdr->addr3+2)); 7512ee67178SXianjun Jiao addr3_high16 = *((u16*)(hdr->addr3)); 7522ee67178SXianjun Jiao } 7532ee67178SXianjun Jiao 7542ee67178SXianjun Jiao duration_id = hdr->duration_id; 7552ee67178SXianjun Jiao frame_control=hdr->frame_control; 7562ee67178SXianjun Jiao ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 7572ee67178SXianjun Jiao fc_type = ((frame_control)>>2)&3; 7582ee67178SXianjun Jiao fc_subtype = ((frame_control)>>4)&0xf; 7592ee67178SXianjun Jiao fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 7602ee67178SXianjun Jiao //if it is broadcasting or multicasting addr 7612ee67178SXianjun Jiao addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 7622ee67178SXianjun Jiao (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 7632ee67178SXianjun Jiao (addr1_high16==0x3333) || 7642ee67178SXianjun Jiao (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 7652ee67178SXianjun Jiao if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 7662ee67178SXianjun Jiao pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 7672ee67178SXianjun Jiao } else { 7682ee67178SXianjun Jiao pkt_need_ack = 0; 7692ee67178SXianjun Jiao } 7702ee67178SXianjun Jiao 771838a9007SXianjun Jiao // get Linux rate (MCS) setting 772838a9007SXianjun Jiao rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 7732ee67178SXianjun Jiao //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 774838a9007SXianjun Jiao if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 775838a9007SXianjun Jiao rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 7762ee67178SXianjun Jiao 7772ee67178SXianjun Jiao retry_limit_raw = info->control.rates[0].count; 7782ee67178SXianjun Jiao 7792ee67178SXianjun Jiao rc_flags = info->control.rates[0].flags; 7802ee67178SXianjun Jiao use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 7812ee67178SXianjun Jiao use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 782b6d71713Smmehari use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 783b6d71713Smmehari use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 784f738aefaSmmehari use_ht_aggr = ((info->flags&IEEE80211_TX_CTL_AMPDU)!=0); 7852ee67178SXianjun Jiao 7862ee67178SXianjun Jiao if (use_rts_cts) 787838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 7882ee67178SXianjun Jiao 7892ee67178SXianjun Jiao if (use_cts_protect) { 7902ee67178SXianjun Jiao cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 791f738aefaSmmehari cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mpdu,info)); 7922ee67178SXianjun Jiao } else if (force_use_cts_protect) { // could override mac80211 setting here. 7932ee67178SXianjun Jiao cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 7942ee67178SXianjun Jiao sifs = (priv->actual_rx_lo<2500?10:16); 7952ee67178SXianjun Jiao if (pkt_need_ack) 7962ee67178SXianjun Jiao ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 797f738aefaSmmehari traffic_pkt_duration = 20 + 4*(((22+len_mpdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 7982ee67178SXianjun Jiao cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 7992ee67178SXianjun Jiao } 8002ee67178SXianjun Jiao 8010a92505dSXianjun Jiao // this is 11b stuff 8020a92505dSXianjun Jiao // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 8030a92505dSXianjun Jiao // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 8040a92505dSXianjun Jiao 805f738aefaSmmehari if (len_mpdu>=28) { 8060a92505dSXianjun Jiao if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 8070a92505dSXianjun Jiao if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 8080a92505dSXianjun Jiao priv->seqno += 0x10; 8090a92505dSXianjun Jiao hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 8100a92505dSXianjun Jiao hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 8110a92505dSXianjun Jiao } 8120a92505dSXianjun Jiao sc = hdr->seq_ctrl; 8130a92505dSXianjun Jiao } 8140a92505dSXianjun Jiao 8157cf9ba6eSXianjun Jiao if ( ( (!addr_flag)||(priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&4) ) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 816f738aefaSmmehari printk("%s openwifi_tx: %4dbytes ht%d aggr%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 817f738aefaSmmehari len_mpdu, (use_ht_rate == false ? 0 : 1), (use_ht_aggr == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 8182ee67178SXianjun Jiao reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 819838a9007SXianjun Jiao sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 820838a9007SXianjun Jiao // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 8212ee67178SXianjun Jiao ring->bd_wr_idx,ring->bd_rd_idx); 822febc5adfSXianjun Jiao 8232ee67178SXianjun Jiao // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 8242ee67178SXianjun Jiao // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 8252ee67178SXianjun Jiao // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 8262ee67178SXianjun Jiao // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 8272ee67178SXianjun Jiao // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 8282ee67178SXianjun Jiao 8292ee67178SXianjun Jiao // -----------end of preprocess some info from header and skb---------------- 8302ee67178SXianjun Jiao 8312ee67178SXianjun Jiao // /* HW will perform RTS-CTS when only RTS flags is set. 8322ee67178SXianjun Jiao // * HW will perform CTS-to-self when both RTS and CTS flags are set. 8332ee67178SXianjun Jiao // * RTS rate and RTS duration will be used also for CTS-to-self. 8342ee67178SXianjun Jiao // */ 8352ee67178SXianjun Jiao // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 8362ee67178SXianjun Jiao // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 8372ee67178SXianjun Jiao // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 838f738aefaSmmehari // len_mpdu, info); 8392ee67178SXianjun Jiao // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 8402ee67178SXianjun Jiao // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 8412ee67178SXianjun Jiao // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 8422ee67178SXianjun Jiao // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 843f738aefaSmmehari // len_mpdu, info); 8442ee67178SXianjun Jiao // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 8452ee67178SXianjun Jiao // } 8462ee67178SXianjun Jiao 847f738aefaSmmehari if(use_ht_aggr) 848f738aefaSmmehari { 849f738aefaSmmehari qos_hdr = ieee80211_get_qos_ctl(hdr); 850f738aefaSmmehari if(ieee80211_is_data_qos(frame_control) == false || qos_hdr[0] != priv->tid) 851f738aefaSmmehari { 852f738aefaSmmehari printk("%s openwifi_tx: WARNING packet is either not qos or tid %u does not match registered tid %u\n", sdr_compatible_str, qos_hdr[0], priv->tid); 853f738aefaSmmehari goto openwifi_tx_early_out; 854f738aefaSmmehari } 855f738aefaSmmehari 856f738aefaSmmehari // psdu = [ MPDU DEL | MPDU | CRC | MPDU padding ] 857f738aefaSmmehari len_mpdu_delim_pad = ((len_mpdu + LEN_PHY_CRC)%4 == 0) ? 0 :(4 - (len_mpdu + LEN_PHY_CRC)%4); 858f738aefaSmmehari len_psdu = LEN_MPDU_DELIM + len_mpdu + LEN_PHY_CRC + len_mpdu_delim_pad; 859f738aefaSmmehari 8609cd584f8Smmehari if( (addr1_low32 != addr1_low32_prev) || (addr1_high16 != addr1_high16_prev) || (duration_id != duration_id_prev) || 8619cd584f8Smmehari (rate_hw_value != rate_hw_value_prev) || (use_short_gi != use_short_gi_prev) || 8629cd584f8Smmehari (prio != prio_prev) || (retry_limit_raw != retry_limit_raw_prev) || (pkt_need_ack != pkt_need_ack_prev) ) 863f738aefaSmmehari { 8649cd584f8Smmehari addr1_low32_prev = addr1_low32; 8659cd584f8Smmehari addr1_high16_prev = addr1_high16; 8669cd584f8Smmehari duration_id_prev = duration_id; 867f738aefaSmmehari rate_hw_value_prev = rate_hw_value; 868f738aefaSmmehari use_short_gi_prev = use_short_gi; 869f738aefaSmmehari prio_prev = prio; 870f738aefaSmmehari retry_limit_raw_prev = retry_limit_raw; 871f738aefaSmmehari pkt_need_ack_prev = pkt_need_ack; 872f738aefaSmmehari 873f738aefaSmmehari ht_aggr_start = true; 874f738aefaSmmehari } 875f738aefaSmmehari } 876f738aefaSmmehari else 877f738aefaSmmehari { 878f738aefaSmmehari // psdu = [ MPDU ] 879f738aefaSmmehari len_psdu = len_mpdu; 880f738aefaSmmehari 8819cd584f8Smmehari addr1_low32_prev = -1; 8829cd584f8Smmehari addr1_high16_prev = -1; 8839cd584f8Smmehari duration_id_prev = -1; 884c0981124Smmehari use_short_gi_prev = -1; 885f738aefaSmmehari rate_hw_value_prev = -1; 886f738aefaSmmehari prio_prev = -1; 887f738aefaSmmehari retry_limit_raw_prev = -1; 888f738aefaSmmehari pkt_need_ack_prev = -1; 889f738aefaSmmehari } 890f738aefaSmmehari num_dma_symbol = (len_psdu>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_psdu&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 891f738aefaSmmehari 892f738aefaSmmehari // check whether the packet is bigger than DMA buffer size 893f738aefaSmmehari num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 894f738aefaSmmehari if (num_dma_byte > TX_BD_BUF_SIZE) { 895f738aefaSmmehari printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 896f738aefaSmmehari goto openwifi_tx_early_out; 897f738aefaSmmehari } 898f738aefaSmmehari 899f738aefaSmmehari // Copy MPDU delimiter and padding into sk_buff 900f738aefaSmmehari if(use_ht_aggr) 901f738aefaSmmehari { 9022ee67178SXianjun Jiao // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 903f738aefaSmmehari if (skb_headroom(skb)<LEN_MPDU_DELIM) { 904f738aefaSmmehari struct sk_buff *skb_new; // in case original skb headroom is not enough to host MPDU delimiter 905f738aefaSmmehari printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_MPDU_DELIM\n", sdr_compatible_str, ring->bd_wr_idx); 906f738aefaSmmehari if ((skb_new = skb_realloc_headroom(skb, LEN_MPDU_DELIM)) == NULL) { 907838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 9082ee67178SXianjun Jiao goto openwifi_tx_early_out; 9092ee67178SXianjun Jiao } 9102ee67178SXianjun Jiao if (skb->sk != NULL) 9112ee67178SXianjun Jiao skb_set_owner_w(skb_new, skb->sk); 9122ee67178SXianjun Jiao dev_kfree_skb(skb); 9132ee67178SXianjun Jiao skb = skb_new; 9142ee67178SXianjun Jiao } 915f738aefaSmmehari skb_push( skb, LEN_MPDU_DELIM ); 916f738aefaSmmehari dma_buf = skb->data; 9172ee67178SXianjun Jiao 918f738aefaSmmehari // fill in MPDU delimiter 919f738aefaSmmehari *((u16*)(dma_buf+0)) = ((u16)(len_mpdu+LEN_PHY_CRC) << 4) & 0xFFF0; 920f738aefaSmmehari *((u8 *)(dma_buf+2)) = gen_mpdu_delim_crc(*((u16 *)dma_buf)); 921f738aefaSmmehari *((u8 *)(dma_buf+3)) = 0x4e; 922b6d71713Smmehari 923f738aefaSmmehari // Extend sk_buff to hold CRC + MPDU padding + empty MPDU delimiter 924f738aefaSmmehari num_byte_pad = num_dma_byte - (LEN_MPDU_DELIM + len_mpdu); 9252ee67178SXianjun Jiao if (skb_tailroom(skb)<num_byte_pad) { 926838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 9272ee67178SXianjun Jiao goto openwifi_tx_early_out; 9282ee67178SXianjun Jiao } 9292ee67178SXianjun Jiao skb_put( skb, num_byte_pad ); 9302ee67178SXianjun Jiao 931f738aefaSmmehari // fill in MPDU CRC 932f738aefaSmmehari *((u32*)(dma_buf+LEN_MPDU_DELIM+len_mpdu)) = gen_mpdu_crc(dma_buf+LEN_MPDU_DELIM, len_mpdu); 933f738aefaSmmehari 934f738aefaSmmehari // fill in MPDU delimiter padding 935f738aefaSmmehari memset(dma_buf+LEN_MPDU_DELIM+len_mpdu+LEN_PHY_CRC, 0, len_mpdu_delim_pad); 936f738aefaSmmehari 937f738aefaSmmehari // num_dma_byte is on 8-byte boundary and len_psdu is on 4 byte boundary. 938f738aefaSmmehari // If they have different lengths, add "empty MPDU delimiter" for alignment 939f738aefaSmmehari if(num_dma_byte == len_psdu + 4) 940f738aefaSmmehari { 941f738aefaSmmehari *((u32*)(dma_buf+len_psdu)) = 0x4e140000; 942f738aefaSmmehari len_psdu = num_dma_byte; 943f738aefaSmmehari } 944f738aefaSmmehari } 945f738aefaSmmehari else 946f738aefaSmmehari { 947c0981124Smmehari // Extend sk_buff to hold padding 948c0981124Smmehari num_byte_pad = num_dma_byte - len_mpdu; 949c0981124Smmehari if (skb_tailroom(skb)<num_byte_pad) { 950c0981124Smmehari printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 951c0981124Smmehari goto openwifi_tx_early_out; 952c0981124Smmehari } 953c0981124Smmehari skb_put( skb, num_byte_pad ); 954c0981124Smmehari 9552ee67178SXianjun Jiao dma_buf = skb->data; 956f738aefaSmmehari } 957f738aefaSmmehari // for(i = 0; i <= num_dma_symbol; i++) 958f738aefaSmmehari // printk("%16llx\n", (*(u64*)(&(dma_buf[i*8])))); 959f738aefaSmmehari 960f738aefaSmmehari rate_signal_value = (use_ht_rate ? rate_hw_value : wifi_mcs_table_11b_force_up[rate_hw_value]); 961f738aefaSmmehari 962f738aefaSmmehari retry_limit_hw_value = ( retry_limit_raw==0?0:((retry_limit_raw - 1)&0xF) ); 9632ee67178SXianjun Jiao 9642ee67178SXianjun Jiao cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 965f738aefaSmmehari cts_reg = ((use_cts_protect|force_use_cts_protect)<<31 | cts_use_traffic_rate<<30 | cts_duration<<8 | cts_rate_signal_value<<4 | rate_signal_value); 966f738aefaSmmehari tx_config = ( prio<<26 | ring->bd_wr_idx<<20 | queue_idx<<18 | retry_limit_hw_value<<14 | pkt_need_ack<<13 | (len_mpdu+LEN_PHY_CRC) ); 967f738aefaSmmehari phy_hdr_config = ( ht_aggr_start<<20 | rate_hw_value<<16 | use_ht_rate<<15 | use_short_gi<<14 | use_ht_aggr<<13 | len_psdu ); 9682ee67178SXianjun Jiao 9692ee67178SXianjun Jiao /* We must be sure that tx_flags is written last because the HW 9702ee67178SXianjun Jiao * looks at it to check if the rest of data is valid or not 9712ee67178SXianjun Jiao */ 9722ee67178SXianjun Jiao //wmb(); 9732ee67178SXianjun Jiao // entry->flags = cpu_to_le32(tx_flags); 974b1dd94e3Sluz paz /* We must be sure this has been written before following HW 975b1dd94e3Sluz paz * register write, because this write will make the HW attempts 9762ee67178SXianjun Jiao * to DMA the just-written data 9772ee67178SXianjun Jiao */ 9782ee67178SXianjun Jiao //wmb(); 9792ee67178SXianjun Jiao 980838a9007SXianjun Jiao spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 981838a9007SXianjun Jiao 982838a9007SXianjun Jiao // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 9830c0d5d82Smmehari dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 9840c0d5d82Smmehari hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 9850c0d5d82Smmehari if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 986838a9007SXianjun Jiao ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 9870c0d5d82Smmehari printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 9880c0d5d82Smmehari prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 989838a9007SXianjun Jiao ring->stop_flag = 1; 9900c0d5d82Smmehari goto openwifi_tx_early_out_after_lock; 991838a9007SXianjun Jiao } 992838a9007SXianjun Jiao // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 993838a9007SXianjun Jiao 994838a9007SXianjun Jiao status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 995838a9007SXianjun Jiao if (status!=DMA_COMPLETE) { 996838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 997838a9007SXianjun Jiao goto openwifi_tx_early_out_after_lock; 998838a9007SXianjun Jiao } 999838a9007SXianjun Jiao 10002ee67178SXianjun Jiao //-------------------------fire skb DMA to hardware---------------------------------- 10012ee67178SXianjun Jiao dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 10022ee67178SXianjun Jiao num_dma_byte, DMA_MEM_TO_DEV); 10032ee67178SXianjun Jiao 10042ee67178SXianjun Jiao if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 1005838a9007SXianjun Jiao // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 1006838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 1007838a9007SXianjun Jiao goto openwifi_tx_early_out_after_lock; 10082ee67178SXianjun Jiao } 10092ee67178SXianjun Jiao 101022dd0cc4SXianjun Jiao sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 10112ee67178SXianjun Jiao sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 10122ee67178SXianjun Jiao sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 10132ee67178SXianjun Jiao 10142ee67178SXianjun Jiao tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 1015f738aefaSmmehari tx_intf_api->TX_INTF_REG_TX_CONFIG_write(tx_config); 1016f738aefaSmmehari tx_intf_api->TX_INTF_REG_PHY_HDR_CONFIG_write(phy_hdr_config); 10172ee67178SXianjun Jiao priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 10182ee67178SXianjun Jiao if (!(priv->txd)) { 1019838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 10202ee67178SXianjun Jiao goto openwifi_tx_after_dma_mapping; 10212ee67178SXianjun Jiao } 10222ee67178SXianjun Jiao 10232ee67178SXianjun Jiao priv->tx_cookie = priv->txd->tx_submit(priv->txd); 10242ee67178SXianjun Jiao 10252ee67178SXianjun Jiao if (dma_submit_error(priv->tx_cookie)) { 1026838a9007SXianjun Jiao printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 10272ee67178SXianjun Jiao goto openwifi_tx_after_dma_mapping; 10282ee67178SXianjun Jiao } 10292ee67178SXianjun Jiao 1030b1dd94e3Sluz paz // seems everything is ok. let's mark this pkt in bd descriptor ring 1031f738aefaSmmehari ring->bds[ring->bd_wr_idx].seq_no = (sc&IEEE80211_SCTL_SEQ)>>4; 10322ee67178SXianjun Jiao ring->bds[ring->bd_wr_idx].skb_linked = skb; 10332ee67178SXianjun Jiao ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 10342ee67178SXianjun Jiao 10352ee67178SXianjun Jiao ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 10362ee67178SXianjun Jiao 10372ee67178SXianjun Jiao dma_async_issue_pending(priv->tx_chan); 10382ee67178SXianjun Jiao 10392ee67178SXianjun Jiao spin_unlock_irqrestore(&priv->lock, flags); 10402ee67178SXianjun Jiao 10412ee67178SXianjun Jiao return; 10422ee67178SXianjun Jiao 10432ee67178SXianjun Jiao openwifi_tx_after_dma_mapping: 10442ee67178SXianjun Jiao dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 10452ee67178SXianjun Jiao 1046838a9007SXianjun Jiao openwifi_tx_early_out_after_lock: 1047838a9007SXianjun Jiao dev_kfree_skb(skb); 10482ee67178SXianjun Jiao spin_unlock_irqrestore(&priv->lock, flags); 1049838a9007SXianjun Jiao // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 1050838a9007SXianjun Jiao return; 10512ee67178SXianjun Jiao 10522ee67178SXianjun Jiao openwifi_tx_early_out: 10532ee67178SXianjun Jiao dev_kfree_skb(skb); 1054838a9007SXianjun Jiao // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 10552ee67178SXianjun Jiao } 10562ee67178SXianjun Jiao 105756203843SXianjun Jiao static int openwifi_set_antenna(struct ieee80211_hw *dev, u32 tx_ant, u32 rx_ant) 105856203843SXianjun Jiao { 105956203843SXianjun Jiao struct openwifi_priv *priv = dev->priv; 106056203843SXianjun Jiao u8 fpga_tx_ant_setting, target_rx_ant; 106156203843SXianjun Jiao u32 atten_mdb_tx0, atten_mdb_tx1; 106256203843SXianjun Jiao struct ctrl_outs_control ctrl_out; 106356203843SXianjun Jiao int ret; 106456203843SXianjun Jiao 106556203843SXianjun Jiao printk("%s openwifi_set_antenna: tx_ant%d rx_ant%d\n",sdr_compatible_str,tx_ant,rx_ant); 106656203843SXianjun Jiao 106756203843SXianjun Jiao if (tx_ant >= 4 || tx_ant == 0) { 106856203843SXianjun Jiao return -EINVAL; 106956203843SXianjun Jiao } else if (rx_ant >= 3 || rx_ant == 0) { 107056203843SXianjun Jiao return -EINVAL; 107156203843SXianjun Jiao } 107256203843SXianjun Jiao 107356203843SXianjun Jiao fpga_tx_ant_setting = ((tx_ant<=2)?(tx_ant):(tx_ant+16)); 107456203843SXianjun Jiao target_rx_ant = ((rx_ant&1)?0:1); 107556203843SXianjun Jiao 107656203843SXianjun Jiao // try rf chip setting firstly, only update internal state variable when rf chip succeed 107756203843SXianjun Jiao atten_mdb_tx0 = ((tx_ant&1)?(AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT]):AD9361_RADIO_OFF_TX_ATT); 107856203843SXianjun Jiao atten_mdb_tx1 = ((tx_ant&2)?(AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT]):AD9361_RADIO_OFF_TX_ATT); 107956203843SXianjun Jiao ret = ad9361_set_tx_atten(priv->ad9361_phy, atten_mdb_tx0, true, false, true); 108056203843SXianjun Jiao if (ret < 0) { 108156203843SXianjun Jiao printk("%s openwifi_set_antenna: WARNING ad9361_set_tx_atten ant0 %d FAIL!\n",sdr_compatible_str, atten_mdb_tx0); 108256203843SXianjun Jiao return -EINVAL; 108356203843SXianjun Jiao } else { 108456203843SXianjun Jiao printk("%s openwifi_set_antenna: ad9361_set_tx_atten ant0 %d OK\n",sdr_compatible_str, atten_mdb_tx0); 108556203843SXianjun Jiao } 108656203843SXianjun Jiao ret = ad9361_set_tx_atten(priv->ad9361_phy, atten_mdb_tx1, false, true, true); 108756203843SXianjun Jiao if (ret < 0) { 108856203843SXianjun Jiao printk("%s openwifi_set_antenna: WARNING ad9361_set_tx_atten ant1 %d FAIL!\n",sdr_compatible_str, atten_mdb_tx1); 108956203843SXianjun Jiao return -EINVAL; 109056203843SXianjun Jiao } else { 109156203843SXianjun Jiao printk("%s openwifi_set_antenna: ad9361_set_tx_atten ant1 %d OK\n",sdr_compatible_str, atten_mdb_tx1); 109256203843SXianjun Jiao } 109356203843SXianjun Jiao 109456203843SXianjun Jiao ctrl_out.en_mask = priv->ctrl_out.en_mask; 109556203843SXianjun Jiao ctrl_out.index = (target_rx_ant==0?AD9361_CTRL_OUT_INDEX_ANT0:AD9361_CTRL_OUT_INDEX_ANT1); 109656203843SXianjun Jiao ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(ctrl_out)); 109756203843SXianjun Jiao if (ret < 0) { 109856203843SXianjun Jiao printk("%s openwifi_set_antenna: WARNING ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x FAIL!\n",sdr_compatible_str, ctrl_out.en_mask, ctrl_out.index); 109956203843SXianjun Jiao return -EINVAL; 110056203843SXianjun Jiao } else { 110156203843SXianjun Jiao printk("%s openwifi_set_antenna: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, ctrl_out.en_mask, ctrl_out.index); 110256203843SXianjun Jiao } 110356203843SXianjun Jiao 110456203843SXianjun Jiao tx_intf_api->TX_INTF_REG_ANT_SEL_write(fpga_tx_ant_setting); 110556203843SXianjun Jiao ret = tx_intf_api->TX_INTF_REG_ANT_SEL_read(); 110656203843SXianjun Jiao if (ret != fpga_tx_ant_setting) { 110756203843SXianjun Jiao printk("%s openwifi_set_antenna: WARNING TX_INTF_REG_ANT_SEL_write target %d read back %d\n",sdr_compatible_str, fpga_tx_ant_setting, ret); 110856203843SXianjun Jiao return -EINVAL; 110956203843SXianjun Jiao } else { 111056203843SXianjun Jiao printk("%s openwifi_set_antenna: TX_INTF_REG_ANT_SEL_write value %d\n",sdr_compatible_str, ret); 111156203843SXianjun Jiao } 111256203843SXianjun Jiao 111356203843SXianjun Jiao rx_intf_api->RX_INTF_REG_ANT_SEL_write(target_rx_ant); 111456203843SXianjun Jiao ret = rx_intf_api->RX_INTF_REG_ANT_SEL_read(); 111556203843SXianjun Jiao if (ret != target_rx_ant) { 111656203843SXianjun Jiao printk("%s openwifi_set_antenna: WARNING RX_INTF_REG_ANT_SEL_write target %d read back %d\n",sdr_compatible_str, target_rx_ant, ret); 111756203843SXianjun Jiao return -EINVAL; 111856203843SXianjun Jiao } else { 111956203843SXianjun Jiao printk("%s openwifi_set_antenna: RX_INTF_REG_ANT_SEL_write value %d\n",sdr_compatible_str, ret); 112056203843SXianjun Jiao } 112156203843SXianjun Jiao 112256203843SXianjun Jiao // update internal state variable 112356203843SXianjun Jiao priv->runtime_tx_ant_cfg = tx_ant; 112456203843SXianjun Jiao priv->runtime_rx_ant_cfg = rx_ant; 112556203843SXianjun Jiao 112656203843SXianjun Jiao if (TX_OFFSET_TUNING_ENABLE) 112756203843SXianjun Jiao priv->tx_intf_cfg = ((tx_ant&1)?TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0:TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1);//NO USE 112856203843SXianjun Jiao else { 112956203843SXianjun Jiao if (tx_ant == 3) 113056203843SXianjun Jiao priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_0MHZ_ANT_BOTH; 113156203843SXianjun Jiao else 113256203843SXianjun Jiao priv->tx_intf_cfg = ((tx_ant&1)?TX_INTF_BW_20MHZ_AT_0MHZ_ANT0:TX_INTF_BW_20MHZ_AT_0MHZ_ANT1); 113356203843SXianjun Jiao } 113456203843SXianjun Jiao 113556203843SXianjun Jiao priv->rx_intf_cfg = (target_rx_ant==0?RX_INTF_BW_20MHZ_AT_0MHZ_ANT0:RX_INTF_BW_20MHZ_AT_0MHZ_ANT1); 113656203843SXianjun Jiao priv->ctrl_out.index=ctrl_out.index; 113756203843SXianjun Jiao 113856203843SXianjun Jiao priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 113956203843SXianjun Jiao priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 114056203843SXianjun Jiao 114156203843SXianjun Jiao return 0; 114256203843SXianjun Jiao } 114356203843SXianjun Jiao static int openwifi_get_antenna(struct ieee80211_hw *dev, u32 *tx_ant, u32 *rx_ant) 114456203843SXianjun Jiao { 114556203843SXianjun Jiao struct openwifi_priv *priv = dev->priv; 114656203843SXianjun Jiao 114756203843SXianjun Jiao *tx_ant = priv->runtime_tx_ant_cfg; 114856203843SXianjun Jiao *rx_ant = priv->runtime_rx_ant_cfg; 114956203843SXianjun Jiao 115056203843SXianjun Jiao printk("%s openwifi_get_antenna: tx_ant%d rx_ant%d\n",sdr_compatible_str, *tx_ant, *rx_ant); 115156203843SXianjun Jiao 115256203843SXianjun Jiao printk("%s openwifi_get_antenna: drv tx cfg %d offset %d drv rx cfg %d offset %d drv ctrl_out sel %x\n",sdr_compatible_str, 115356203843SXianjun Jiao priv->tx_intf_cfg, priv->tx_freq_offset_to_lo_MHz, priv->rx_intf_cfg, priv->rx_freq_offset_to_lo_MHz, priv->ctrl_out.index); 115456203843SXianjun Jiao 115556203843SXianjun Jiao printk("%s openwifi_get_antenna: fpga tx sel %d rx sel %d\n", sdr_compatible_str, 115656203843SXianjun Jiao tx_intf_api->TX_INTF_REG_ANT_SEL_read(), rx_intf_api->RX_INTF_REG_ANT_SEL_read()); 115756203843SXianjun Jiao 115856203843SXianjun Jiao printk("%s openwifi_get_antenna: rf tx att0 %d tx att1 %d ctrl_out sel %x\n", sdr_compatible_str, 115956203843SXianjun Jiao ad9361_get_tx_atten(priv->ad9361_phy, 1), ad9361_get_tx_atten(priv->ad9361_phy, 2), ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER)); 116056203843SXianjun Jiao 116156203843SXianjun Jiao return 0; 116256203843SXianjun Jiao } 116356203843SXianjun Jiao 11642ee67178SXianjun Jiao static int openwifi_start(struct ieee80211_hw *dev) 11652ee67178SXianjun Jiao { 11662ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 11672ee67178SXianjun Jiao int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 11682ee67178SXianjun Jiao u32 reg; 11692ee67178SXianjun Jiao 11702ee67178SXianjun Jiao for (i=0; i<MAX_NUM_VIF; i++) { 11712ee67178SXianjun Jiao priv->vif[i] = NULL; 11722ee67178SXianjun Jiao } 11732ee67178SXianjun Jiao 1174e21492d7SXianjun Jiao // //keep software registers persistent between NIC down and up for multiple times 1175e21492d7SXianjun Jiao /*memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 1176838a9007SXianjun Jiao memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 1177838a9007SXianjun Jiao memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 1178e21492d7SXianjun Jiao memset(priv->rf_reg_val,0,sizeof(priv->rf_reg_val)); 1179e21492d7SXianjun Jiao priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV;*/ 1180838a9007SXianjun Jiao 11812ee67178SXianjun Jiao //turn on radio 118256203843SXianjun Jiao openwifi_set_antenna(dev, priv->runtime_tx_ant_cfg, priv->runtime_rx_ant_cfg); 118356203843SXianjun Jiao reg = ad9361_get_tx_atten(priv->ad9361_phy, ((priv->runtime_tx_ant_cfg==1 || priv->runtime_tx_ant_cfg==3)?1:2)); 118456203843SXianjun Jiao if (reg == (AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT])) { 11852ee67178SXianjun Jiao priv->rfkill_off = 1;// 0 off, 1 on 11862ee67178SXianjun Jiao printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 11872ee67178SXianjun Jiao } 11882ee67178SXianjun Jiao else 118956203843SXianjun Jiao printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT]); 11902ee67178SXianjun Jiao 11912ee67178SXianjun Jiao rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 11920c0d5d82Smmehari tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 11932ee67178SXianjun Jiao openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 11942ee67178SXianjun Jiao openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 11952ee67178SXianjun Jiao xpu_api->hw_init(priv->xpu_cfg); 11962ee67178SXianjun Jiao 11972ee67178SXianjun Jiao agc_gain_delay = 50; //samples 119809316927SJiao Xianjun rssi_half_db_offset = 150; // to be consistent 11992ee67178SXianjun Jiao xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 12002ee67178SXianjun Jiao xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 12012ee67178SXianjun Jiao 12022ee67178SXianjun Jiao openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1203b1dd94e3Sluz paz // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 12042ee67178SXianjun Jiao // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1205bb0a2c58SXianjun Jiao xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 12062ee67178SXianjun Jiao 1207febc5adfSXianjun Jiao //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1208febc5adfSXianjun Jiao //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1209febc5adfSXianjun Jiao xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 12102ee67178SXianjun Jiao 12112238b42bSweiliu xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 12122238b42bSweiliu xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 12132ee67178SXianjun Jiao 1214febc5adfSXianjun Jiao tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 12152ee67178SXianjun Jiao 12165deb8d18SXianjun Jiao // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 12175deb8d18SXianjun Jiao // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 12182ee67178SXianjun Jiao xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 12192ee67178SXianjun Jiao 1220838a9007SXianjun Jiao // setup time schedule of 4 slices 1221838a9007SXianjun Jiao // slice 0 1222838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1223838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1224838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1225838a9007SXianjun Jiao 1226838a9007SXianjun Jiao // slice 1 1227838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1228838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1229838a9007SXianjun Jiao //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1230838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1231838a9007SXianjun Jiao 1232838a9007SXianjun Jiao // slice 2 1233838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1234838a9007SXianjun Jiao //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1235838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1236838a9007SXianjun Jiao //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1237838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1238838a9007SXianjun Jiao 1239838a9007SXianjun Jiao // slice 3 1240838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1241838a9007SXianjun Jiao //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1242838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1243838a9007SXianjun Jiao //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1244838a9007SXianjun Jiao xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1245838a9007SXianjun Jiao 1246838a9007SXianjun Jiao // all slice sync rest 1247838a9007SXianjun Jiao xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1248838a9007SXianjun Jiao xpu_api->XPU_REG_MULTI_RST_write(0<<7); 12492ee67178SXianjun Jiao 12502ee67178SXianjun Jiao //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 12512ee67178SXianjun Jiao printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 12522ee67178SXianjun Jiao printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 12532ee67178SXianjun Jiao 125422dd0cc4SXianjun Jiao tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 12552ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 12562ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 12572ee67178SXianjun Jiao 12582ee67178SXianjun Jiao if (test_mode==1) { 12592ee67178SXianjun Jiao printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 12602ee67178SXianjun Jiao goto normal_out; 12612ee67178SXianjun Jiao } 12622ee67178SXianjun Jiao 12632ee67178SXianjun Jiao priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1264c687b19dSXianjun Jiao if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) { 12652ee67178SXianjun Jiao ret = PTR_ERR(priv->rx_chan); 1266c687b19dSXianjun Jiao pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan); 12672ee67178SXianjun Jiao goto err_dma; 12682ee67178SXianjun Jiao } 12692ee67178SXianjun Jiao 12702ee67178SXianjun Jiao priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1271c687b19dSXianjun Jiao if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) { 12722ee67178SXianjun Jiao ret = PTR_ERR(priv->tx_chan); 1273c687b19dSXianjun Jiao pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan); 12742ee67178SXianjun Jiao goto err_dma; 12752ee67178SXianjun Jiao } 1276c687b19dSXianjun Jiao printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan); 12772ee67178SXianjun Jiao 12782ee67178SXianjun Jiao ret = openwifi_init_rx_ring(priv); 12792ee67178SXianjun Jiao if (ret) { 12802ee67178SXianjun Jiao printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 12812ee67178SXianjun Jiao goto err_free_rings; 12822ee67178SXianjun Jiao } 12832ee67178SXianjun Jiao 12842ee67178SXianjun Jiao priv->seqno=0; 1285838a9007SXianjun Jiao for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1286838a9007SXianjun Jiao if ((ret = openwifi_init_tx_ring(priv, i))) { 1287838a9007SXianjun Jiao printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 12882ee67178SXianjun Jiao goto err_free_rings; 12892ee67178SXianjun Jiao } 1290838a9007SXianjun Jiao } 12912ee67178SXianjun Jiao 12922ee67178SXianjun Jiao if ( (ret = rx_dma_setup(dev)) ) { 12932ee67178SXianjun Jiao printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 12942ee67178SXianjun Jiao goto err_free_rings; 12952ee67178SXianjun Jiao } 12962ee67178SXianjun Jiao 12972ee67178SXianjun Jiao priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 12982ee67178SXianjun Jiao ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 12992ee67178SXianjun Jiao IRQF_SHARED, "sdr,rx_pkt_intr", dev); 13002ee67178SXianjun Jiao if (ret) { 13012ee67178SXianjun Jiao wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 13022ee67178SXianjun Jiao goto err_free_rings; 13032ee67178SXianjun Jiao } else { 13042ee67178SXianjun Jiao printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 13052ee67178SXianjun Jiao } 13062ee67178SXianjun Jiao 13072ee67178SXianjun Jiao priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 13082ee67178SXianjun Jiao ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1309c24e0a04SXianjun Jiao IRQF_SHARED, "sdr,tx_itrpt", dev); 13102ee67178SXianjun Jiao if (ret) { 13112ee67178SXianjun Jiao wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 13122ee67178SXianjun Jiao goto err_free_rings; 13132ee67178SXianjun Jiao } else { 13142ee67178SXianjun Jiao printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 13152ee67178SXianjun Jiao } 13162ee67178SXianjun Jiao 13172ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 131822dd0cc4SXianjun Jiao tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 13192ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 13202ee67178SXianjun Jiao xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 13212ee67178SXianjun Jiao 13222ee67178SXianjun Jiao //ieee80211_wake_queue(dev, 0); 13232ee67178SXianjun Jiao 13242ee67178SXianjun Jiao normal_out: 13252ee67178SXianjun Jiao printk("%s openwifi_start: normal end\n", sdr_compatible_str); 13262ee67178SXianjun Jiao return 0; 13272ee67178SXianjun Jiao 13282ee67178SXianjun Jiao err_free_rings: 13292ee67178SXianjun Jiao openwifi_free_rx_ring(priv); 1330838a9007SXianjun Jiao for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1331838a9007SXianjun Jiao openwifi_free_tx_ring(priv, i); 13322ee67178SXianjun Jiao 13332ee67178SXianjun Jiao err_dma: 13342ee67178SXianjun Jiao ret = -1; 13352ee67178SXianjun Jiao printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 13362ee67178SXianjun Jiao return ret; 13372ee67178SXianjun Jiao } 13382ee67178SXianjun Jiao 13392ee67178SXianjun Jiao static void openwifi_stop(struct ieee80211_hw *dev) 13402ee67178SXianjun Jiao { 13412ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 13422ee67178SXianjun Jiao u32 reg, reg1; 13432ee67178SXianjun Jiao int i; 13442ee67178SXianjun Jiao 13452ee67178SXianjun Jiao if (test_mode==1){ 13462ee67178SXianjun Jiao pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 13472ee67178SXianjun Jiao goto normal_out; 13482ee67178SXianjun Jiao } 13492ee67178SXianjun Jiao 13502ee67178SXianjun Jiao //turn off radio 13512ee67178SXianjun Jiao #if 1 13522ee67178SXianjun Jiao ad9361_tx_mute(priv->ad9361_phy, 1); 13532ee67178SXianjun Jiao reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 13542ee67178SXianjun Jiao reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 13552ee67178SXianjun Jiao if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 13562ee67178SXianjun Jiao priv->rfkill_off = 0;// 0 off, 1 on 13572ee67178SXianjun Jiao printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 13582ee67178SXianjun Jiao } 13592ee67178SXianjun Jiao else 13602ee67178SXianjun Jiao printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 13612ee67178SXianjun Jiao #endif 13622ee67178SXianjun Jiao 13632ee67178SXianjun Jiao //ieee80211_stop_queue(dev, 0); 136422dd0cc4SXianjun Jiao tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 13652ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 13662ee67178SXianjun Jiao rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 13672ee67178SXianjun Jiao 13682ee67178SXianjun Jiao for (i=0; i<MAX_NUM_VIF; i++) { 13692ee67178SXianjun Jiao priv->vif[i] = NULL; 13702ee67178SXianjun Jiao } 13712ee67178SXianjun Jiao 13722ee67178SXianjun Jiao openwifi_free_rx_ring(priv); 1373838a9007SXianjun Jiao for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1374838a9007SXianjun Jiao openwifi_free_tx_ring(priv, i); 13752ee67178SXianjun Jiao 13762ee67178SXianjun Jiao pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 13772ee67178SXianjun Jiao dmaengine_terminate_all(priv->rx_chan); 13782ee67178SXianjun Jiao dma_release_channel(priv->rx_chan); 13792ee67178SXianjun Jiao pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 13802ee67178SXianjun Jiao dmaengine_terminate_all(priv->tx_chan); 13812ee67178SXianjun Jiao dma_release_channel(priv->tx_chan); 13822ee67178SXianjun Jiao 13832ee67178SXianjun Jiao //priv->rf->stop(dev); 13842ee67178SXianjun Jiao 13852ee67178SXianjun Jiao free_irq(priv->irq_rx, dev); 13862ee67178SXianjun Jiao free_irq(priv->irq_tx, dev); 13872ee67178SXianjun Jiao 13882ee67178SXianjun Jiao normal_out: 13892ee67178SXianjun Jiao printk("%s openwifi_stop\n", sdr_compatible_str); 13902ee67178SXianjun Jiao } 13912ee67178SXianjun Jiao 13922ee67178SXianjun Jiao static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 13932ee67178SXianjun Jiao struct ieee80211_vif *vif) 13942ee67178SXianjun Jiao { 13952ee67178SXianjun Jiao u32 tsft_low, tsft_high; 13962ee67178SXianjun Jiao 13972ee67178SXianjun Jiao tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 13982ee67178SXianjun Jiao tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 13992ee67178SXianjun Jiao //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 14002ee67178SXianjun Jiao return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 14012ee67178SXianjun Jiao } 14022ee67178SXianjun Jiao 14032ee67178SXianjun Jiao static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 14042ee67178SXianjun Jiao { 14052ee67178SXianjun Jiao u32 tsft_high = ((tsf >> 32)&0xffffffff); 14062ee67178SXianjun Jiao u32 tsft_low = (tsf&0xffffffff); 14072ee67178SXianjun Jiao xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 14082ee67178SXianjun Jiao printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 14092ee67178SXianjun Jiao } 14102ee67178SXianjun Jiao 14112ee67178SXianjun Jiao static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 14122ee67178SXianjun Jiao { 14132ee67178SXianjun Jiao xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 14142ee67178SXianjun Jiao printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 14152ee67178SXianjun Jiao } 14162ee67178SXianjun Jiao 14172ee67178SXianjun Jiao static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 14182ee67178SXianjun Jiao { 14192ee67178SXianjun Jiao printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 14202ee67178SXianjun Jiao return(0); 14212ee67178SXianjun Jiao } 14222ee67178SXianjun Jiao 14232ee67178SXianjun Jiao static void openwifi_beacon_work(struct work_struct *work) 14242ee67178SXianjun Jiao { 14252ee67178SXianjun Jiao struct openwifi_vif *vif_priv = 14262ee67178SXianjun Jiao container_of(work, struct openwifi_vif, beacon_work.work); 14272ee67178SXianjun Jiao struct ieee80211_vif *vif = 14282ee67178SXianjun Jiao container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 14292ee67178SXianjun Jiao struct ieee80211_hw *dev = vif_priv->dev; 14302ee67178SXianjun Jiao struct ieee80211_mgmt *mgmt; 14312ee67178SXianjun Jiao struct sk_buff *skb; 14322ee67178SXianjun Jiao 14332ee67178SXianjun Jiao /* don't overflow the tx ring */ 14342ee67178SXianjun Jiao if (ieee80211_queue_stopped(dev, 0)) 14352ee67178SXianjun Jiao goto resched; 14362ee67178SXianjun Jiao 14372ee67178SXianjun Jiao /* grab a fresh beacon */ 14382ee67178SXianjun Jiao skb = ieee80211_beacon_get(dev, vif); 14392ee67178SXianjun Jiao if (!skb) 14402ee67178SXianjun Jiao goto resched; 14412ee67178SXianjun Jiao 14422ee67178SXianjun Jiao /* 14432ee67178SXianjun Jiao * update beacon timestamp w/ TSF value 14442ee67178SXianjun Jiao * TODO: make hardware update beacon timestamp 14452ee67178SXianjun Jiao */ 14462ee67178SXianjun Jiao mgmt = (struct ieee80211_mgmt *)skb->data; 14472ee67178SXianjun Jiao mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 14482ee67178SXianjun Jiao 14492ee67178SXianjun Jiao /* TODO: use actual beacon queue */ 14502ee67178SXianjun Jiao skb_set_queue_mapping(skb, 0); 14512ee67178SXianjun Jiao openwifi_tx(dev, NULL, skb); 14522ee67178SXianjun Jiao 14532ee67178SXianjun Jiao resched: 14542ee67178SXianjun Jiao /* 14552ee67178SXianjun Jiao * schedule next beacon 14562ee67178SXianjun Jiao * TODO: use hardware support for beacon timing 14572ee67178SXianjun Jiao */ 14582ee67178SXianjun Jiao schedule_delayed_work(&vif_priv->beacon_work, 14592ee67178SXianjun Jiao usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 14602ee67178SXianjun Jiao } 14612ee67178SXianjun Jiao 14622ee67178SXianjun Jiao static int openwifi_add_interface(struct ieee80211_hw *dev, 14632ee67178SXianjun Jiao struct ieee80211_vif *vif) 14642ee67178SXianjun Jiao { 14652ee67178SXianjun Jiao int i; 14662ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 14672ee67178SXianjun Jiao struct openwifi_vif *vif_priv; 14682ee67178SXianjun Jiao 14692ee67178SXianjun Jiao switch (vif->type) { 14702ee67178SXianjun Jiao case NL80211_IFTYPE_AP: 14712ee67178SXianjun Jiao case NL80211_IFTYPE_STATION: 14722ee67178SXianjun Jiao case NL80211_IFTYPE_ADHOC: 14732ee67178SXianjun Jiao case NL80211_IFTYPE_MONITOR: 14742ee67178SXianjun Jiao case NL80211_IFTYPE_MESH_POINT: 14752ee67178SXianjun Jiao break; 14762ee67178SXianjun Jiao default: 14772ee67178SXianjun Jiao return -EOPNOTSUPP; 14782ee67178SXianjun Jiao } 14792ee67178SXianjun Jiao // let's support more than 1 interface 14802ee67178SXianjun Jiao for (i=0; i<MAX_NUM_VIF; i++) { 14812ee67178SXianjun Jiao if (priv->vif[i] == NULL) 14822ee67178SXianjun Jiao break; 14832ee67178SXianjun Jiao } 14842ee67178SXianjun Jiao 14852ee67178SXianjun Jiao printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 14862ee67178SXianjun Jiao 14872ee67178SXianjun Jiao if (i==MAX_NUM_VIF) 14882ee67178SXianjun Jiao return -EBUSY; 14892ee67178SXianjun Jiao 14902ee67178SXianjun Jiao priv->vif[i] = vif; 14912ee67178SXianjun Jiao 14922ee67178SXianjun Jiao /* Initialize driver private area */ 14932ee67178SXianjun Jiao vif_priv = (struct openwifi_vif *)&vif->drv_priv; 14942ee67178SXianjun Jiao vif_priv->idx = i; 14952ee67178SXianjun Jiao 14962ee67178SXianjun Jiao vif_priv->dev = dev; 14972ee67178SXianjun Jiao INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 14982ee67178SXianjun Jiao vif_priv->enable_beacon = false; 14992ee67178SXianjun Jiao 15002ee67178SXianjun Jiao printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 15012ee67178SXianjun Jiao 15022ee67178SXianjun Jiao return 0; 15032ee67178SXianjun Jiao } 15042ee67178SXianjun Jiao 15052ee67178SXianjun Jiao static void openwifi_remove_interface(struct ieee80211_hw *dev, 15062ee67178SXianjun Jiao struct ieee80211_vif *vif) 15072ee67178SXianjun Jiao { 15082ee67178SXianjun Jiao struct openwifi_vif *vif_priv; 15092ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 15102ee67178SXianjun Jiao 15112ee67178SXianjun Jiao vif_priv = (struct openwifi_vif *)&vif->drv_priv; 15122ee67178SXianjun Jiao priv->vif[vif_priv->idx] = NULL; 15132ee67178SXianjun Jiao printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 15142ee67178SXianjun Jiao } 15152ee67178SXianjun Jiao 15162ee67178SXianjun Jiao static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 15172ee67178SXianjun Jiao { 15182ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 15192ee67178SXianjun Jiao struct ieee80211_conf *conf = &dev->conf; 15202ee67178SXianjun Jiao 15212ee67178SXianjun Jiao if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 15222ee67178SXianjun Jiao priv->rf->set_chan(dev, conf); 15232ee67178SXianjun Jiao else 15242ee67178SXianjun Jiao printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 15252ee67178SXianjun Jiao 15262ee67178SXianjun Jiao return 0; 15272ee67178SXianjun Jiao } 15282ee67178SXianjun Jiao 15292ee67178SXianjun Jiao static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 15302ee67178SXianjun Jiao struct ieee80211_vif *vif, 15312ee67178SXianjun Jiao struct ieee80211_bss_conf *info, 15322ee67178SXianjun Jiao u32 changed) 15332ee67178SXianjun Jiao { 15342ee67178SXianjun Jiao struct openwifi_priv *priv = dev->priv; 15352ee67178SXianjun Jiao struct openwifi_vif *vif_priv; 15362ee67178SXianjun Jiao u32 bssid_low, bssid_high; 15372ee67178SXianjun Jiao 15382ee67178SXianjun Jiao vif_priv = (struct openwifi_vif *)&vif->drv_priv; 15392ee67178SXianjun Jiao 15402ee67178SXianjun Jiao //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 15412ee67178SXianjun Jiao //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 15422ee67178SXianjun Jiao if (changed & BSS_CHANGED_BSSID) { 15432ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 15442ee67178SXianjun Jiao // write new bssid to our HW, and do not change bssid filter 15452ee67178SXianjun Jiao //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 15462ee67178SXianjun Jiao bssid_low = ( *( (u32*)(info->bssid) ) ); 15472ee67178SXianjun Jiao bssid_high = ( *( (u16*)(info->bssid+4) ) ); 15482ee67178SXianjun Jiao 15492ee67178SXianjun Jiao //bssid_filter_high = (bssid_filter_high&0x80000000); 15502ee67178SXianjun Jiao //bssid_high = (bssid_high|bssid_filter_high); 15512ee67178SXianjun Jiao xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 15522ee67178SXianjun Jiao xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 15532ee67178SXianjun Jiao } 15542ee67178SXianjun Jiao 15552ee67178SXianjun Jiao if (changed & BSS_CHANGED_BEACON_INT) { 15562ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 15572ee67178SXianjun Jiao } 15582ee67178SXianjun Jiao 15592ee67178SXianjun Jiao if (changed & BSS_CHANGED_TXPOWER) 15602ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 15612ee67178SXianjun Jiao 15622ee67178SXianjun Jiao if (changed & BSS_CHANGED_ERP_CTS_PROT) 15632ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 15642ee67178SXianjun Jiao 15652ee67178SXianjun Jiao if (changed & BSS_CHANGED_BASIC_RATES) 15662ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 15672ee67178SXianjun Jiao 15682ee67178SXianjun Jiao if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 15692ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 15702ee67178SXianjun Jiao changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 15712ee67178SXianjun Jiao if (info->use_short_slot && priv->use_short_slot==false) { 15722ee67178SXianjun Jiao priv->use_short_slot=true; 15732ee67178SXianjun Jiao xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 15742ee67178SXianjun Jiao } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 15752ee67178SXianjun Jiao priv->use_short_slot=false; 15762ee67178SXianjun Jiao xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 15772ee67178SXianjun Jiao } 15782ee67178SXianjun Jiao } 15792ee67178SXianjun Jiao 15802ee67178SXianjun Jiao if (changed & BSS_CHANGED_BEACON_ENABLED) { 15812ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 15822ee67178SXianjun Jiao vif_priv->enable_beacon = info->enable_beacon; 15832ee67178SXianjun Jiao } 15842ee67178SXianjun Jiao 15852ee67178SXianjun Jiao if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 15862ee67178SXianjun Jiao cancel_delayed_work_sync(&vif_priv->beacon_work); 15872ee67178SXianjun Jiao if (vif_priv->enable_beacon) 15882ee67178SXianjun Jiao schedule_work(&vif_priv->beacon_work.work); 15892ee67178SXianjun Jiao printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 15902ee67178SXianjun Jiao changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 15912ee67178SXianjun Jiao } 15922ee67178SXianjun Jiao } 15932238b42bSweiliu // helper function 15942238b42bSweiliu u32 log2val(u32 val){ 15952238b42bSweiliu u32 ret_val = 0 ; 15962238b42bSweiliu while(val>1){ 15972238b42bSweiliu val = val >> 1 ; 15982238b42bSweiliu ret_val ++ ; 15992238b42bSweiliu } 16002238b42bSweiliu return ret_val ; 16012238b42bSweiliu } 16022ee67178SXianjun Jiao 16032ee67178SXianjun Jiao static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 16042ee67178SXianjun Jiao const struct ieee80211_tx_queue_params *params) 16052ee67178SXianjun Jiao { 1606bb0a2c58SXianjun Jiao u32 reg_val, cw_min_exp, cw_max_exp; 1607027d42ecSXianjun Jiao 1608bb0a2c58SXianjun Jiao printk("%s openwifi_conf_tx: [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 16092ee67178SXianjun Jiao sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1610027d42ecSXianjun Jiao 1611bb0a2c58SXianjun Jiao reg_val=xpu_api->XPU_REG_CSMA_CFG_read(); 16122238b42bSweiliu cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 16132238b42bSweiliu cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 16142238b42bSweiliu switch(queue){ 1615bb0a2c58SXianjun Jiao case 0: reg_val = ( (reg_val & 0xFFFFFF00) | ((cw_min_exp | (cw_max_exp << 4)) << 0) ); break; 1616bb0a2c58SXianjun Jiao case 1: reg_val = ( (reg_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8) ); break; 1617bb0a2c58SXianjun Jiao case 2: reg_val = ( (reg_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16) ); break; 1618bb0a2c58SXianjun Jiao case 3: reg_val = ( (reg_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24) ); break; 16192238b42bSweiliu default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 16202238b42bSweiliu } 1621bb0a2c58SXianjun Jiao xpu_api->XPU_REG_CSMA_CFG_write(reg_val); 16222ee67178SXianjun Jiao return(0); 16232ee67178SXianjun Jiao } 16242ee67178SXianjun Jiao 16252ee67178SXianjun Jiao static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 16262ee67178SXianjun Jiao struct netdev_hw_addr_list *mc_list) 16272ee67178SXianjun Jiao { 16282ee67178SXianjun Jiao printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 16292ee67178SXianjun Jiao return netdev_hw_addr_list_count(mc_list); 16302ee67178SXianjun Jiao } 16312ee67178SXianjun Jiao 16322ee67178SXianjun Jiao static void openwifi_configure_filter(struct ieee80211_hw *dev, 16332ee67178SXianjun Jiao unsigned int changed_flags, 16342ee67178SXianjun Jiao unsigned int *total_flags, 16352ee67178SXianjun Jiao u64 multicast) 16362ee67178SXianjun Jiao { 16372ee67178SXianjun Jiao u32 filter_flag; 16382ee67178SXianjun Jiao 16392ee67178SXianjun Jiao (*total_flags) &= SDR_SUPPORTED_FILTERS; 16405deb8d18SXianjun Jiao (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 16412ee67178SXianjun Jiao 16422ee67178SXianjun Jiao filter_flag = (*total_flags); 16432ee67178SXianjun Jiao 16442ee67178SXianjun Jiao filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 16452ee67178SXianjun Jiao //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 16462ee67178SXianjun Jiao 16472054f92cSXianjun Jiao //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 16482054f92cSXianjun Jiao if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 16492ee67178SXianjun Jiao filter_flag = (filter_flag|MONITOR_ALL); 16502054f92cSXianjun Jiao else 16512054f92cSXianjun Jiao filter_flag = (filter_flag&(~MONITOR_ALL)); 16522ee67178SXianjun Jiao 16532054f92cSXianjun Jiao if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 16542ee67178SXianjun Jiao filter_flag = (filter_flag|MY_BEACON); 16552ee67178SXianjun Jiao 16562ee67178SXianjun Jiao filter_flag = (filter_flag|FIF_PSPOLL); 16572ee67178SXianjun Jiao 16582ee67178SXianjun Jiao xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 16592ee67178SXianjun Jiao //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 16602ee67178SXianjun Jiao 16612ee67178SXianjun Jiao printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 16622ee67178SXianjun Jiao (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 16632ee67178SXianjun Jiao } 16642ee67178SXianjun Jiao 1665261bb9eeSmmehari static int openwifi_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_ampdu_params *params) 1666261bb9eeSmmehari { 1667261bb9eeSmmehari struct ieee80211_sta *sta = params->sta; 1668261bb9eeSmmehari enum ieee80211_ampdu_mlme_action action = params->action; 16692ae501caSXianjun Jiao // struct openwifi_priv *priv = hw->priv; 16709cd584f8Smmehari u16 max_tx_bytes, buf_size; 1671f738aefaSmmehari u32 ampdu_action_config; 1672261bb9eeSmmehari 1673*76b1a6a1SXianjun Jiao if (!AGGR_ENABLE) { 1674*76b1a6a1SXianjun Jiao return -EOPNOTSUPP; 1675*76b1a6a1SXianjun Jiao } 1676*76b1a6a1SXianjun Jiao 1677261bb9eeSmmehari switch (action) 1678261bb9eeSmmehari { 1679261bb9eeSmmehari case IEEE80211_AMPDU_TX_START: 1680261bb9eeSmmehari ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1681261bb9eeSmmehari break; 1682261bb9eeSmmehari case IEEE80211_AMPDU_TX_STOP_CONT: 1683261bb9eeSmmehari case IEEE80211_AMPDU_TX_STOP_FLUSH: 1684261bb9eeSmmehari case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 1685261bb9eeSmmehari ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, params->tid); 1686261bb9eeSmmehari break; 1687261bb9eeSmmehari case IEEE80211_AMPDU_TX_OPERATIONAL: 1688f738aefaSmmehari buf_size = 4; 1689f738aefaSmmehari // buf_size = (params->buf_size) - 1; 1690f738aefaSmmehari max_tx_bytes = (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + sta->ht_cap.ampdu_factor)) - 1; 16919cd584f8Smmehari ampdu_action_config = ( sta->ht_cap.ampdu_density<<24 | buf_size<<16 | max_tx_bytes ); 1692f738aefaSmmehari tx_intf_api->TX_INTF_REG_AMPDU_ACTION_CONFIG_write(ampdu_action_config); 1693261bb9eeSmmehari break; 1694261bb9eeSmmehari case IEEE80211_AMPDU_RX_START: 16952ae501caSXianjun Jiao printk("%s openwifi_ampdu_action: start RX aggregation. tid %d\n", sdr_compatible_str, params->tid); 1696261bb9eeSmmehari break; 1697261bb9eeSmmehari case IEEE80211_AMPDU_RX_STOP: 16982ae501caSXianjun Jiao printk("%s openwifi_ampdu_action: stop RX aggregation. tid %d\n", sdr_compatible_str, params->tid); 1699261bb9eeSmmehari break; 1700261bb9eeSmmehari default: 1701261bb9eeSmmehari return -EOPNOTSUPP; 1702261bb9eeSmmehari } 1703261bb9eeSmmehari 1704261bb9eeSmmehari return 0; 1705261bb9eeSmmehari } 1706261bb9eeSmmehari 17072ee67178SXianjun Jiao static const struct ieee80211_ops openwifi_ops = { 17082ee67178SXianjun Jiao .tx = openwifi_tx, 17092ee67178SXianjun Jiao .start = openwifi_start, 17102ee67178SXianjun Jiao .stop = openwifi_stop, 17112ee67178SXianjun Jiao .add_interface = openwifi_add_interface, 17122ee67178SXianjun Jiao .remove_interface = openwifi_remove_interface, 17132ee67178SXianjun Jiao .config = openwifi_config, 17142ee67178SXianjun Jiao .bss_info_changed = openwifi_bss_info_changed, 17152ee67178SXianjun Jiao .conf_tx = openwifi_conf_tx, 17162ee67178SXianjun Jiao .prepare_multicast = openwifi_prepare_multicast, 17172ee67178SXianjun Jiao .configure_filter = openwifi_configure_filter, 17182ee67178SXianjun Jiao .rfkill_poll = openwifi_rfkill_poll, 17192ee67178SXianjun Jiao .get_tsf = openwifi_get_tsf, 17202ee67178SXianjun Jiao .set_tsf = openwifi_set_tsf, 17212ee67178SXianjun Jiao .reset_tsf = openwifi_reset_tsf, 17222ee67178SXianjun Jiao .set_rts_threshold = openwifi_set_rts_threshold, 1723261bb9eeSmmehari .ampdu_action = openwifi_ampdu_action, 17242ee67178SXianjun Jiao .testmode_cmd = openwifi_testmode_cmd, 17252ee67178SXianjun Jiao }; 17262ee67178SXianjun Jiao 17272ee67178SXianjun Jiao static const struct of_device_id openwifi_dev_of_ids[] = { 17282ee67178SXianjun Jiao { .compatible = "sdr,sdr", }, 17292ee67178SXianjun Jiao {} 17302ee67178SXianjun Jiao }; 17312ee67178SXianjun Jiao MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 17322ee67178SXianjun Jiao 17332ee67178SXianjun Jiao static int custom_match_spi_dev(struct device *dev, void *data) 17342ee67178SXianjun Jiao { 17352ee67178SXianjun Jiao const char *name = data; 17362ee67178SXianjun Jiao 17372ee67178SXianjun Jiao bool ret = sysfs_streq(name, dev->of_node->name); 17382ee67178SXianjun Jiao printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 17392ee67178SXianjun Jiao return ret; 17402ee67178SXianjun Jiao } 17412ee67178SXianjun Jiao 17422ee67178SXianjun Jiao static int custom_match_platform_dev(struct device *dev, void *data) 17432ee67178SXianjun Jiao { 17442ee67178SXianjun Jiao struct platform_device *plat_dev = to_platform_device(dev); 17452ee67178SXianjun Jiao const char *name = data; 17462ee67178SXianjun Jiao char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 17472ee67178SXianjun Jiao bool match_flag = (name_in_sys_bus_platform_devices != NULL); 17482ee67178SXianjun Jiao 17492ee67178SXianjun Jiao if (match_flag) { 17502ee67178SXianjun Jiao printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 17512ee67178SXianjun Jiao } 17522ee67178SXianjun Jiao return(match_flag); 17532ee67178SXianjun Jiao } 17542ee67178SXianjun Jiao 17552ee67178SXianjun Jiao static int openwifi_dev_probe(struct platform_device *pdev) 17562ee67178SXianjun Jiao { 17572ee67178SXianjun Jiao struct ieee80211_hw *dev; 17582ee67178SXianjun Jiao struct openwifi_priv *priv; 17592ee67178SXianjun Jiao int err=1, rand_val; 17606e3730c0Smmehari const char *chip_name, *fpga_model; 17612ee67178SXianjun Jiao u32 reg;//, reg1; 17622ee67178SXianjun Jiao 17632ee67178SXianjun Jiao struct device_node *np = pdev->dev.of_node; 17642ee67178SXianjun Jiao 17652ee67178SXianjun Jiao struct device *tmp_dev; 17662ee67178SXianjun Jiao struct platform_device *tmp_pdev; 17672ee67178SXianjun Jiao struct iio_dev *tmp_indio_dev; 17682ee67178SXianjun Jiao // struct gpio_leds_priv *tmp_led_priv; 17692ee67178SXianjun Jiao 17702ee67178SXianjun Jiao printk("\n"); 17712ee67178SXianjun Jiao 17722ee67178SXianjun Jiao if (np) { 17732ee67178SXianjun Jiao const struct of_device_id *match; 17742ee67178SXianjun Jiao 17752ee67178SXianjun Jiao match = of_match_node(openwifi_dev_of_ids, np); 17762ee67178SXianjun Jiao if (match) { 17772ee67178SXianjun Jiao printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 17782ee67178SXianjun Jiao err = 0; 17792ee67178SXianjun Jiao } 17802ee67178SXianjun Jiao } 17812ee67178SXianjun Jiao 17822ee67178SXianjun Jiao if (err) 17832ee67178SXianjun Jiao return err; 17842ee67178SXianjun Jiao 17852ee67178SXianjun Jiao dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 17862ee67178SXianjun Jiao if (!dev) { 17872ee67178SXianjun Jiao printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 17882ee67178SXianjun Jiao err = -ENOMEM; 17892ee67178SXianjun Jiao goto err_free_dev; 17902ee67178SXianjun Jiao } 17912ee67178SXianjun Jiao 17922ee67178SXianjun Jiao priv = dev->priv; 17932ee67178SXianjun Jiao priv->pdev = pdev; 17942ee67178SXianjun Jiao 17956e3730c0Smmehari err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 17966e3730c0Smmehari if(err < 0) { 17976e3730c0Smmehari printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 17986e3730c0Smmehari priv->fpga_type = SMALL_FPGA; 17996e3730c0Smmehari } else { 18006e3730c0Smmehari // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 18016e3730c0Smmehari if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 18026e3730c0Smmehari priv->fpga_type = LARGE_FPGA; 18036e3730c0Smmehari // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 18046e3730c0Smmehari else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 18056e3730c0Smmehari priv->fpga_type = SMALL_FPGA; 18066e3730c0Smmehari } 18076e3730c0Smmehari 18082ee67178SXianjun Jiao // //-------------find ad9361-phy driver for lo/channel control--------------- 18092ee67178SXianjun Jiao priv->actual_rx_lo = 0; 1810b196f496SXianjun Jiao priv->actual_tx_lo = 0; 18112ee67178SXianjun Jiao tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1812febc5adfSXianjun Jiao if (tmp_dev == NULL) { 18132ee67178SXianjun Jiao printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 18142ee67178SXianjun Jiao err = -ENOMEM; 18152ee67178SXianjun Jiao goto err_free_dev; 18162ee67178SXianjun Jiao } 1817febc5adfSXianjun Jiao printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1818febc5adfSXianjun Jiao if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1819febc5adfSXianjun Jiao printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1820febc5adfSXianjun Jiao err = -ENOMEM; 1821febc5adfSXianjun Jiao goto err_free_dev; 1822febc5adfSXianjun Jiao } 1823febc5adfSXianjun Jiao 18242ee67178SXianjun Jiao priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 18252ee67178SXianjun Jiao if (!(priv->ad9361_phy)) { 18262ee67178SXianjun Jiao printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 18272ee67178SXianjun Jiao err = -ENOMEM; 18282ee67178SXianjun Jiao goto err_free_dev; 18292ee67178SXianjun Jiao } 1830b73660adSXianjun Jiao printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 18312ee67178SXianjun Jiao 18322ee67178SXianjun Jiao priv->ctrl_out.en_mask=0xFF; 18332ee67178SXianjun Jiao priv->ctrl_out.index=0x16; 18342ee67178SXianjun Jiao err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 18352ee67178SXianjun Jiao if (err < 0) { 18362ee67178SXianjun Jiao printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 18372ee67178SXianjun Jiao } else { 18382ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 18392ee67178SXianjun Jiao } 18402ee67178SXianjun Jiao 18412ee67178SXianjun Jiao reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 18422ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 18432ee67178SXianjun Jiao reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 18442ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 18452ee67178SXianjun Jiao 18462ee67178SXianjun Jiao // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 18472ee67178SXianjun Jiao tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 18482ee67178SXianjun Jiao if (!tmp_dev) { 18492ee67178SXianjun Jiao printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 18502ee67178SXianjun Jiao err = -ENOMEM; 18512ee67178SXianjun Jiao goto err_free_dev; 18522ee67178SXianjun Jiao } 18532ee67178SXianjun Jiao 18542ee67178SXianjun Jiao tmp_pdev = to_platform_device(tmp_dev); 18552ee67178SXianjun Jiao if (!tmp_pdev) { 18562ee67178SXianjun Jiao printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 18572ee67178SXianjun Jiao err = -ENOMEM; 18582ee67178SXianjun Jiao goto err_free_dev; 18592ee67178SXianjun Jiao } 18602ee67178SXianjun Jiao 18612ee67178SXianjun Jiao tmp_indio_dev = platform_get_drvdata(tmp_pdev); 18622ee67178SXianjun Jiao if (!tmp_indio_dev) { 18632ee67178SXianjun Jiao printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 18642ee67178SXianjun Jiao err = -ENOMEM; 18652ee67178SXianjun Jiao goto err_free_dev; 18662ee67178SXianjun Jiao } 18672ee67178SXianjun Jiao 18682ee67178SXianjun Jiao priv->dds_st = iio_priv(tmp_indio_dev); 18692ee67178SXianjun Jiao if (!(priv->dds_st)) { 18702ee67178SXianjun Jiao printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 18712ee67178SXianjun Jiao err = -ENOMEM; 18722ee67178SXianjun Jiao goto err_free_dev; 18732ee67178SXianjun Jiao } 18742ee67178SXianjun Jiao printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 18752ee67178SXianjun Jiao cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 18762ee67178SXianjun Jiao printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 18772ee67178SXianjun Jiao 18782ee67178SXianjun Jiao // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 18792ee67178SXianjun Jiao // turn off radio by muting tx 18802ee67178SXianjun Jiao // ad9361_tx_mute(priv->ad9361_phy, 1); 18812ee67178SXianjun Jiao // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 18822ee67178SXianjun Jiao // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 18832ee67178SXianjun Jiao // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 18842ee67178SXianjun Jiao // priv->rfkill_off = 0;// 0 off, 1 on 18852ee67178SXianjun Jiao // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 18862ee67178SXianjun Jiao // } 18872ee67178SXianjun Jiao // else 18882ee67178SXianjun Jiao // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 18892ee67178SXianjun Jiao 1890*76b1a6a1SXianjun Jiao // //-----------------------------parse the test_mode input-------------------------------- 1891*76b1a6a1SXianjun Jiao if (test_mode&1) 1892*76b1a6a1SXianjun Jiao AGGR_ENABLE = true; 1893*76b1a6a1SXianjun Jiao 1894*76b1a6a1SXianjun Jiao // if (test_mode&2) 1895*76b1a6a1SXianjun Jiao // TX_OFFSET_TUNING_ENABLE = false; 1896*76b1a6a1SXianjun Jiao 18978598d294SXianjun Jiao priv->last_auto_fpga_lbt_th = 134;//just to avoid uninitialized 18982ee67178SXianjun Jiao priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 18992ee67178SXianjun Jiao 19002ee67178SXianjun Jiao //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 19012ee67178SXianjun Jiao priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 19022ee67178SXianjun Jiao 19032ee67178SXianjun Jiao priv->xpu_cfg = XPU_NORMAL; 19042ee67178SXianjun Jiao 19052ee67178SXianjun Jiao priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 19062ee67178SXianjun Jiao priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 19072ee67178SXianjun Jiao 19082ee67178SXianjun Jiao printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 19092ee67178SXianjun Jiao if (priv->rf_bw == 20000000) { 19102ee67178SXianjun Jiao priv->rx_intf_cfg = RX_INTF_BYPASS; 19112ee67178SXianjun Jiao priv->tx_intf_cfg = TX_INTF_BYPASS; 19122ee67178SXianjun Jiao //priv->rx_freq_offset_to_lo_MHz = 0; 19132ee67178SXianjun Jiao //priv->tx_freq_offset_to_lo_MHz = 0; 19142ee67178SXianjun Jiao } else if (priv->rf_bw == 40000000) { 19152ee67178SXianjun Jiao //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 19162ee67178SXianjun Jiao //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 19172ee67178SXianjun Jiao 19182ee67178SXianjun Jiao // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 19192ee67178SXianjun Jiao priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1920b73660adSXianjun Jiao priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 19212ee67178SXianjun Jiao // // try another antenna option 19222ee67178SXianjun Jiao //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 19232ee67178SXianjun Jiao //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 19242ee67178SXianjun Jiao 19252ee67178SXianjun Jiao #if 0 19262ee67178SXianjun Jiao if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 19272ee67178SXianjun Jiao priv->rx_freq_offset_to_lo_MHz = -10; 19282ee67178SXianjun Jiao } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 19292ee67178SXianjun Jiao priv->rx_freq_offset_to_lo_MHz = 10; 19302ee67178SXianjun Jiao } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 19312ee67178SXianjun Jiao priv->rx_freq_offset_to_lo_MHz = 0; 19322ee67178SXianjun Jiao } else { 19332ee67178SXianjun Jiao printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 19342ee67178SXianjun Jiao } 19352ee67178SXianjun Jiao #endif 19362ee67178SXianjun Jiao } else { 19372ee67178SXianjun Jiao printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 19382ee67178SXianjun Jiao } 193956203843SXianjun Jiao 1940*76b1a6a1SXianjun Jiao printk("%s openwifi_dev_probe: test_mode %d AGGR_ENABLE %d TX_OFFSET_TUNING_ENABLE %d init_tx_att %d\n", sdr_compatible_str, test_mode, AGGR_ENABLE, TX_OFFSET_TUNING_ENABLE, init_tx_att); 19412ee67178SXianjun Jiao 194256203843SXianjun Jiao priv->runtime_tx_ant_cfg = ((priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT0 || priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0)?1:(priv->tx_intf_cfg==TX_INTF_BW_20MHZ_AT_0MHZ_ANT_BOTH?3:2)); 194356203843SXianjun Jiao priv->runtime_rx_ant_cfg = (priv->rx_intf_cfg==RX_INTF_BW_20MHZ_AT_0MHZ_ANT0?1:2); 194456203843SXianjun Jiao 194556203843SXianjun Jiao priv->ctrl_out.en_mask=AD9361_CTRL_OUT_EN_MASK; 194656203843SXianjun Jiao priv->ctrl_out.index =(priv->rx_intf_cfg==RX_INTF_BW_20MHZ_AT_0MHZ_ANT0?AD9361_CTRL_OUT_INDEX_ANT0:AD9361_CTRL_OUT_INDEX_ANT1); 194756203843SXianjun Jiao 1948e21492d7SXianjun Jiao memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 1949e21492d7SXianjun Jiao memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 1950e21492d7SXianjun Jiao memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 1951e21492d7SXianjun Jiao memset(priv->rf_reg_val,0,sizeof(priv->rf_reg_val)); 1952e21492d7SXianjun Jiao 1953*76b1a6a1SXianjun Jiao priv->rf_reg_val[RF_TX_REG_IDX_ATT] = init_tx_att; 1954*76b1a6a1SXianjun Jiao 19552ee67178SXianjun Jiao //let's by default turn radio on when probing 195656203843SXianjun Jiao err = openwifi_set_antenna(dev, priv->runtime_tx_ant_cfg, priv->runtime_rx_ant_cfg); 195756203843SXianjun Jiao if (err) { 195856203843SXianjun Jiao printk("%s openwifi_dev_probe: WARNING openwifi_set_antenna FAIL %d\n",sdr_compatible_str, err); 195956203843SXianjun Jiao err = -EIO; 196056203843SXianjun Jiao goto err_free_dev; 19612ee67178SXianjun Jiao } 196256203843SXianjun Jiao reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 196356203843SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 196456203843SXianjun Jiao reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 196556203843SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 196656203843SXianjun Jiao 196756203843SXianjun Jiao reg = ad9361_get_tx_atten(priv->ad9361_phy, ((priv->runtime_tx_ant_cfg==1 || priv->runtime_tx_ant_cfg==3)?1:2)); 196856203843SXianjun Jiao if (reg == (AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT])) { 19692ee67178SXianjun Jiao priv->rfkill_off = 1;// 0 off, 1 on 19702ee67178SXianjun Jiao printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 19718598d294SXianjun Jiao } else 197256203843SXianjun Jiao printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT+priv->rf_reg_val[RF_TX_REG_IDX_ATT]); 19732ee67178SXianjun Jiao 1974e21492d7SXianjun Jiao priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 19752ee67178SXianjun Jiao 19762ee67178SXianjun Jiao // //set ad9361 in certain mode 19772ee67178SXianjun Jiao #if 0 19782ee67178SXianjun Jiao err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 19792ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 19802ee67178SXianjun Jiao err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 19812ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 19822ee67178SXianjun Jiao 19832ee67178SXianjun Jiao rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 19840c0d5d82Smmehari tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 19852ee67178SXianjun Jiao openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 19862ee67178SXianjun Jiao openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 19872ee67178SXianjun Jiao printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 19882ee67178SXianjun Jiao printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 19892ee67178SXianjun Jiao #endif 19902ee67178SXianjun Jiao 19912ee67178SXianjun Jiao dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 19922ee67178SXianjun Jiao 19932ee67178SXianjun Jiao SET_IEEE80211_DEV(dev, &pdev->dev); 19942ee67178SXianjun Jiao platform_set_drvdata(pdev, dev); 19952ee67178SXianjun Jiao 19962ee67178SXianjun Jiao BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 19972ee67178SXianjun Jiao BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 19982ee67178SXianjun Jiao BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 19992ee67178SXianjun Jiao BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 20002ee67178SXianjun Jiao 20012ee67178SXianjun Jiao memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 20022ee67178SXianjun Jiao memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 20032ee67178SXianjun Jiao memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 20042ee67178SXianjun Jiao memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 20052ee67178SXianjun Jiao 20062ee67178SXianjun Jiao priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 20072ee67178SXianjun Jiao priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 20082ee67178SXianjun Jiao priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2009261bb9eeSmmehari priv->ampdu_reference = 0; 20102ee67178SXianjun Jiao 20112ee67178SXianjun Jiao priv->band_2GHz.band = NL80211_BAND_2GHZ; 20122ee67178SXianjun Jiao priv->band_2GHz.channels = priv->channels_2GHz; 20132ee67178SXianjun Jiao priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 20142ee67178SXianjun Jiao priv->band_2GHz.bitrates = priv->rates_2GHz; 20152ee67178SXianjun Jiao priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2016b6d71713Smmehari priv->band_2GHz.ht_cap.ht_supported = true; 2017b6d71713Smmehari priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2018*76b1a6a1SXianjun Jiao if (AGGR_ENABLE) { 2019261bb9eeSmmehari priv->band_2GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2020261bb9eeSmmehari priv->band_2GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2021*76b1a6a1SXianjun Jiao } 2022b6d71713Smmehari memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2023b6d71713Smmehari priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2024b6d71713Smmehari priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 20252ee67178SXianjun Jiao dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 20262ee67178SXianjun Jiao 20272ee67178SXianjun Jiao priv->band_5GHz.band = NL80211_BAND_5GHZ; 20282ee67178SXianjun Jiao priv->band_5GHz.channels = priv->channels_5GHz; 20292ee67178SXianjun Jiao priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 20302ee67178SXianjun Jiao priv->band_5GHz.bitrates = priv->rates_5GHz; 20312ee67178SXianjun Jiao priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2032b6d71713Smmehari priv->band_5GHz.ht_cap.ht_supported = true; 2033b6d71713Smmehari priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2034*76b1a6a1SXianjun Jiao if (AGGR_ENABLE) { 2035261bb9eeSmmehari priv->band_5GHz.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K; 2036261bb9eeSmmehari priv->band_5GHz.ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_2; 2037*76b1a6a1SXianjun Jiao } 2038b6d71713Smmehari memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2039b6d71713Smmehari priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2040b6d71713Smmehari priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 20412ee67178SXianjun Jiao dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 20422ee67178SXianjun Jiao 20432ee67178SXianjun Jiao printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 20442ee67178SXianjun Jiao priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 20452ee67178SXianjun Jiao 20462ee67178SXianjun Jiao ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 20472ee67178SXianjun Jiao ieee80211_hw_set(dev, RX_INCLUDES_FCS); 20482ee67178SXianjun Jiao ieee80211_hw_set(dev, BEACON_TX_STATUS); 2049*76b1a6a1SXianjun Jiao if (AGGR_ENABLE) { 2050261bb9eeSmmehari ieee80211_hw_set(dev, AMPDU_AGGREGATION); 2051*76b1a6a1SXianjun Jiao } 2052*76b1a6a1SXianjun Jiao 20532ee67178SXianjun Jiao 20542ee67178SXianjun Jiao dev->vif_data_size = sizeof(struct openwifi_vif); 20552ee67178SXianjun Jiao dev->wiphy->interface_modes = 20562ee67178SXianjun Jiao BIT(NL80211_IFTYPE_MONITOR)| 20572ee67178SXianjun Jiao BIT(NL80211_IFTYPE_P2P_GO) | 20582ee67178SXianjun Jiao BIT(NL80211_IFTYPE_P2P_CLIENT) | 20592ee67178SXianjun Jiao BIT(NL80211_IFTYPE_AP) | 20602ee67178SXianjun Jiao BIT(NL80211_IFTYPE_STATION) | 20612ee67178SXianjun Jiao BIT(NL80211_IFTYPE_ADHOC) | 20622ee67178SXianjun Jiao BIT(NL80211_IFTYPE_MESH_POINT) | 20632ee67178SXianjun Jiao BIT(NL80211_IFTYPE_OCB); 20642ee67178SXianjun Jiao dev->wiphy->iface_combinations = &openwifi_if_comb; 20652ee67178SXianjun Jiao dev->wiphy->n_iface_combinations = 1; 20662ee67178SXianjun Jiao 206756203843SXianjun Jiao dev->wiphy->available_antennas_tx = NUM_TX_ANT_MASK; 206856203843SXianjun Jiao dev->wiphy->available_antennas_rx = NUM_RX_ANT_MASK; 206956203843SXianjun Jiao 20702ee67178SXianjun Jiao dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 20712ee67178SXianjun Jiao //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 20722ee67178SXianjun Jiao wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 20732ee67178SXianjun Jiao 20742ee67178SXianjun Jiao chip_name = "ZYNQ"; 20752ee67178SXianjun Jiao 20762ee67178SXianjun Jiao /* we declare to MAC80211 all the queues except for beacon queue 20772ee67178SXianjun Jiao * that will be eventually handled by DRV. 20782ee67178SXianjun Jiao * TX rings are arranged in such a way that lower is the IDX, 20792ee67178SXianjun Jiao * higher is the priority, in order to achieve direct mapping 20802ee67178SXianjun Jiao * with mac80211, however the beacon queue is an exception and it 20812ee67178SXianjun Jiao * is mapped on the highst tx ring IDX. 20822ee67178SXianjun Jiao */ 2083838a9007SXianjun Jiao dev->queues = MAX_NUM_HW_QUEUE; 2084838a9007SXianjun Jiao //dev->queues = 1; 20852ee67178SXianjun Jiao 20862ee67178SXianjun Jiao ieee80211_hw_set(dev, SIGNAL_DBM); 20872ee67178SXianjun Jiao 20882ee67178SXianjun Jiao wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 20892ee67178SXianjun Jiao 20902ee67178SXianjun Jiao priv->rf = &ad9361_rf_ops; 20912ee67178SXianjun Jiao 20922ee67178SXianjun Jiao memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2093838a9007SXianjun Jiao priv->slice_idx = 0xFFFFFFFF; 2094838a9007SXianjun Jiao 2095838a9007SXianjun Jiao sg_init_table(&(priv->tx_sg), 1); 20962ee67178SXianjun Jiao 20972ee67178SXianjun Jiao get_random_bytes(&rand_val, sizeof(rand_val)); 20982ee67178SXianjun Jiao rand_val%=250; 20992ee67178SXianjun Jiao priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 21002ee67178SXianjun Jiao priv->mac_addr[5]=rand_val+1; 21012ee67178SXianjun Jiao //priv->mac_addr[5]=0x11; 21022ee67178SXianjun Jiao if (!is_valid_ether_addr(priv->mac_addr)) { 21032ee67178SXianjun Jiao printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 21042ee67178SXianjun Jiao eth_random_addr(priv->mac_addr); 21052ee67178SXianjun Jiao } else { 21062ee67178SXianjun Jiao printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 21072ee67178SXianjun Jiao } 21082ee67178SXianjun Jiao SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 21092ee67178SXianjun Jiao 21102ee67178SXianjun Jiao spin_lock_init(&priv->lock); 21112ee67178SXianjun Jiao 21122ee67178SXianjun Jiao err = ieee80211_register_hw(dev); 21132ee67178SXianjun Jiao if (err) { 21142ee67178SXianjun Jiao pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 21152ee67178SXianjun Jiao goto err_free_dev; 21162ee67178SXianjun Jiao } else { 21172ee67178SXianjun Jiao printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 21182ee67178SXianjun Jiao } 21192ee67178SXianjun Jiao 21202ee67178SXianjun Jiao // // //--------------------hook leds (not complete yet)-------------------------------- 2121b1dd94e3Sluz paz // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 21222ee67178SXianjun Jiao // if (!tmp_dev) { 21232ee67178SXianjun Jiao // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 21242ee67178SXianjun Jiao // err = -ENOMEM; 21252ee67178SXianjun Jiao // goto err_free_dev; 21262ee67178SXianjun Jiao // } 21272ee67178SXianjun Jiao 21282ee67178SXianjun Jiao // tmp_pdev = to_platform_device(tmp_dev); 21292ee67178SXianjun Jiao // if (!tmp_pdev) { 21302ee67178SXianjun Jiao // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 21312ee67178SXianjun Jiao // err = -ENOMEM; 21322ee67178SXianjun Jiao // goto err_free_dev; 21332ee67178SXianjun Jiao // } 21342ee67178SXianjun Jiao 21352ee67178SXianjun Jiao // tmp_led_priv = platform_get_drvdata(tmp_pdev); 21362ee67178SXianjun Jiao // if (!tmp_led_priv) { 21372ee67178SXianjun Jiao // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 21382ee67178SXianjun Jiao // err = -ENOMEM; 21392ee67178SXianjun Jiao // goto err_free_dev; 21402ee67178SXianjun Jiao // } 21412ee67178SXianjun Jiao // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 21422ee67178SXianjun Jiao // if (tmp_led_priv->num_leds!=4){ 21432ee67178SXianjun Jiao // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 21442ee67178SXianjun Jiao // err = -ENOMEM; 21452ee67178SXianjun Jiao // goto err_free_dev; 21462ee67178SXianjun Jiao // } 21472ee67178SXianjun Jiao // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 21482ee67178SXianjun Jiao // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 21492ee67178SXianjun Jiao // priv->num_led = tmp_led_priv->num_leds; 21502ee67178SXianjun Jiao // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 21512ee67178SXianjun Jiao // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 21522ee67178SXianjun Jiao // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 21532ee67178SXianjun Jiao // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 21542ee67178SXianjun Jiao 21552ee67178SXianjun Jiao // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 21562ee67178SXianjun Jiao // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 21572ee67178SXianjun Jiao // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 21582ee67178SXianjun Jiao // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 21592ee67178SXianjun Jiao 21602ee67178SXianjun Jiao wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 21612ee67178SXianjun Jiao priv->mac_addr, chip_name, priv->rf->name); 21622ee67178SXianjun Jiao 21632ee67178SXianjun Jiao openwifi_rfkill_init(dev); 21642ee67178SXianjun Jiao return 0; 21652ee67178SXianjun Jiao 21662ee67178SXianjun Jiao err_free_dev: 21672ee67178SXianjun Jiao ieee80211_free_hw(dev); 21682ee67178SXianjun Jiao 21692ee67178SXianjun Jiao return err; 21702ee67178SXianjun Jiao } 21712ee67178SXianjun Jiao 21722ee67178SXianjun Jiao static int openwifi_dev_remove(struct platform_device *pdev) 21732ee67178SXianjun Jiao { 21742ee67178SXianjun Jiao struct ieee80211_hw *dev = platform_get_drvdata(pdev); 21752ee67178SXianjun Jiao 21762ee67178SXianjun Jiao if (!dev) { 2177febc5adfSXianjun Jiao pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 21782ee67178SXianjun Jiao return(-1); 21792ee67178SXianjun Jiao } 21802ee67178SXianjun Jiao 21812ee67178SXianjun Jiao openwifi_rfkill_exit(dev); 21822ee67178SXianjun Jiao ieee80211_unregister_hw(dev); 21832ee67178SXianjun Jiao ieee80211_free_hw(dev); 21842ee67178SXianjun Jiao return(0); 21852ee67178SXianjun Jiao } 21862ee67178SXianjun Jiao 21872ee67178SXianjun Jiao static struct platform_driver openwifi_dev_driver = { 21882ee67178SXianjun Jiao .driver = { 21892ee67178SXianjun Jiao .name = "sdr,sdr", 21902ee67178SXianjun Jiao .owner = THIS_MODULE, 21912ee67178SXianjun Jiao .of_match_table = openwifi_dev_of_ids, 21922ee67178SXianjun Jiao }, 21932ee67178SXianjun Jiao .probe = openwifi_dev_probe, 21942ee67178SXianjun Jiao .remove = openwifi_dev_remove, 21952ee67178SXianjun Jiao }; 21962ee67178SXianjun Jiao 21972ee67178SXianjun Jiao module_platform_driver(openwifi_dev_driver); 2198