1<!-- 2Author: Xianjun jiao 3SPDX-FileCopyrightText: 2019 UGent 4SPDX-License-Identifier: AGPL-3.0-or-later 5--> 6 7 8Counter/statistics (number of TX packet, RX packet, etc.) in FPGA is offered via side channel register write/read. 9 10The 1st step is alway loading the side channel kernel module: 11``` 12insmod side_ch.ko 13``` 14 15The register write command is: 16``` 17./side_ch_ctl whXdY 18X -- register index 19Y -- decimal value to be written 20./side_ch_ctl whXhY 21X -- register index 22Y -- hex value to be written (useful for MAC address) 23``` 24Write register 26~31 with arbitrary value to reset the corresponding counter to 0. 25 26The register read command is: 27``` 28./side_ch_ctl rhX 29X -- register index 30``` 31 32## Register definition 33 34The register 26~31 readback value represents the number of event happened. Each register has two event sources that can be selected via bit in register 19. 35 36register idx|source selection reg19|event 37------------|----------------------|----------- 3826 |reg19[0] == 0 |short_preamble_detected 3926 |reg19[0] == 1 |phy_tx_start 4027 |reg19[4] == 0 |long_preamble_detected 4127 |reg19[4] == 1 |phy_tx_done 4228 |reg19[8] == 0 |pkt_header_valid_strobe 4328 |reg19[8] == 1 |rssi_above_th 4429 |reg19[12] == 0 |pkt_header_valid_strobe&pkt_header_valid 4529 |reg19[12] == 1 |gain_change 4630 |reg19[16] == 0 |((fcs_in_strobe&addr2_match)&pkt_for_me)&is_data 4730 |reg19[16] == 1 |agc_lock 4831 |reg19[20] == 0 |(((fcs_in_strobe&fcs_ok)&addr2_match)&pkt_for_me)&is_data 4931 |reg19[20] == 1 |tx_pkt_need_ack 50 51Note: fcs_in_strobe means decoding is done (not necessarily CRC is correct); fcs_ok 1 means CRC correct; fcs_ok 0 means CRC not correct. 52 53Note: addr2_match means addr2 matches to the register (addr2_target) value; pkt_for_me means addr1 matches self mac addr; is_data means the packet type is data. 54 55Configuration register: 56 57register idx|meaning |note 58------------|----------------------|----------- 597 |addr2 target value |fcs event always needs addr2 match 609 |threshold for event rssi_above_th|check auto_lbt_th in ad9361_rf_set_channel of sdr.c to estimate a proper value 61 62Note: addr2 (source/sender's MAC address) target setting uses only 32bit. For address 6c:fd:b9:4c:b1:c1, you set b94cb1c1 63 64Note: read register 62 of xpu for some addr2 captured by the receiver 65