1 #ifndef __CONFIG_H 2 #define __CONFIG_H 3 4 #define CONFIG_405EP 1 /* this is a PPC405 CPU */ 5 #define CONFIG_4xx 1 /* member of PPC4xx family */ 6 7 #define CONFIG_SYS_DCACHE_SIZE (16 << 10)/* For AMCC 405 CPUs */ 8 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ 9 10 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 11 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 12 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 13 14 #define CONFIG_SYS_CLK_RECFG 0 /* Config the sys clks */ 15 #define CONFIG_SYS_CLK_FREQ 33333333 /*3300000*//* external frequency to pll */ 16 #define CONFIG_SYS_HZ 100 17 #define CONFIG_SYS_PIT_RELOAD (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) 18 19 /* 20 * UART 21 */ 22 #define CONFIG_BAUDRATE 115200 23 #define CONFIG_SERIAL_MULTI 24 #define CONFIG_SYS_BAUDRATE_TABLE \ 25 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 26 27 /* 28 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. 29 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. 30 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. 31 * The Linux BASE_BAUD define should match this configuration. 32 * baseBaud = cpuClock/(uartDivisor*16) 33 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, 34 * set Linux BASE_BAUD to 403200. 35 */ 36 #define CONFIG_SYS_BASE_BAUD 691200 37 #define CONFIG_UART1_CONSOLE 1 38 39 /*----------------------------------------------------------------------- 40 * Start addresses for the final memory configuration 41 * (Set up by the startup code) 42 */ 43 #define CONFIG_SYS_FLASH_BASE 0xFFE00000 44 45 /*----------------------------------------------------------------------- 46 * FLASH organization 47 */ 48 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ 49 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 50 51 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 52 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 53 54 #define CONFIG_SYS_FLASH_ADDR0 0x555 55 #define CONFIG_SYS_FLASH_ADDR1 0x2aa 56 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned short 57 58 #endif /* __CONFIG_H */ 59