1/* 2 * File : cache_init.S 3 * Change Logs: 4 * Date Author Notes 5 * 2010-05-17 swkyer first version 6 */ 7#include "../common/mips.inc" 8#include "../common/mipsregs.h" 9#include "../common/stackframe.h" 10 11 .text 12 .set noreorder 13 14 .globl cache_init 15 .ent cache_init 16cache_init: 17 .set noreorder 18 mtc0 zero, CP0_TAGLO 19 move t0, a0 // cache total size 20 move t1, a1 // cache line size 21 li t2, 0x80000000 22 addu t3, t0, t2 23 24_cache_init_loop: 25 cache 8, 0(t2) // icache_index_store_tag 26 cache 9, 0(t2) // dcache_index_store_tag 27 addu t2, t1 28 bne t2, t3, _cache_init_loop 29 nop 30 31 mfc0 t0, CP0_CONFIG 32 li t1, 0x7 33 not t1 34 and t0, t0, t1 35 or t0, 0x3 // cacheable, noncoherent, write-back, write allocate 36 mtc0 t0, CP0_CONFIG 37 38 jr ra 39 nop 40 41 .set reorder 42 .end cache_init 43