1*10465441SEvalZero/* 2*10465441SEvalZero * File : mips_context_asm.S 3*10465441SEvalZero * This file is part of RT-Thread RTOS 4*10465441SEvalZero * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team 5*10465441SEvalZero * 6*10465441SEvalZero * This program is free software; you can redistribute it and/or modify 7*10465441SEvalZero * it under the terms of the GNU General Public License as published by 8*10465441SEvalZero * the Free Software Foundation; either version 2 of the License, or 9*10465441SEvalZero * (at your option) any later version. 10*10465441SEvalZero * 11*10465441SEvalZero * This program is distributed in the hope that it will be useful, 12*10465441SEvalZero * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*10465441SEvalZero * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*10465441SEvalZero * GNU General Public License for more details. 15*10465441SEvalZero * 16*10465441SEvalZero * You should have received a copy of the GNU General Public License along 17*10465441SEvalZero * with this program; if not, write to the Free Software Foundation, Inc., 18*10465441SEvalZero * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19*10465441SEvalZero * 20*10465441SEvalZero * Change Logs: 21*10465441SEvalZero * Date Author Notes 22*10465441SEvalZero * 2016��9��7�� Urey the first version 23*10465441SEvalZero */ 24*10465441SEvalZero 25*10465441SEvalZero#ifndef __ASSEMBLY__ 26*10465441SEvalZero# define __ASSEMBLY__ 27*10465441SEvalZero#endif 28*10465441SEvalZero 29*10465441SEvalZero#include "../common/mips.h" 30*10465441SEvalZero 31*10465441SEvalZero .global rt_thread_switch_interrupt_flag 32*10465441SEvalZero .global rt_interrupt_from_thread 33*10465441SEvalZero .global rt_interrupt_to_thread 34*10465441SEvalZero 35*10465441SEvalZero .section .text,"ax",@progbits 36*10465441SEvalZero .set noreorder 37*10465441SEvalZero .set noat 38*10465441SEvalZero 39*10465441SEvalZero .globl rt_hw_interrupt_disable 40*10465441SEvalZerort_hw_interrupt_disable: 41*10465441SEvalZero mfc0 v0,CP0_STATUS 42*10465441SEvalZero srl v1,v0,1 43*10465441SEvalZero sll v1,v1,1 44*10465441SEvalZero# and v1,v0,0xfffffffe 45*10465441SEvalZero mtc0 v1,CP0_STATUS 46*10465441SEvalZero jr ra 47*10465441SEvalZero nop 48*10465441SEvalZero 49*10465441SEvalZeroLEAF(rt_hw_interrupt_enable) 50*10465441SEvalZero mtc0 a0,CP0_STATUS 51*10465441SEvalZero jr ra 52*10465441SEvalZero nop 53*10465441SEvalZeroEND(rt_hw_interrupt_enable) 54*10465441SEvalZero 55*10465441SEvalZero/* 56*10465441SEvalZero * void rt_hw_context_switch_to(rt_uint32 to)/* 57*10465441SEvalZero * a0 --> to 58*10465441SEvalZero */ 59*10465441SEvalZeroLEAF(rt_hw_context_switch_to) 60*10465441SEvalZero lw sp , 0(a0) /* switch to the new stack */ 61*10465441SEvalZero RESTORE_CONTEXT 62*10465441SEvalZeroEND(rt_hw_context_switch_to) 63*10465441SEvalZero 64*10465441SEvalZero/* 65*10465441SEvalZero * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to) 66*10465441SEvalZero * a0 --> from 67*10465441SEvalZero * a1 --> to 68*10465441SEvalZero */ 69*10465441SEvalZeroLEAF(rt_hw_context_switch) 70*10465441SEvalZero mtc0 ra, CP0_EPC 71*10465441SEvalZero SAVE_CONTEXT 72*10465441SEvalZero 73*10465441SEvalZero sw sp, 0(a0) /* store sp in preempted tasks TCB */ 74*10465441SEvalZero lw sp, 0(a1) /* get new task stack pointer */ 75*10465441SEvalZero 76*10465441SEvalZero RESTORE_CONTEXT 77*10465441SEvalZeroEND(rt_hw_context_switch) 78*10465441SEvalZero 79*10465441SEvalZeroLEAF(rt_hw_context_switch_interrupt) 80*10465441SEvalZero la t0, rt_thread_switch_interrupt_flag 81*10465441SEvalZero lw t1, 0(t0) 82*10465441SEvalZero nop 83*10465441SEvalZero bnez t1, _reswitch 84*10465441SEvalZero nop 85*10465441SEvalZero li t1, 0x01 /* set rt_thread_switch_interrupt_flag to 1 */ 86*10465441SEvalZero sw t1, 0(t0) 87*10465441SEvalZero la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */ 88*10465441SEvalZero sw a0, 0(t0) 89*10465441SEvalZero_reswitch: 90*10465441SEvalZero la t0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */ 91*10465441SEvalZero sw a1, 0(t0) 92*10465441SEvalZero jr ra 93*10465441SEvalZero nop 94*10465441SEvalZeroEND(rt_hw_context_switch_interrupt) 95*10465441SEvalZero 96