xref: /nrf52832-nimble/rt-thread/libcpu/mips/x1000/mips_context_gcc.S (revision 104654410c56c573564690304ae786df310c91fc)
1/*
2 * File      : mips_context_asm.S
3 * This file is part of RT-Thread RTOS
4 * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
5 *
6 *  This program is free software; you can redistribute it and/or modify
7 *  it under the terms of the GNU General Public License as published by
8 *  the Free Software Foundation; either version 2 of the License, or
9 *  (at your option) any later version.
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 *  GNU General Public License for more details.
15 *
16 *  You should have received a copy of the GNU General Public License along
17 *  with this program; if not, write to the Free Software Foundation, Inc.,
18 *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Change Logs:
21 * Date           Author       Notes
22 * 2016��9��7��     Urey         the first version
23 */
24
25#ifndef __ASSEMBLY__
26#	define __ASSEMBLY__
27#endif
28
29#include "../common/mips.h"
30
31	.global	rt_thread_switch_interrupt_flag
32    .global	rt_interrupt_from_thread
33    .global	rt_interrupt_to_thread
34
35    .section .text,"ax",@progbits
36    .set noreorder
37    .set noat
38
39    .globl rt_hw_interrupt_disable
40rt_hw_interrupt_disable:
41    mfc0 	v0,CP0_STATUS
42    srl 	v1,v0,1
43    sll 	v1,v1,1
44#	and 	v1,v0,0xfffffffe
45    mtc0 	v1,CP0_STATUS
46    jr 		ra
47    nop
48
49LEAF(rt_hw_interrupt_enable)
50    mtc0 	a0,CP0_STATUS
51    jr 		ra
52    nop
53END(rt_hw_interrupt_enable)
54
55/*
56 * void rt_hw_context_switch_to(rt_uint32 to)/*
57 * a0 --> to
58 */
59LEAF(rt_hw_context_switch_to)
60	lw 	sp ,	0(a0)                 	/* switch to the new stack */
61    RESTORE_CONTEXT
62END(rt_hw_context_switch_to)
63
64/*
65 * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to)
66 * a0 --> from
67 * a1 --> to
68 */
69LEAF(rt_hw_context_switch)
70	mtc0    ra, CP0_EPC
71    SAVE_CONTEXT
72
73    sw      sp, 0(a0)       /* store sp in preempted tasks TCB */
74    lw      sp, 0(a1)       /* get new task stack pointer */
75
76	RESTORE_CONTEXT
77END(rt_hw_context_switch)
78
79LEAF(rt_hw_context_switch_interrupt)
80    la      t0, rt_thread_switch_interrupt_flag
81    lw      t1, 0(t0)
82    nop
83    bnez    t1, _reswitch
84    nop
85    li      t1, 0x01                       /* set rt_thread_switch_interrupt_flag to 1 */
86    sw      t1, 0(t0)
87    la      t0, rt_interrupt_from_thread   /* set rt_interrupt_from_thread */
88    sw      a0, 0(t0)
89_reswitch:
90    la      t0, rt_interrupt_to_thread     /* set rt_interrupt_to_thread */
91    sw      a1, 0(t0)
92    jr      ra
93    nop
94END(rt_hw_context_switch_interrupt)
95
96