xref: /nrf52832-nimble/rt-thread/libcpu/mips/common/mips_cfg.h (revision 104654410c56c573564690304ae786df310c91fc)
1 /*
2  * File      : mips_cfg.h
3  * This file is part of RT-Thread RTOS
4  * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License along
17  *  with this program; if not, write to the Free Software Foundation, Inc.,
18  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Change Logs:
21  * Date           Author       Notes
22  * 2016��9��10��     Urey         the first version
23  */
24 
25 #ifndef _MIPS_CFG_H_
26 #define _MIPS_CFG_H_
27 
28 #ifndef __ASSEMBLY__
29 #include <stdint.h>
30 typedef struct mips32_core_cfg
31 {
32     uint16_t icache_line_size;
33 //    uint16_t icache_lines_per_way;
34 //    uint16_t icache_ways;
35     uint16_t icache_size;
36     uint16_t dcache_line_size;
37 //    uint16_t dcache_lines_per_way;
38 //    uint16_t dcache_ways;
39     uint16_t dcache_size;
40 
41     uint16_t max_tlb_entries;	/* number of tlb entry */
42 } mips32_core_cfg_t;
43 
44 extern mips32_core_cfg_t g_mips_core;
45 
46 #endif /* __ASSEMBLY__ */
47 
48 #endif /* _MIPS_CFG_H_ */
49