xref: /nrf52832-nimble/rt-thread/libcpu/m16c/m16c62p/context_gcc.S (revision 104654410c56c573564690304ae786df310c91fc)
1/*
2 * File      : context.asm
3 * This file is part of RT-Thread RTOS
4 * COPYRIGHT (C) 2009, RT-Thread Development Team
5 *
6 * The license and distribution terms for this file may be
7 * found in the file LICENSE in this distribution or at
8 * http://www.rt-thread.org/license/LICENSE
9 *
10 * Change Logs:
11 * Date           Author       Notes
12 * 2010-04-09     fify         the first version
13 * 2010-04-19     fify         rewrite rt_hw_interrupt_disable/enable fuction
14 * 2010-04-20     fify         move peripheral ISR to bsp/interrupts.s34
15 */
16
17    .section .text
18
19    .globl _rt_interrupt_from_thread
20    .globl _rt_interrupt_to_thread
21    .global	_os_context_switch
22    .type	_os_context_switch, @function
23_os_context_switch:
24    PUSHM   R0,R1,R2,R3,A0,A1,SB,FB
25
26    MOV.W   _rt_interrupt_from_thread, A0
27    STC     ISP, [A0]
28    MOV.W   _rt_interrupt_to_thread, A0
29    LDC     [A0], ISP
30
31    POPM    R0,R1,R2,R3,A0,A1,SB,FB             ; Restore registers from the new task's stack
32    REIT                                        ; Return from interrup
33
34/*
35 * void rt_hw_context_switch_to(rt_uint32 to);
36 * this fucntion is used to perform the first thread switch
37 */
38    .global	_rt_hw_context_switch_to
39    .type	_rt_hw_context_switch_to, @function
40_rt_hw_context_switch_to:
41    ENTER   #0x0
42    MOV.W   0x5[FB], A0
43    LDC     [A0], ISP
44    POPM    R0,R1,R2,R3,A0,A1,SB,FB
45    REIT
46
47    .end
48