xref: /nrf52832-nimble/rt-thread/libcpu/arm/realview-a8-vmm/armv7.h (revision 104654410c56c573564690304ae786df310c91fc)
1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  */
9 #ifndef __ARMV7_H__
10 #define __ARMV7_H__
11 
12 /* the exception stack without VFP registers */
13 struct rt_hw_exp_stack
14 {
15 	unsigned long r0;
16 	unsigned long r1;
17 	unsigned long r2;
18 	unsigned long r3;
19 	unsigned long r4;
20 	unsigned long r5;
21 	unsigned long r6;
22 	unsigned long r7;
23 	unsigned long r8;
24 	unsigned long r9;
25 	unsigned long r10;
26 	unsigned long fp;
27 	unsigned long ip;
28 	unsigned long sp;
29 	unsigned long lr;
30 	unsigned long pc;
31 	unsigned long cpsr;
32 };
33 
34 struct rt_hw_stack
35 {
36 	unsigned long cpsr;
37 	unsigned long r0;
38 	unsigned long r1;
39 	unsigned long r2;
40 	unsigned long r3;
41 	unsigned long r4;
42 	unsigned long r5;
43 	unsigned long r6;
44 	unsigned long r7;
45 	unsigned long r8;
46 	unsigned long r9;
47 	unsigned long r10;
48 	unsigned long fp;
49 	unsigned long ip;
50 	unsigned long lr;
51 	unsigned long pc;
52 };
53 
54 #define USERMODE    0x10
55 #define FIQMODE     0x11
56 #define IRQMODE     0x12
57 #define SVCMODE     0x13
58 #define MONITORMODE 0x16
59 #define ABORTMODE   0x17
60 #define HYPMODE     0x1b
61 #define UNDEFMODE   0x1b
62 #define MODEMASK    0x1f
63 #define NOINT       0xc0
64 
65 #define T_Bit       (1<<5)
66 #define F_Bit       (1<<6)
67 #define I_Bit       (1<<7)
68 #define A_Bit       (1<<8)
69 #define E_Bit       (1<<9)
70 #define J_Bit       (1<<24)
71 
72 #endif
73