xref: /nrf52832-nimble/rt-thread/libcpu/arm/lpc24xx/context_rvds.S (revision 104654410c56c573564690304ae786df310c91fc)
1;/*
2; * Copyright (c) 2006-2018, RT-Thread Development Team
3; *
4; * SPDX-License-Identifier: Apache-2.0
5; *
6; * Change Logs:
7; * Date           Author       Notes
8; * 2009-01-20     Bernard      first version
9; * 2011-07-22     Bernard      added thumb mode porting
10; */
11
12NOINT	EQU		0xc0	; disable interrupt in psr
13
14	AREA |.text|, CODE, READONLY, ALIGN=2
15	ARM
16	REQUIRE8
17	PRESERVE8
18
19;/*
20; * rt_base_t rt_hw_interrupt_disable();
21; */
22rt_hw_interrupt_disable	PROC
23	EXPORT rt_hw_interrupt_disable
24	MRS r0, cpsr
25	ORR r1, r0, #NOINT
26	MSR cpsr_c, r1
27	BX	lr
28	ENDP
29
30;/*
31; * void rt_hw_interrupt_enable(rt_base_t level);
32; */
33rt_hw_interrupt_enable	PROC
34	EXPORT rt_hw_interrupt_enable
35	MSR cpsr_c, r0
36	BX	lr
37	ENDP
38
39;/*
40; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
41; * r0 --> from
42; * r1 --> to
43; */
44rt_hw_context_switch	PROC
45	EXPORT rt_hw_context_switch
46	STMFD	sp!, {lr}			; push pc (lr should be pushed in place of PC)
47	STMFD	sp!, {r0-r12, lr}	; push lr & register file
48
49	MRS		r4, cpsr
50	TST     lr, #0x01
51	BEQ     _ARM_MODE
52	ORR     r4, r4, #0x20       ; it's thumb code
53
54_ARM_MODE
55	STMFD	sp!, {r4}			; push cpsr
56
57	STR	    sp, [r0]			; store sp in preempted tasks TCB
58	LDR	    sp, [r1]			; get new task stack pointer
59
60	LDMFD	sp!, {r4}			; pop new task cpsr to spsr
61	MSR     spsr_cxsf, r4
62	BIC     r4, r4, #0x20       ; must be ARM mode
63	MSR	    cpsr_cxsf, r4
64
65	LDMFD	sp!, {r0-r12, lr, pc}^	; pop new task r0-r12, lr & pc, copy spsr to cpsr
66	ENDP
67
68;/*
69; * void rt_hw_context_switch_to(rt_uint32 to);
70; * r0 --> to
71; */
72rt_hw_context_switch_to	PROC
73	EXPORT rt_hw_context_switch_to
74	LDR	sp, [r0]				; get new task stack pointer
75
76	LDMFD	sp!, {r4}			; pop new task cpsr to spsr
77	MSR	    spsr_cxsf, r4
78	BIC     r4, r4, #0x20       ; must be ARM mode
79	MSR	    cpsr_cxsf, r4
80
81	LDMFD	sp!, {r0-r12, lr, pc}^	; pop new task r0-r12, lr & pc, copy spsr to cpsr
82	ENDP
83
84;/*
85; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
86; */
87	IMPORT rt_thread_switch_interrupt_flag
88	IMPORT rt_interrupt_from_thread
89	IMPORT rt_interrupt_to_thread
90
91rt_hw_context_switch_interrupt	PROC
92	EXPORT rt_hw_context_switch_interrupt
93	LDR r2, =rt_thread_switch_interrupt_flag
94	LDR r3, [r2]
95	CMP r3, #1
96	BEQ _reswitch
97	MOV r3, #1							; set rt_thread_switch_interrupt_flag to 1
98	STR r3, [r2]
99	LDR r2, =rt_interrupt_from_thread	; set rt_interrupt_from_thread
100	STR r0, [r2]
101_reswitch
102	LDR r2, =rt_interrupt_to_thread		; set rt_interrupt_to_thread
103	STR r1, [r2]
104	BX	lr
105	ENDP
106
107	END