1 /*
2 * Copyright (c) 2006-2018, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2011-10-21 Bernard the first version.
9 * 2011-10-27 aozima update for cortex-M4 FPU.
10 * 2011-12-31 aozima fixed stack align issues.
11 * 2012-01-01 aozima support context switch load/store FPU register.
12 * 2012-12-11 lgnq fixed the coding style.
13 * 2012-12-23 aozima stack addr align to 8byte.
14 * 2012-12-29 Bernard Add exception hook.
15 * 2013-06-23 aozima support lazy stack optimized.
16 * 2018-07-24 aozima enhancement hard fault exception handler.
17 */
18
19 #include <rtthread.h>
20
21 #if /* ARMCC */ ( (defined ( __CC_ARM ) && defined ( __TARGET_FPU_VFP )) \
22 /* Clang */ || (defined ( __CLANG_ARM ) && defined ( __VFP_FP__ ) && !defined(__SOFTFP__)) \
23 /* IAR */ || (defined ( __ICCARM__ ) && defined ( __ARMVFP__ )) \
24 /* GNU */ || (defined ( __GNUC__ ) && defined ( __VFP_FP__ ) && !defined(__SOFTFP__)) )
25 #define USE_FPU 1
26 #else
27 #define USE_FPU 0
28 #endif
29
30 /* exception and interrupt handler table */
31 rt_uint32_t rt_interrupt_from_thread;
32 rt_uint32_t rt_interrupt_to_thread;
33 rt_uint32_t rt_thread_switch_interrupt_flag;
34 /* exception hook */
35 static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL;
36
37 struct exception_stack_frame
38 {
39 rt_uint32_t r0;
40 rt_uint32_t r1;
41 rt_uint32_t r2;
42 rt_uint32_t r3;
43 rt_uint32_t r12;
44 rt_uint32_t lr;
45 rt_uint32_t pc;
46 rt_uint32_t psr;
47 };
48
49 struct stack_frame
50 {
51 #if USE_FPU
52 rt_uint32_t flag;
53 #endif /* USE_FPU */
54
55 /* r4 ~ r11 register */
56 rt_uint32_t r4;
57 rt_uint32_t r5;
58 rt_uint32_t r6;
59 rt_uint32_t r7;
60 rt_uint32_t r8;
61 rt_uint32_t r9;
62 rt_uint32_t r10;
63 rt_uint32_t r11;
64
65 struct exception_stack_frame exception_stack_frame;
66 };
67
68 struct exception_stack_frame_fpu
69 {
70 rt_uint32_t r0;
71 rt_uint32_t r1;
72 rt_uint32_t r2;
73 rt_uint32_t r3;
74 rt_uint32_t r12;
75 rt_uint32_t lr;
76 rt_uint32_t pc;
77 rt_uint32_t psr;
78
79 #if USE_FPU
80 /* FPU register */
81 rt_uint32_t S0;
82 rt_uint32_t S1;
83 rt_uint32_t S2;
84 rt_uint32_t S3;
85 rt_uint32_t S4;
86 rt_uint32_t S5;
87 rt_uint32_t S6;
88 rt_uint32_t S7;
89 rt_uint32_t S8;
90 rt_uint32_t S9;
91 rt_uint32_t S10;
92 rt_uint32_t S11;
93 rt_uint32_t S12;
94 rt_uint32_t S13;
95 rt_uint32_t S14;
96 rt_uint32_t S15;
97 rt_uint32_t FPSCR;
98 rt_uint32_t NO_NAME;
99 #endif
100 };
101
102 struct stack_frame_fpu
103 {
104 rt_uint32_t flag;
105
106 /* r4 ~ r11 register */
107 rt_uint32_t r4;
108 rt_uint32_t r5;
109 rt_uint32_t r6;
110 rt_uint32_t r7;
111 rt_uint32_t r8;
112 rt_uint32_t r9;
113 rt_uint32_t r10;
114 rt_uint32_t r11;
115
116 #if USE_FPU
117 /* FPU register s16 ~ s31 */
118 rt_uint32_t s16;
119 rt_uint32_t s17;
120 rt_uint32_t s18;
121 rt_uint32_t s19;
122 rt_uint32_t s20;
123 rt_uint32_t s21;
124 rt_uint32_t s22;
125 rt_uint32_t s23;
126 rt_uint32_t s24;
127 rt_uint32_t s25;
128 rt_uint32_t s26;
129 rt_uint32_t s27;
130 rt_uint32_t s28;
131 rt_uint32_t s29;
132 rt_uint32_t s30;
133 rt_uint32_t s31;
134 #endif
135
136 struct exception_stack_frame_fpu exception_stack_frame;
137 };
138
rt_hw_stack_init(void * tentry,void * parameter,rt_uint8_t * stack_addr,void * texit)139 rt_uint8_t *rt_hw_stack_init(void *tentry,
140 void *parameter,
141 rt_uint8_t *stack_addr,
142 void *texit)
143 {
144 struct stack_frame *stack_frame;
145 rt_uint8_t *stk;
146 unsigned long i;
147
148 stk = stack_addr + sizeof(rt_uint32_t);
149 stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stk, 8);
150 stk -= sizeof(struct stack_frame);
151
152 stack_frame = (struct stack_frame *)stk;
153
154 /* init all register */
155 for (i = 0; i < sizeof(struct stack_frame) / sizeof(rt_uint32_t); i ++)
156 {
157 ((rt_uint32_t *)stack_frame)[i] = 0xdeadbeef;
158 }
159
160 stack_frame->exception_stack_frame.r0 = (unsigned long)parameter; /* r0 : argument */
161 stack_frame->exception_stack_frame.r1 = 0; /* r1 */
162 stack_frame->exception_stack_frame.r2 = 0; /* r2 */
163 stack_frame->exception_stack_frame.r3 = 0; /* r3 */
164 stack_frame->exception_stack_frame.r12 = 0; /* r12 */
165 stack_frame->exception_stack_frame.lr = (unsigned long)texit; /* lr */
166 stack_frame->exception_stack_frame.pc = (unsigned long)tentry; /* entry point, pc */
167 stack_frame->exception_stack_frame.psr = 0x01000000L; /* PSR */
168
169 #if USE_FPU
170 stack_frame->flag = 0;
171 #endif /* USE_FPU */
172
173 /* return task's current stack address */
174 return stk;
175 }
176
177 /**
178 * This function set the hook, which is invoked on fault exception handling.
179 *
180 * @param exception_handle the exception handling hook function.
181 */
rt_hw_exception_install(rt_err_t (* exception_handle)(void * context))182 void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context))
183 {
184 rt_exception_hook = exception_handle;
185 }
186
187 #define SCB_CFSR (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */
188 #define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */
189 #define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */
190 #define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */
191 #define SCB_AIRCR (*(volatile unsigned long *)0xE000ED0C) /* Reset control Address Register */
192 #define SCB_RESET_VALUE 0x05FA0004 /* Reset value, write to SCB_AIRCR can reset cpu */
193
194 #define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */
195 #define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29) /* Bus Fault Status Register */
196 #define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */
197
198 #ifdef RT_USING_FINSH
usage_fault_track(void)199 static void usage_fault_track(void)
200 {
201 rt_kprintf("usage fault:\n");
202 rt_kprintf("SCB_CFSR_UFSR:0x%02X ", SCB_CFSR_UFSR);
203
204 if(SCB_CFSR_UFSR & (1<<0))
205 {
206 /* [0]:UNDEFINSTR */
207 rt_kprintf("UNDEFINSTR ");
208 }
209
210 if(SCB_CFSR_UFSR & (1<<1))
211 {
212 /* [1]:INVSTATE */
213 rt_kprintf("INVSTATE ");
214 }
215
216 if(SCB_CFSR_UFSR & (1<<2))
217 {
218 /* [2]:INVPC */
219 rt_kprintf("INVPC ");
220 }
221
222 if(SCB_CFSR_UFSR & (1<<3))
223 {
224 /* [3]:NOCP */
225 rt_kprintf("NOCP ");
226 }
227
228 if(SCB_CFSR_UFSR & (1<<8))
229 {
230 /* [8]:UNALIGNED */
231 rt_kprintf("UNALIGNED ");
232 }
233
234 if(SCB_CFSR_UFSR & (1<<9))
235 {
236 /* [9]:DIVBYZERO */
237 rt_kprintf("DIVBYZERO ");
238 }
239
240 rt_kprintf("\n");
241 }
242
bus_fault_track(void)243 static void bus_fault_track(void)
244 {
245 rt_kprintf("bus fault:\n");
246 rt_kprintf("SCB_CFSR_BFSR:0x%02X ", SCB_CFSR_BFSR);
247
248 if(SCB_CFSR_BFSR & (1<<0))
249 {
250 /* [0]:IBUSERR */
251 rt_kprintf("IBUSERR ");
252 }
253
254 if(SCB_CFSR_BFSR & (1<<1))
255 {
256 /* [1]:PRECISERR */
257 rt_kprintf("PRECISERR ");
258 }
259
260 if(SCB_CFSR_BFSR & (1<<2))
261 {
262 /* [2]:IMPRECISERR */
263 rt_kprintf("IMPRECISERR ");
264 }
265
266 if(SCB_CFSR_BFSR & (1<<3))
267 {
268 /* [3]:UNSTKERR */
269 rt_kprintf("UNSTKERR ");
270 }
271
272 if(SCB_CFSR_BFSR & (1<<4))
273 {
274 /* [4]:STKERR */
275 rt_kprintf("STKERR ");
276 }
277
278 if(SCB_CFSR_BFSR & (1<<7))
279 {
280 rt_kprintf("SCB->BFAR:%08X\n", SCB_BFAR);
281 }
282 else
283 {
284 rt_kprintf("\n");
285 }
286 }
287
mem_manage_fault_track(void)288 static void mem_manage_fault_track(void)
289 {
290 rt_kprintf("mem manage fault:\n");
291 rt_kprintf("SCB_CFSR_MFSR:0x%02X ", SCB_CFSR_MFSR);
292
293 if(SCB_CFSR_MFSR & (1<<0))
294 {
295 /* [0]:IACCVIOL */
296 rt_kprintf("IACCVIOL ");
297 }
298
299 if(SCB_CFSR_MFSR & (1<<1))
300 {
301 /* [1]:DACCVIOL */
302 rt_kprintf("DACCVIOL ");
303 }
304
305 if(SCB_CFSR_MFSR & (1<<3))
306 {
307 /* [3]:MUNSTKERR */
308 rt_kprintf("MUNSTKERR ");
309 }
310
311 if(SCB_CFSR_MFSR & (1<<4))
312 {
313 /* [4]:MSTKERR */
314 rt_kprintf("MSTKERR ");
315 }
316
317 if(SCB_CFSR_MFSR & (1<<7))
318 {
319 /* [7]:MMARVALID */
320 rt_kprintf("SCB->MMAR:%08X\n", SCB_MMAR);
321 }
322 else
323 {
324 rt_kprintf("\n");
325 }
326 }
327
hard_fault_track(void)328 static void hard_fault_track(void)
329 {
330 if(SCB_HFSR & (1UL<<1))
331 {
332 /* [1]:VECTBL, Indicates hard fault is caused by failed vector fetch. */
333 rt_kprintf("failed vector fetch\n");
334 }
335
336 if(SCB_HFSR & (1UL<<30))
337 {
338 /* [30]:FORCED, Indicates hard fault is taken because of bus fault,
339 memory management fault, or usage fault. */
340 if(SCB_CFSR_BFSR)
341 {
342 bus_fault_track();
343 }
344
345 if(SCB_CFSR_MFSR)
346 {
347 mem_manage_fault_track();
348 }
349
350 if(SCB_CFSR_UFSR)
351 {
352 usage_fault_track();
353 }
354 }
355
356 if(SCB_HFSR & (1UL<<31))
357 {
358 /* [31]:DEBUGEVT, Indicates hard fault is triggered by debug event. */
359 rt_kprintf("debug event\n");
360 }
361 }
362 #endif /* RT_USING_FINSH */
363
364 struct exception_info
365 {
366 rt_uint32_t exc_return;
367 struct stack_frame stack_frame;
368 };
369
rt_hw_hard_fault_exception(struct exception_info * exception_info)370 void rt_hw_hard_fault_exception(struct exception_info *exception_info)
371 {
372 extern long list_thread(void);
373 struct exception_stack_frame *exception_stack = &exception_info->stack_frame.exception_stack_frame;
374 struct stack_frame *context = &exception_info->stack_frame;
375
376 if (rt_exception_hook != RT_NULL)
377 {
378 rt_err_t result;
379
380 result = rt_exception_hook(exception_stack);
381 if (result == RT_EOK) return;
382 }
383
384 rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr);
385
386 rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0);
387 rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1);
388 rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2);
389 rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3);
390 rt_kprintf("r04: 0x%08x\n", context->r4);
391 rt_kprintf("r05: 0x%08x\n", context->r5);
392 rt_kprintf("r06: 0x%08x\n", context->r6);
393 rt_kprintf("r07: 0x%08x\n", context->r7);
394 rt_kprintf("r08: 0x%08x\n", context->r8);
395 rt_kprintf("r09: 0x%08x\n", context->r9);
396 rt_kprintf("r10: 0x%08x\n", context->r10);
397 rt_kprintf("r11: 0x%08x\n", context->r11);
398 rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12);
399 rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr);
400 rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc);
401
402 if (exception_info->exc_return & (1 << 2))
403 {
404 rt_kprintf("hard fault on thread: %s\r\n\r\n", rt_thread_self()->name);
405
406 #ifdef RT_USING_FINSH
407 list_thread();
408 #endif
409 }
410 else
411 {
412 rt_kprintf("hard fault on handler\r\n\r\n");
413 }
414
415 if ( (exception_info->exc_return & 0x10) == 0)
416 {
417 rt_kprintf("FPU active!\r\n");
418 }
419
420 #ifdef RT_USING_FINSH
421 hard_fault_track();
422 #endif /* RT_USING_FINSH */
423
424 while (1);
425 }
426
427 /**
428 * shutdown CPU
429 */
rt_hw_cpu_shutdown(void)430 void rt_hw_cpu_shutdown(void)
431 {
432 rt_kprintf("shutdown...\n");
433
434 RT_ASSERT(0);
435 }
436
437 /**
438 * reset CPU
439 */
rt_hw_cpu_reset(void)440 RT_WEAK void rt_hw_cpu_reset(void)
441 {
442 SCB_AIRCR = SCB_RESET_VALUE;
443 }
444
445 #ifdef RT_USING_CPU_FFS
446 /**
447 * This function finds the first bit set (beginning with the least significant bit)
448 * in value and return the index of that bit.
449 *
450 * Bits are numbered starting at 1 (the least significant bit). A return value of
451 * zero from any of these functions means that the argument was zero.
452 *
453 * @return return the index of the first bit set. If value is 0, then this function
454 * shall return 0.
455 */
456 #if defined(__CC_ARM) || defined(__CLANG_ARM)
__rt_ffs(int value)457 __asm int __rt_ffs(int value)
458 {
459 CMP r0, #0x00
460 BEQ exit
461
462 RBIT r0, r0
463 CLZ r0, r0
464 ADDS r0, r0, #0x01
465
466 exit
467 BX lr
468 }
469 #elif defined(__IAR_SYSTEMS_ICC__)
__rt_ffs(int value)470 int __rt_ffs(int value)
471 {
472 if (value == 0) return value;
473
474 asm("RBIT %0, %1" : "=r"(value) : "r"(value));
475 asm("CLZ %0, %1" : "=r"(value) : "r"(value));
476 asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value));
477
478 return value;
479 }
480 #elif defined(__GNUC__)
__rt_ffs(int value)481 int __rt_ffs(int value)
482 {
483 return __builtin_ffs(value);
484 }
485 #endif
486
487 #endif
488