1 /*
2 * Copyright (c) 2006-2018, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2010-01-25 Bernard first version
9 * 2012-05-31 aozima Merge all of the C source code into cpuport.c
10 * 2012-08-17 aozima fixed bug: store r8 - r11.
11 * 2012-12-23 aozima stack addr align to 8byte.
12 */
13
14 #include <rtthread.h>
15
16 struct exception_stack_frame
17 {
18 rt_uint32_t r0;
19 rt_uint32_t r1;
20 rt_uint32_t r2;
21 rt_uint32_t r3;
22 rt_uint32_t r12;
23 rt_uint32_t lr;
24 rt_uint32_t pc;
25 rt_uint32_t psr;
26 };
27
28 struct stack_frame
29 {
30 /* r4 ~ r7 low register */
31 rt_uint32_t r4;
32 rt_uint32_t r5;
33 rt_uint32_t r6;
34 rt_uint32_t r7;
35
36 /* r8 ~ r11 high register */
37 rt_uint32_t r8;
38 rt_uint32_t r9;
39 rt_uint32_t r10;
40 rt_uint32_t r11;
41
42 struct exception_stack_frame exception_stack_frame;
43 };
44
45 /* flag in interrupt handling */
46 rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
47 rt_uint32_t rt_thread_switch_interrupt_flag;
48
49 /**
50 * This function will initialize thread stack
51 *
52 * @param tentry the entry of thread
53 * @param parameter the parameter of entry
54 * @param stack_addr the beginning stack address
55 * @param texit the function will be called when thread exit
56 *
57 * @return stack address
58 */
rt_hw_stack_init(void * tentry,void * parameter,rt_uint8_t * stack_addr,void * texit)59 rt_uint8_t *rt_hw_stack_init(void *tentry,
60 void *parameter,
61 rt_uint8_t *stack_addr,
62 void *texit)
63 {
64 struct stack_frame *stack_frame;
65 rt_uint8_t *stk;
66 unsigned long i;
67
68 stk = stack_addr + sizeof(rt_uint32_t);
69 stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stk, 8);
70 stk -= sizeof(struct stack_frame);
71
72 stack_frame = (struct stack_frame *)stk;
73
74 /* init all register */
75 for (i = 0; i < sizeof(struct stack_frame) / sizeof(rt_uint32_t); i ++)
76 {
77 ((rt_uint32_t *)stack_frame)[i] = 0xdeadbeef;
78 }
79
80 stack_frame->exception_stack_frame.r0 = (unsigned long)parameter; /* r0 : argument */
81 stack_frame->exception_stack_frame.r1 = 0; /* r1 */
82 stack_frame->exception_stack_frame.r2 = 0; /* r2 */
83 stack_frame->exception_stack_frame.r3 = 0; /* r3 */
84 stack_frame->exception_stack_frame.r12 = 0; /* r12 */
85 stack_frame->exception_stack_frame.lr = (unsigned long)texit; /* lr */
86 stack_frame->exception_stack_frame.pc = (unsigned long)tentry; /* entry point, pc */
87 stack_frame->exception_stack_frame.psr = 0x01000000L; /* PSR */
88
89 /* return task's current stack address */
90 return stk;
91 }
92
93 extern long list_thread(void);
94 extern rt_thread_t rt_current_thread;
95 /**
96 * fault exception handling
97 */
rt_hw_hard_fault_exception(struct exception_stack_frame * contex)98 void rt_hw_hard_fault_exception(struct exception_stack_frame *contex)
99 {
100 rt_kprintf("psr: 0x%08x\n", contex->psr);
101 rt_kprintf(" pc: 0x%08x\n", contex->pc);
102 rt_kprintf(" lr: 0x%08x\n", contex->lr);
103 rt_kprintf("r12: 0x%08x\n", contex->r12);
104 rt_kprintf("r03: 0x%08x\n", contex->r3);
105 rt_kprintf("r02: 0x%08x\n", contex->r2);
106 rt_kprintf("r01: 0x%08x\n", contex->r1);
107 rt_kprintf("r00: 0x%08x\n", contex->r0);
108
109 rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
110
111 #ifdef RT_USING_FINSH
112 list_thread();
113 #endif
114
115 while (1);
116 }
117
118 #define SCB_CFSR (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */
119 #define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */
120 #define SCB_MMAR (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */
121 #define SCB_BFAR (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */
122 #define SCB_AIRCR (*(volatile unsigned long *)0xE000ED00) /* Reset control Address Register */
123 #define SCB_RESET_VALUE 0x05FA0004 /* Reset value, write to SCB_AIRCR can reset cpu */
124
125 #define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28) /* Memory-management Fault Status Register */
126 #define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29) /* Bus Fault Status Register */
127 #define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */
128
129 /**
130 * reset CPU
131 */
rt_hw_cpu_reset(void)132 RT_WEAK void rt_hw_cpu_reset(void)
133 {
134 SCB_AIRCR = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk);
135 }
136