xref: /nrf52832-nimble/rt-thread/libcpu/arm/arm926/context_gcc.S (revision 104654410c56c573564690304ae786df310c91fc)
1;/*
2; * Copyright (c) 2006-2018, RT-Thread Development Team
3; *
4; * SPDX-License-Identifier: Apache-2.0
5; *
6; * Change Logs:
7; * Date           Author       Notes
8; * 2011-08-14     weety    copy from mini2440
9; */
10
11#define NOINT   0xC0
12
13;/*
14; * rt_base_t rt_hw_interrupt_disable();
15; */
16    .globl rt_hw_interrupt_disable
17rt_hw_interrupt_disable:
18    MRS     R0, CPSR
19    ORR     R1, R0, #NOINT
20    MSR     CPSR_c, R1
21    BX      LR
22
23/*
24 * void rt_hw_interrupt_enable(rt_base_t level);
25 */
26    .globl rt_hw_interrupt_enable
27rt_hw_interrupt_enable:
28    MSR     CPSR, R0
29    BX      LR
30
31/*
32 * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
33 * r0 --> from
34 * r1 --> to
35 */
36    .globl rt_hw_context_switch
37rt_hw_context_switch:
38    STMFD   SP!, {LR}           @; push pc (lr should be pushed in place of pc)
39    STMFD   SP!, {R0-R12, LR}       @; push lr & register file
40    MRS     R4, CPSR
41    STMFD   SP!, {R4}               @; push cpsr
42    STR     SP, [R0]                @; store sp in preempted tasks tcb
43    LDR     SP, [R1]                @; get new task stack pointer
44    LDMFD   SP!, {R4}               @; pop new task spsr
45    MSR     SPSR_cxsf, R4
46    LDMFD   SP!, {R0-R12, LR, PC}^  @; pop new task r0-r12, lr & pc
47
48/*
49 * void rt_hw_context_switch_to(rt_uint32 to);
50 * r0 --> to
51 */
52    .globl rt_hw_context_switch_to
53rt_hw_context_switch_to:
54    LDR     SP, [R0]                @; get new task stack pointer
55    LDMFD   SP!, {R4}               @; pop new task cpsr
56    MSR     SPSR_cxsf, R4
57    LDMFD   SP!, {R0-R12, LR, PC}^  @; pop new task r0-r12, lr & pc
58
59/*
60 * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
61 */
62    .globl rt_thread_switch_interrupt_flag
63    .globl rt_interrupt_from_thread
64    .globl rt_interrupt_to_thread
65    .globl rt_hw_context_switch_interrupt
66rt_hw_context_switch_interrupt:
67    LDR     R2, =rt_thread_switch_interrupt_flag
68    LDR     R3, [R2]
69    CMP     R3, #1
70    BEQ     _reswitch
71    MOV     R3, #1                          @; set flag to 1
72    STR     R3, [R2]
73    LDR     R2, =rt_interrupt_from_thread   @; set rt_interrupt_from_thread
74    STR     R0, [R2]
75_reswitch:
76    LDR     R2, =rt_interrupt_to_thread     @; set rt_interrupt_to_thread
77    STR     R1, [R2]
78    BX      LR
79