xref: /nrf52832-nimble/rt-thread/components/drivers/spi/sfud/inc/sfud_flash_def.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * This file is part of the Serial Flash Universal Driver Library.
3*10465441SEvalZero  *
4*10465441SEvalZero  * Copyright (c) 2016-2018, Armink, <[email protected]>
5*10465441SEvalZero  *
6*10465441SEvalZero  * Permission is hereby granted, free of charge, to any person obtaining
7*10465441SEvalZero  * a copy of this software and associated documentation files (the
8*10465441SEvalZero  * 'Software'), to deal in the Software without restriction, including
9*10465441SEvalZero  * without limitation the rights to use, copy, modify, merge, publish,
10*10465441SEvalZero  * distribute, sublicense, and/or sell copies of the Software, and to
11*10465441SEvalZero  * permit persons to whom the Software is furnished to do so, subject to
12*10465441SEvalZero  * the following conditions:
13*10465441SEvalZero  *
14*10465441SEvalZero  * The above copyright notice and this permission notice shall be
15*10465441SEvalZero  * included in all copies or substantial portions of the Software.
16*10465441SEvalZero  *
17*10465441SEvalZero  * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
18*10465441SEvalZero  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19*10465441SEvalZero  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20*10465441SEvalZero  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
21*10465441SEvalZero  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22*10465441SEvalZero  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23*10465441SEvalZero  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24*10465441SEvalZero  *
25*10465441SEvalZero  * Function: It is the flash types and specification macro definition head file for this library.
26*10465441SEvalZero  * Created on: 2016-06-09
27*10465441SEvalZero  */
28*10465441SEvalZero 
29*10465441SEvalZero #ifndef _SFUD_FLASH_DEF_H_
30*10465441SEvalZero #define _SFUD_FLASH_DEF_H_
31*10465441SEvalZero 
32*10465441SEvalZero #include <stdint.h>
33*10465441SEvalZero #include <sfud_cfg.h>
34*10465441SEvalZero 
35*10465441SEvalZero #ifdef __cplusplus
36*10465441SEvalZero extern "C" {
37*10465441SEvalZero #endif
38*10465441SEvalZero 
39*10465441SEvalZero /**
40*10465441SEvalZero  * flash program(write) data mode
41*10465441SEvalZero  */
42*10465441SEvalZero enum sfud_write_mode {
43*10465441SEvalZero     SFUD_WM_PAGE_256B = 1 << 0,                            /**< write 1 to 256 bytes per page */
44*10465441SEvalZero     SFUD_WM_BYTE = 1 << 1,                                 /**< byte write */
45*10465441SEvalZero     SFUD_WM_AAI = 1 << 2,                                  /**< auto address increment */
46*10465441SEvalZero     SFUD_WM_DUAL_BUFFER = 1 << 3,                          /**< dual-buffer write, like AT45DB series */
47*10465441SEvalZero };
48*10465441SEvalZero 
49*10465441SEvalZero /* manufacturer information */
50*10465441SEvalZero typedef struct {
51*10465441SEvalZero     char *name;
52*10465441SEvalZero     uint8_t id;
53*10465441SEvalZero } sfud_mf;
54*10465441SEvalZero 
55*10465441SEvalZero /* flash chip information */
56*10465441SEvalZero typedef struct {
57*10465441SEvalZero     char *name;                                  /**< flash chip name */
58*10465441SEvalZero     uint8_t mf_id;                               /**< manufacturer ID */
59*10465441SEvalZero     uint8_t type_id;                             /**< memory type ID */
60*10465441SEvalZero     uint8_t capacity_id;                         /**< capacity ID */
61*10465441SEvalZero     uint32_t capacity;                           /**< flash capacity (bytes) */
62*10465441SEvalZero     uint16_t write_mode;                         /**< write mode @see sfud_write_mode */
63*10465441SEvalZero     uint32_t erase_gran;                         /**< erase granularity (bytes) */
64*10465441SEvalZero     uint8_t erase_gran_cmd;                      /**< erase granularity size block command */
65*10465441SEvalZero } sfud_flash_chip;
66*10465441SEvalZero 
67*10465441SEvalZero #ifdef SFUD_USING_QSPI
68*10465441SEvalZero /* QSPI flash chip's extended information compared with SPI flash */
69*10465441SEvalZero typedef struct {
70*10465441SEvalZero     uint8_t mf_id;                               /**< manufacturer ID */
71*10465441SEvalZero     uint8_t type_id;                             /**< memory type ID */
72*10465441SEvalZero     uint8_t capacity_id;                         /**< capacity ID */
73*10465441SEvalZero     uint8_t read_mode;                           /**< supported read mode on this qspi flash chip */
74*10465441SEvalZero } sfud_qspi_flash_ext_info;
75*10465441SEvalZero #endif
76*10465441SEvalZero 
77*10465441SEvalZero /* SFUD support manufacturer JEDEC ID */
78*10465441SEvalZero #define SFUD_MF_ID_CYPRESS                             0x01
79*10465441SEvalZero #define SFUD_MF_ID_FUJITSU                             0x04
80*10465441SEvalZero #define SFUD_MF_ID_EON                                 0x1C
81*10465441SEvalZero #define SFUD_MF_ID_ATMEL                               0x1F
82*10465441SEvalZero #define SFUD_MF_ID_MICRON                              0x20
83*10465441SEvalZero #define SFUD_MF_ID_AMIC                                0x37
84*10465441SEvalZero #define SFUD_MF_ID_SANYO                               0x62
85*10465441SEvalZero #define SFUD_MF_ID_INTEL                               0x89
86*10465441SEvalZero #define SFUD_MF_ID_ESMT                                0x8C
87*10465441SEvalZero #define SFUD_MF_ID_FUDAN                               0xA1
88*10465441SEvalZero #define SFUD_MF_ID_HYUNDAI                             0xAD
89*10465441SEvalZero #define SFUD_MF_ID_SST                                 0xBF
90*10465441SEvalZero #define SFUD_MF_ID_MICRONIX                            0xC2
91*10465441SEvalZero #define SFUD_MF_ID_GIGADEVICE                          0xC8
92*10465441SEvalZero #define SFUD_MF_ID_ISSI                                0xD5
93*10465441SEvalZero #define SFUD_MF_ID_WINBOND                             0xEF
94*10465441SEvalZero 
95*10465441SEvalZero /* SFUD supported manufacturer information table */
96*10465441SEvalZero #define SFUD_MF_TABLE                                     \
97*10465441SEvalZero {                                                         \
98*10465441SEvalZero     {"Cypress",    SFUD_MF_ID_CYPRESS},                   \
99*10465441SEvalZero     {"Fujitsu",    SFUD_MF_ID_FUJITSU},                   \
100*10465441SEvalZero     {"EON",        SFUD_MF_ID_EON},                       \
101*10465441SEvalZero     {"Atmel",      SFUD_MF_ID_ATMEL},                     \
102*10465441SEvalZero     {"Micron",     SFUD_MF_ID_MICRON},                    \
103*10465441SEvalZero     {"AMIC",       SFUD_MF_ID_AMIC},                      \
104*10465441SEvalZero     {"Sanyo",      SFUD_MF_ID_SANYO},                     \
105*10465441SEvalZero     {"Intel",      SFUD_MF_ID_INTEL},                     \
106*10465441SEvalZero     {"ESMT",       SFUD_MF_ID_ESMT},                      \
107*10465441SEvalZero     {"Fudan",      SFUD_MF_ID_FUDAN},                     \
108*10465441SEvalZero     {"Hyundai",    SFUD_MF_ID_HYUNDAI},                   \
109*10465441SEvalZero     {"SST",        SFUD_MF_ID_SST},                       \
110*10465441SEvalZero     {"GigaDevice", SFUD_MF_ID_GIGADEVICE},                \
111*10465441SEvalZero     {"ISSI",       SFUD_MF_ID_ISSI},                      \
112*10465441SEvalZero     {"Winbond",    SFUD_MF_ID_WINBOND},                   \
113*10465441SEvalZero     {"Micronix",   SFUD_MF_ID_MICRONIX},                  \
114*10465441SEvalZero }
115*10465441SEvalZero 
116*10465441SEvalZero #ifdef SFUD_USING_FLASH_INFO_TABLE
117*10465441SEvalZero /* SFUD supported flash chip information table. If the flash not support JEDEC JESD216 standard,
118*10465441SEvalZero  * then the SFUD will find the flash chip information by this table. You can add other flash to here then
119*10465441SEvalZero  *  notice me for update it. The configuration information name and index reference the sfud_flash_chip structure.
120*10465441SEvalZero  * | name | mf_id | type_id | capacity_id | capacity | write_mode | erase_gran | erase_gran_cmd |
121*10465441SEvalZero  */
122*10465441SEvalZero #define SFUD_FLASH_CHIP_TABLE                                                                                       \
123*10465441SEvalZero {                                                                                                                   \
124*10465441SEvalZero     {"AT45DB161E", SFUD_MF_ID_ATMEL, 0x26, 0x00, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_DUAL_BUFFER, 512, 0x81},      \
125*10465441SEvalZero     {"W25Q40BV", SFUD_MF_ID_WINBOND, 0x40, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                        \
126*10465441SEvalZero     {"W25Q16BV", SFUD_MF_ID_WINBOND, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                    \
127*10465441SEvalZero     {"W25Q128BV", SFUD_MF_ID_WINBOND, 0x40, 0x18, 16L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                  \
128*10465441SEvalZero     {"W25Q256FV", SFUD_MF_ID_WINBOND, 0x40, 0x19, 32L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                  \
129*10465441SEvalZero     {"SST25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20},              \
130*10465441SEvalZero     {"M25P32", SFUD_MF_ID_MICRON, 0x20, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8},                  \
131*10465441SEvalZero     {"M25P80", SFUD_MF_ID_MICRON, 0x20, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8},                  \
132*10465441SEvalZero     {"M25P40", SFUD_MF_ID_MICRON, 0x20, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8},                      \
133*10465441SEvalZero     {"EN25Q32B", SFUD_MF_ID_EON, 0x30, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                        \
134*10465441SEvalZero     {"GD25Q64B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, 8L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                 \
135*10465441SEvalZero     {"GD25Q16B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                 \
136*10465441SEvalZero     {"S25FL216K", SFUD_MF_ID_CYPRESS, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                   \
137*10465441SEvalZero     {"S25FL032P", SFUD_MF_ID_CYPRESS, 0x02, 0x15, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                   \
138*10465441SEvalZero     {"A25L080", SFUD_MF_ID_AMIC, 0x30, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20},                        \
139*10465441SEvalZero     {"F25L004", SFUD_MF_ID_ESMT, 0x20, 0x13, 512L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20},                     \
140*10465441SEvalZero     {"PCT25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20},              \
141*10465441SEvalZero }
142*10465441SEvalZero #endif /* SFUD_USING_FLASH_INFO_TABLE */
143*10465441SEvalZero 
144*10465441SEvalZero #ifdef SFUD_USING_QSPI
145*10465441SEvalZero /* This table saves flash read-fast instructions in QSPI mode,
146*10465441SEvalZero  * SFUD can use this table to select the most appropriate read instruction for flash.
147*10465441SEvalZero  * | mf_id | type_id | capacity_id | qspi_read_mode |
148*10465441SEvalZero  */
149*10465441SEvalZero #define SFUD_FLASH_EXT_INFO_TABLE                                                                  \
150*10465441SEvalZero {                                                                                                  \
151*10465441SEvalZero     /* W25Q40BV */                                                                                 \
152*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x13, NORMAL_SPI_READ|DUAL_OUTPUT},                                 \
153*10465441SEvalZero     /* W25Q80JV */                                                                                 \
154*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT},                                 \
155*10465441SEvalZero     /* W25Q16BV */                                                                                 \
156*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT},                                 \
157*10465441SEvalZero     /* W25Q32BV */                                                                                 \
158*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT},                                 \
159*10465441SEvalZero     /* W25Q64JV */                                                                                 \
160*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO},     \
161*10465441SEvalZero     /* W25Q128JV */                                                                                \
162*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x18, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO},     \
163*10465441SEvalZero     /* W25Q256FV */                                                                                \
164*10465441SEvalZero     {SFUD_MF_ID_WINBOND, 0x40, 0x19, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO},     \
165*10465441SEvalZero     /* EN25Q32B */                                                                                 \
166*10465441SEvalZero     {SFUD_MF_ID_EON, 0x30, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT|QUAD_IO},                             \
167*10465441SEvalZero     /* S25FL216K */                                                                                \
168*10465441SEvalZero     {SFUD_MF_ID_CYPRESS, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT},                                 \
169*10465441SEvalZero     /* A25L080 */                                                                                  \
170*10465441SEvalZero     {SFUD_MF_ID_AMIC, 0x30, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO},                            \
171*10465441SEvalZero     /* A25LQ64 */                                                                                  \
172*10465441SEvalZero     {SFUD_MF_ID_AMIC, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_IO},                    \
173*10465441SEvalZero     /* MX25L3206E and KH25L3206E */                                                                \
174*10465441SEvalZero     {SFUD_MF_ID_MICRONIX, 0x20, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT},                                \
175*10465441SEvalZero     /* GD25Q64B */                                                                                 \
176*10465441SEvalZero     {SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT},                              \
177*10465441SEvalZero }
178*10465441SEvalZero #endif /* SFUD_USING_QSPI */
179*10465441SEvalZero 
180*10465441SEvalZero #ifdef __cplusplus
181*10465441SEvalZero }
182*10465441SEvalZero #endif
183*10465441SEvalZero 
184*10465441SEvalZero #endif /* _SFUD_FLASH_DEF_H_ */
185