1 /* 2 * This file is part of the Serial Flash Universal Driver Library. 3 * 4 * Copyright (c) 2016-2018, Armink, <[email protected]> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining 7 * a copy of this software and associated documentation files (the 8 * 'Software'), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sublicense, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be 15 * included in all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 21 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Function: It is the flash types and specification macro definition head file for this library. 26 * Created on: 2016-06-09 27 */ 28 29 #ifndef _SFUD_FLASH_DEF_H_ 30 #define _SFUD_FLASH_DEF_H_ 31 32 #include <stdint.h> 33 #include <sfud_cfg.h> 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /** 40 * flash program(write) data mode 41 */ 42 enum sfud_write_mode { 43 SFUD_WM_PAGE_256B = 1 << 0, /**< write 1 to 256 bytes per page */ 44 SFUD_WM_BYTE = 1 << 1, /**< byte write */ 45 SFUD_WM_AAI = 1 << 2, /**< auto address increment */ 46 SFUD_WM_DUAL_BUFFER = 1 << 3, /**< dual-buffer write, like AT45DB series */ 47 }; 48 49 /* manufacturer information */ 50 typedef struct { 51 char *name; 52 uint8_t id; 53 } sfud_mf; 54 55 /* flash chip information */ 56 typedef struct { 57 char *name; /**< flash chip name */ 58 uint8_t mf_id; /**< manufacturer ID */ 59 uint8_t type_id; /**< memory type ID */ 60 uint8_t capacity_id; /**< capacity ID */ 61 uint32_t capacity; /**< flash capacity (bytes) */ 62 uint16_t write_mode; /**< write mode @see sfud_write_mode */ 63 uint32_t erase_gran; /**< erase granularity (bytes) */ 64 uint8_t erase_gran_cmd; /**< erase granularity size block command */ 65 } sfud_flash_chip; 66 67 #ifdef SFUD_USING_QSPI 68 /* QSPI flash chip's extended information compared with SPI flash */ 69 typedef struct { 70 uint8_t mf_id; /**< manufacturer ID */ 71 uint8_t type_id; /**< memory type ID */ 72 uint8_t capacity_id; /**< capacity ID */ 73 uint8_t read_mode; /**< supported read mode on this qspi flash chip */ 74 } sfud_qspi_flash_ext_info; 75 #endif 76 77 /* SFUD support manufacturer JEDEC ID */ 78 #define SFUD_MF_ID_CYPRESS 0x01 79 #define SFUD_MF_ID_FUJITSU 0x04 80 #define SFUD_MF_ID_EON 0x1C 81 #define SFUD_MF_ID_ATMEL 0x1F 82 #define SFUD_MF_ID_MICRON 0x20 83 #define SFUD_MF_ID_AMIC 0x37 84 #define SFUD_MF_ID_SANYO 0x62 85 #define SFUD_MF_ID_INTEL 0x89 86 #define SFUD_MF_ID_ESMT 0x8C 87 #define SFUD_MF_ID_FUDAN 0xA1 88 #define SFUD_MF_ID_HYUNDAI 0xAD 89 #define SFUD_MF_ID_SST 0xBF 90 #define SFUD_MF_ID_MICRONIX 0xC2 91 #define SFUD_MF_ID_GIGADEVICE 0xC8 92 #define SFUD_MF_ID_ISSI 0xD5 93 #define SFUD_MF_ID_WINBOND 0xEF 94 95 /* SFUD supported manufacturer information table */ 96 #define SFUD_MF_TABLE \ 97 { \ 98 {"Cypress", SFUD_MF_ID_CYPRESS}, \ 99 {"Fujitsu", SFUD_MF_ID_FUJITSU}, \ 100 {"EON", SFUD_MF_ID_EON}, \ 101 {"Atmel", SFUD_MF_ID_ATMEL}, \ 102 {"Micron", SFUD_MF_ID_MICRON}, \ 103 {"AMIC", SFUD_MF_ID_AMIC}, \ 104 {"Sanyo", SFUD_MF_ID_SANYO}, \ 105 {"Intel", SFUD_MF_ID_INTEL}, \ 106 {"ESMT", SFUD_MF_ID_ESMT}, \ 107 {"Fudan", SFUD_MF_ID_FUDAN}, \ 108 {"Hyundai", SFUD_MF_ID_HYUNDAI}, \ 109 {"SST", SFUD_MF_ID_SST}, \ 110 {"GigaDevice", SFUD_MF_ID_GIGADEVICE}, \ 111 {"ISSI", SFUD_MF_ID_ISSI}, \ 112 {"Winbond", SFUD_MF_ID_WINBOND}, \ 113 {"Micronix", SFUD_MF_ID_MICRONIX}, \ 114 } 115 116 #ifdef SFUD_USING_FLASH_INFO_TABLE 117 /* SFUD supported flash chip information table. If the flash not support JEDEC JESD216 standard, 118 * then the SFUD will find the flash chip information by this table. You can add other flash to here then 119 * notice me for update it. The configuration information name and index reference the sfud_flash_chip structure. 120 * | name | mf_id | type_id | capacity_id | capacity | write_mode | erase_gran | erase_gran_cmd | 121 */ 122 #define SFUD_FLASH_CHIP_TABLE \ 123 { \ 124 {"AT45DB161E", SFUD_MF_ID_ATMEL, 0x26, 0x00, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_DUAL_BUFFER, 512, 0x81}, \ 125 {"W25Q40BV", SFUD_MF_ID_WINBOND, 0x40, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 126 {"W25Q16BV", SFUD_MF_ID_WINBOND, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 127 {"W25Q128BV", SFUD_MF_ID_WINBOND, 0x40, 0x18, 16L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 128 {"W25Q256FV", SFUD_MF_ID_WINBOND, 0x40, 0x19, 32L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 129 {"SST25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \ 130 {"M25P32", SFUD_MF_ID_MICRON, 0x20, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \ 131 {"M25P80", SFUD_MF_ID_MICRON, 0x20, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \ 132 {"M25P40", SFUD_MF_ID_MICRON, 0x20, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \ 133 {"EN25Q32B", SFUD_MF_ID_EON, 0x30, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 134 {"GD25Q64B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, 8L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 135 {"GD25Q16B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 136 {"S25FL216K", SFUD_MF_ID_CYPRESS, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 137 {"S25FL032P", SFUD_MF_ID_CYPRESS, 0x02, 0x15, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 138 {"A25L080", SFUD_MF_ID_AMIC, 0x30, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \ 139 {"F25L004", SFUD_MF_ID_ESMT, 0x20, 0x13, 512L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \ 140 {"PCT25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \ 141 } 142 #endif /* SFUD_USING_FLASH_INFO_TABLE */ 143 144 #ifdef SFUD_USING_QSPI 145 /* This table saves flash read-fast instructions in QSPI mode, 146 * SFUD can use this table to select the most appropriate read instruction for flash. 147 * | mf_id | type_id | capacity_id | qspi_read_mode | 148 */ 149 #define SFUD_FLASH_EXT_INFO_TABLE \ 150 { \ 151 /* W25Q40BV */ \ 152 {SFUD_MF_ID_WINBOND, 0x40, 0x13, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 153 /* W25Q80JV */ \ 154 {SFUD_MF_ID_WINBOND, 0x40, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 155 /* W25Q16BV */ \ 156 {SFUD_MF_ID_WINBOND, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 157 /* W25Q32BV */ \ 158 {SFUD_MF_ID_WINBOND, 0x40, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 159 /* W25Q64JV */ \ 160 {SFUD_MF_ID_WINBOND, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \ 161 /* W25Q128JV */ \ 162 {SFUD_MF_ID_WINBOND, 0x40, 0x18, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \ 163 /* W25Q256FV */ \ 164 {SFUD_MF_ID_WINBOND, 0x40, 0x19, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \ 165 /* EN25Q32B */ \ 166 {SFUD_MF_ID_EON, 0x30, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT|QUAD_IO}, \ 167 /* S25FL216K */ \ 168 {SFUD_MF_ID_CYPRESS, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 169 /* A25L080 */ \ 170 {SFUD_MF_ID_AMIC, 0x30, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO}, \ 171 /* A25LQ64 */ \ 172 {SFUD_MF_ID_AMIC, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_IO}, \ 173 /* MX25L3206E and KH25L3206E */ \ 174 {SFUD_MF_ID_MICRONIX, 0x20, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 175 /* GD25Q64B */ \ 176 {SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT}, \ 177 } 178 #endif /* SFUD_USING_QSPI */ 179 180 #ifdef __cplusplus 181 } 182 #endif 183 184 #endif /* _SFUD_FLASH_DEF_H_ */ 185