1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include "rk3588.dtsi" 10 11/ { 12 compatible = "tsd,rk3588-tiger", "rockchip,rk3588"; 13 14 aliases { 15 i2c10 = &i2c10; 16 mmc0 = &sdhci; 17 rtc0 = &rtc_twi; 18 }; 19 20 emmc_pwrseq: emmc-pwrseq { 21 compatible = "mmc-pwrseq-emmc"; 22 pinctrl-0 = <&emmc_reset>; 23 pinctrl-names = "default"; 24 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 25 }; 26 27 extcon_usb3: extcon-usb3 { 28 compatible = "linux,extcon-usb-gpio"; 29 id-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&usb3_id>; 32 status = "disabled"; 33 }; 34 35 leds { 36 compatible = "gpio-leds"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&module_led_pin>; 39 40 /* Named LED1 on the board */ 41 led-1 { 42 gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; 43 function = LED_FUNCTION_HEARTBEAT; 44 linux,default-trigger = "heartbeat"; 45 color = <LED_COLOR_ID_AMBER>; 46 }; 47 }; 48 49 /* 50 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE 51 * clock generator. 52 * The clock output is gated via the OE pin on the clock generator. 53 * This is modeled as a fixed-clock plus a gpio-gate-clock. 54 */ 55 pcie_refclk_gen: pcie-refclk-gen-clock { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 clock-frequency = <100000000>; 59 }; 60 61 pcie_refclk: pcie-refclk-clock { 62 compatible = "gpio-gate-clock"; 63 clocks = <&pcie_refclk_gen>; 64 #clock-cells = <0>; 65 enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */ 66 }; 67 68 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 69 compatible = "regulator-fixed"; 70 regulator-name = "vcc_1v1_nldo_s3"; 71 regulator-always-on; 72 regulator-boot-on; 73 regulator-min-microvolt = <1100000>; 74 regulator-max-microvolt = <1100000>; 75 vin-supply = <&vcc5v0_sys>; 76 }; 77 78 vcc_1v2_s3: regulator-vcc-1v2-s3 { 79 compatible = "regulator-fixed"; 80 regulator-name = "vcc_1v2_s3"; 81 regulator-always-on; 82 regulator-boot-on; 83 regulator-min-microvolt = <1200000>; 84 regulator-max-microvolt = <1200000>; 85 vin-supply = <&vcc5v0_sys>; 86 }; 87 88 vcc5v0_sys: regulator-vcc5v0-sys { 89 compatible = "regulator-fixed"; 90 regulator-name = "vcc5v0_sys"; 91 regulator-always-on; 92 regulator-boot-on; 93 regulator-min-microvolt = <5000000>; 94 regulator-max-microvolt = <5000000>; 95 vin-supply = <&vcc5v0_baseboard>; 96 }; 97}; 98 99&cpu_b0 { 100 cpu-supply = <&vdd_cpu_big0_s0>; 101}; 102 103&cpu_b1 { 104 cpu-supply = <&vdd_cpu_big0_s0>; 105}; 106 107&cpu_b2 { 108 cpu-supply = <&vdd_cpu_big1_s0>; 109}; 110 111&cpu_b3 { 112 cpu-supply = <&vdd_cpu_big1_s0>; 113}; 114 115&cpu_l0 { 116 cpu-supply = <&vdd_cpu_lit_s0>; 117}; 118 119&cpu_l1 { 120 cpu-supply = <&vdd_cpu_lit_s0>; 121}; 122 123&cpu_l2 { 124 cpu-supply = <&vdd_cpu_lit_s0>; 125}; 126 127&cpu_l3 { 128 cpu-supply = <&vdd_cpu_lit_s0>; 129}; 130 131&gmac0 { 132 clock_in_out = "output"; 133 phy-handle = <&rgmii_phy>; 134 phy-mode = "rgmii"; 135 phy-supply = <&vcc_1v2_s3>; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&gmac0_miim 138 &gmac0_rx_bus2 139 &gmac0_tx_bus2 140 &gmac0_rgmii_clk 141 &gmac0_rgmii_bus 142 ð0_pins 143 ð_reset>; 144 tx_delay = <0x10>; 145 rx_delay = <0x10>; 146 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 147 snps,reset-active-low; 148 snps,reset-delays-us = <0 10000 100000>; 149}; 150 151&gpu { 152 mali-supply = <&vdd_gpu_s0>; 153 status = "okay"; 154}; 155 156&hdmi0 { 157 pinctrl-names = "default"; 158 pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl 159 &hdmim1_tx0_sda>; 160}; 161 162&i2c1 { 163 pinctrl-0 = <&i2c1m0_xfer>; 164}; 165 166&i2c1m0_xfer { 167 rockchip,pins = 168 /* i2c1_scl_m0 */ 169 <0 RK_PB5 9 &pcfg_pull_none_drv_level_0>, 170 /* i2c1_sda_m0 */ 171 <0 RK_PB6 9 &pcfg_pull_none_drv_level_0>; 172}; 173 174&i2c2 { 175 pinctrl-0 = <&i2c2m3_xfer>; 176 status = "okay"; 177}; 178 179&i2c2m3_xfer { 180 rockchip,pins = 181 /* i2c2_scl_m3 */ 182 <1 RK_PC5 9 &pcfg_pull_none_drv_level_0>, 183 /* i2c2_sda_m3 */ 184 <1 RK_PC4 9 &pcfg_pull_none_drv_level_0>; 185}; 186 187&i2c3 { 188 pinctrl-0 = <&i2c3m0_xfer>; 189}; 190 191&i2c4 { 192 pinctrl-0 = <&i2c4m4_xfer>; 193 status = "okay"; 194 195 vdd_npu_s0: regulator@42 { 196 compatible = "rockchip,rk8602"; 197 reg = <0x42>; 198 fcs,suspend-voltage-selector = <1>; 199 regulator-name = "vdd_npu_s0"; 200 regulator-always-on; 201 regulator-boot-on; 202 regulator-min-microvolt = <550000>; 203 regulator-max-microvolt = <950000>; 204 regulator-ramp-delay = <2300>; 205 vin-supply = <&vcc5v0_sys>; 206 207 regulator-state-mem { 208 regulator-off-in-suspend; 209 }; 210 }; 211}; 212 213&i2c5 { 214 pinctrl-0 = <&i2c5m1_xfer>; 215}; 216 217&i2c5m1_xfer { 218 rockchip,pins = 219 /* i2c5_scl_m1 */ 220 <4 RK_PB6 9 &pcfg_pull_none_drv_level_0>, 221 /* i2c5_sda_m1 */ 222 <4 RK_PB7 9 &pcfg_pull_none_drv_level_0>; 223}; 224 225&i2c6 { 226 /* 227 * Mule-ATtiny can handle up to Fast mode Plus (1MHz) on I2C bus, 228 * but SOC can handle only up to (400kHz). 229 */ 230 clock-frequency = <400000>; 231 status = "okay"; 232 233 fan@18 { 234 compatible = "tsd,mule", "ti,amc6821"; 235 reg = <0x18>; 236 237 i2c-mux { 238 compatible = "tsd,mule-i2c-mux"; 239 #address-cells = <1>; 240 #size-cells = <0>; 241 242 i2c10: i2c@0 { 243 reg = <0x0>; 244 #address-cells = <1>; 245 #size-cells = <0>; 246 247 rtc_twi: rtc@6f { 248 compatible = "isil,isl1208"; 249 reg = <0x6f>; 250 }; 251 }; 252 }; 253 }; 254}; 255 256&i2c6m0_xfer { 257 rockchip,pins = 258 /* i2c6_scl_m0 */ 259 <0 RK_PD0 9 &pcfg_pull_none_drv_level_0>, 260 /* i2c6_sda_m0 */ 261 <0 RK_PC7 9 &pcfg_pull_none_drv_level_0>; 262}; 263 264&i2c7 { 265 status = "okay"; 266 267 vdd_cpu_big0_s0: regulator@42 { 268 compatible = "rockchip,rk8602"; 269 reg = <0x42>; 270 fcs,suspend-voltage-selector = <1>; 271 regulator-name = "vdd_cpu_big0_s0"; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-min-microvolt = <550000>; 275 regulator-max-microvolt = <1050000>; 276 regulator-ramp-delay = <2300>; 277 vin-supply = <&vcc5v0_sys>; 278 279 regulator-state-mem { 280 regulator-off-in-suspend; 281 }; 282 }; 283 284 vdd_cpu_big1_s0: regulator@43 { 285 compatible = "rockchip,rk8603", "rockchip,rk8602"; 286 reg = <0x43>; 287 fcs,suspend-voltage-selector = <1>; 288 regulator-name = "vdd_cpu_big1_s0"; 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <550000>; 292 regulator-max-microvolt = <1050000>; 293 regulator-ramp-delay = <2300>; 294 vin-supply = <&vcc5v0_sys>; 295 296 regulator-state-mem { 297 regulator-off-in-suspend; 298 }; 299 }; 300}; 301 302&i2c7m0_xfer { 303 rockchip,pins = 304 /* i2c7_scl_m0 */ 305 <1 RK_PD0 9 &pcfg_pull_none_drv_level_0>, 306 /* i2c7_sda_m0 */ 307 <1 RK_PD1 9 &pcfg_pull_none_drv_level_0>; 308}; 309 310&i2c8 { 311 pinctrl-0 = <&i2c8m2_xfer>; 312}; 313 314&mdio0 { 315 rgmii_phy: ethernet-phy@6 { 316 /* KSZ9031 or KSZ9131 */ 317 compatible = "ethernet-phy-ieee802.3-c22"; 318 reg = <0x6>; 319 clocks = <&cru REFCLKO25M_ETH0_OUT>; 320 }; 321}; 322 323&pcie3x4 { 324 /* 325 * The board has a gpio-controlled "pcie_refclk" generator, 326 * so add it to the list of clocks. 327 */ 328 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 329 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 330 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 331 <&pcie_refclk>; 332 clock-names = "aclk_mst", "aclk_slv", 333 "aclk_dbi", "pclk", 334 "aux", "pipe", 335 "ref"; 336 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; 337}; 338 339&pinctrl { 340 emmc { 341 emmc_reset: emmc-reset { 342 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 343 }; 344 }; 345 346 ethernet { 347 eth_reset: eth-reset { 348 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 349 }; 350 }; 351 352 leds { 353 module_led_pin: module-led-pin { 354 rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 355 }; 356 }; 357 358 usb3 { 359 usb3_id: usb3-id { 360 rockchip,pins = 361 <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 362 }; 363 }; 364}; 365 366&pwm0 { 367 pinctrl-0 = <&pwm0m1_pins>; 368 pinctrl-names = "default"; 369}; 370 371&saradc { 372 vref-supply = <&vcc_1v8_s0>; 373 status = "okay"; 374}; 375 376&sdhci { 377 bus-width = <8>; 378 cap-mmc-highspeed; 379 mmc-ddr-1_8v; 380 mmc-hs200-1_8v; 381 mmc-hs400-1_8v; 382 mmc-hs400-enhanced-strobe; 383 mmc-pwrseq = <&emmc_pwrseq>; 384 no-sdio; 385 no-sd; 386 non-removable; 387 pinctrl-names = "default"; 388 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 389 vmmc-supply = <&vcc_3v3_s3>; 390 vqmmc-supply = <&vcc_1v8_s3>; 391 status = "okay"; 392}; 393 394&sdmmc { 395 bus-width = <4>; 396 cap-sd-highspeed; 397 max-frequency = <150000000>; 398 vqmmc-supply = <&vccio_sd_s0>; 399}; 400 401&spi0 { 402 pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>; 403}; 404 405&spi2 { 406 assigned-clocks = <&cru CLK_SPI2>; 407 assigned-clock-rates = <200000000>; 408 num-cs = <1>; 409 pinctrl-names = "default"; 410 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 411 status = "okay"; 412 413 pmic@0 { 414 compatible = "rockchip,rk806"; 415 reg = <0x0>; 416 interrupt-parent = <&gpio0>; 417 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 418 gpio-controller; 419 #gpio-cells = <2>; 420 pinctrl-names = "default"; 421 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 422 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 423 spi-max-frequency = <1000000>; 424 system-power-controller; 425 vcc1-supply = <&vcc5v0_sys>; 426 vcc2-supply = <&vcc5v0_sys>; 427 vcc3-supply = <&vcc5v0_sys>; 428 vcc4-supply = <&vcc5v0_sys>; 429 vcc5-supply = <&vcc5v0_sys>; 430 vcc6-supply = <&vcc5v0_sys>; 431 vcc7-supply = <&vcc5v0_sys>; 432 vcc8-supply = <&vcc5v0_sys>; 433 vcc9-supply = <&vcc5v0_sys>; 434 vcc10-supply = <&vcc5v0_sys>; 435 vcc11-supply = <&vcc_2v0_pldo_s3>; 436 vcc12-supply = <&vcc5v0_sys>; 437 vcc13-supply = <&vcc_1v1_nldo_s3>; 438 vcc14-supply = <&vcc_1v1_nldo_s3>; 439 vcca-supply = <&vcc5v0_sys>; 440 441 rk806_dvs1_null: dvs1-null-pins { 442 pins = "gpio_pwrctrl1"; 443 function = "pin_fun0"; 444 }; 445 446 rk806_dvs2_null: dvs2-null-pins { 447 pins = "gpio_pwrctrl2"; 448 function = "pin_fun0"; 449 }; 450 451 rk806_dvs3_null: dvs3-null-pins { 452 pins = "gpio_pwrctrl3"; 453 function = "pin_fun0"; 454 }; 455 456 regulators { 457 vdd_gpu_s0: dcdc-reg1 { 458 regulator-boot-on; 459 regulator-min-microvolt = <550000>; 460 regulator-max-microvolt = <950000>; 461 regulator-ramp-delay = <12500>; 462 regulator-name = "vdd_gpu_s0"; 463 regulator-enable-ramp-delay = <400>; 464 465 regulator-state-mem { 466 regulator-off-in-suspend; 467 }; 468 }; 469 470 vdd_cpu_lit_s0: dcdc-reg2 { 471 regulator-name = "vdd_cpu_lit_s0"; 472 regulator-always-on; 473 regulator-boot-on; 474 regulator-min-microvolt = <550000>; 475 regulator-max-microvolt = <950000>; 476 regulator-ramp-delay = <12500>; 477 478 regulator-state-mem { 479 regulator-off-in-suspend; 480 }; 481 }; 482 483 vdd_log_s0: dcdc-reg3 { 484 regulator-name = "vdd_log_s0"; 485 regulator-always-on; 486 regulator-boot-on; 487 regulator-min-microvolt = <675000>; 488 regulator-max-microvolt = <750000>; 489 regulator-ramp-delay = <12500>; 490 491 regulator-state-mem { 492 regulator-off-in-suspend; 493 regulator-suspend-microvolt = <750000>; 494 }; 495 }; 496 497 vdd_vdenc_s0: dcdc-reg4 { 498 regulator-name = "vdd_vdenc_s0"; 499 regulator-always-on; 500 regulator-boot-on; 501 regulator-min-microvolt = <550000>; 502 regulator-max-microvolt = <950000>; 503 regulator-ramp-delay = <12500>; 504 505 regulator-state-mem { 506 regulator-off-in-suspend; 507 }; 508 }; 509 510 vdd_ddr_s0: dcdc-reg5 { 511 regulator-name = "vdd_ddr_s0"; 512 regulator-always-on; 513 regulator-boot-on; 514 regulator-min-microvolt = <675000>; 515 regulator-max-microvolt = <900000>; 516 regulator-ramp-delay = <12500>; 517 518 regulator-state-mem { 519 regulator-off-in-suspend; 520 regulator-suspend-microvolt = <850000>; 521 }; 522 }; 523 524 vdd2_ddr_s3: dcdc-reg6 { 525 regulator-name = "vdd2_ddr_s3"; 526 regulator-always-on; 527 regulator-boot-on; 528 529 regulator-state-mem { 530 regulator-on-in-suspend; 531 }; 532 }; 533 534 vcc_2v0_pldo_s3: dcdc-reg7 { 535 regulator-name = "vcc_2v0_pldo_s3"; 536 regulator-always-on; 537 regulator-boot-on; 538 regulator-min-microvolt = <2000000>; 539 regulator-max-microvolt = <2000000>; 540 regulator-ramp-delay = <12500>; 541 542 regulator-state-mem { 543 regulator-on-in-suspend; 544 regulator-suspend-microvolt = <2000000>; 545 }; 546 }; 547 548 vcc_3v3_s3: dcdc-reg8 { 549 regulator-name = "vcc_3v3_s3"; 550 regulator-always-on; 551 regulator-boot-on; 552 regulator-min-microvolt = <3300000>; 553 regulator-max-microvolt = <3300000>; 554 555 regulator-state-mem { 556 regulator-on-in-suspend; 557 regulator-suspend-microvolt = <3300000>; 558 }; 559 }; 560 561 vddq_ddr_s0: dcdc-reg9 { 562 regulator-name = "vddq_ddr_s0"; 563 regulator-always-on; 564 regulator-boot-on; 565 566 regulator-state-mem { 567 regulator-off-in-suspend; 568 }; 569 }; 570 571 vcc_1v8_s3: dcdc-reg10 { 572 regulator-name = "vcc_1v8_s3"; 573 regulator-always-on; 574 regulator-boot-on; 575 regulator-min-microvolt = <1800000>; 576 regulator-max-microvolt = <1800000>; 577 578 regulator-state-mem { 579 regulator-on-in-suspend; 580 regulator-suspend-microvolt = <1800000>; 581 }; 582 }; 583 584 vcca_1v8_s0: pldo-reg1 { 585 regulator-name = "vcca_1v8_s0"; 586 regulator-always-on; 587 regulator-boot-on; 588 regulator-min-microvolt = <1800000>; 589 regulator-max-microvolt = <1800000>; 590 591 regulator-state-mem { 592 regulator-off-in-suspend; 593 }; 594 }; 595 596 vcc_1v8_s0: pldo-reg2 { 597 regulator-name = "vcc_1v8_s0"; 598 regulator-always-on; 599 regulator-boot-on; 600 regulator-min-microvolt = <1800000>; 601 regulator-max-microvolt = <1800000>; 602 603 regulator-state-mem { 604 regulator-off-in-suspend; 605 regulator-suspend-microvolt = <1800000>; 606 }; 607 }; 608 609 vdda_1v2_s0: pldo-reg3 { 610 regulator-name = "vdda_1v2_s0"; 611 regulator-always-on; 612 regulator-boot-on; 613 regulator-min-microvolt = <1200000>; 614 regulator-max-microvolt = <1200000>; 615 616 regulator-state-mem { 617 regulator-off-in-suspend; 618 }; 619 }; 620 621 vcca_3v3_s0: pldo-reg4 { 622 regulator-name = "vcca_3v3_s0"; 623 regulator-always-on; 624 regulator-boot-on; 625 regulator-min-microvolt = <3300000>; 626 regulator-max-microvolt = <3300000>; 627 regulator-ramp-delay = <12500>; 628 629 regulator-state-mem { 630 regulator-off-in-suspend; 631 }; 632 }; 633 634 vccio_sd_s0: pldo-reg5 { 635 regulator-name = "vccio_sd_s0"; 636 regulator-always-on; 637 regulator-boot-on; 638 regulator-min-microvolt = <1800000>; 639 regulator-max-microvolt = <3300000>; 640 regulator-ramp-delay = <12500>; 641 642 regulator-state-mem { 643 regulator-off-in-suspend; 644 }; 645 }; 646 647 pldo6_s3: pldo-reg6 { 648 regulator-name = "pldo6_s3"; 649 regulator-always-on; 650 regulator-boot-on; 651 regulator-min-microvolt = <1800000>; 652 regulator-max-microvolt = <1800000>; 653 654 regulator-state-mem { 655 regulator-on-in-suspend; 656 regulator-suspend-microvolt = <1800000>; 657 }; 658 }; 659 660 vdd_0v75_s3: nldo-reg1 { 661 regulator-name = "vdd_0v75_s3"; 662 regulator-always-on; 663 regulator-boot-on; 664 regulator-min-microvolt = <750000>; 665 regulator-max-microvolt = <750000>; 666 667 regulator-state-mem { 668 regulator-on-in-suspend; 669 regulator-suspend-microvolt = <750000>; 670 }; 671 }; 672 673 vdda_ddr_pll_s0: nldo-reg2 { 674 regulator-name = "vdda_ddr_pll_s0"; 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <850000>; 678 regulator-max-microvolt = <850000>; 679 680 regulator-state-mem { 681 regulator-off-in-suspend; 682 regulator-suspend-microvolt = <850000>; 683 }; 684 }; 685 686 vdda_0v75_s0: nldo-reg3 { 687 regulator-name = "vdda_0v75_s0"; 688 regulator-always-on; 689 regulator-boot-on; 690 regulator-min-microvolt = <750000>; 691 regulator-max-microvolt = <750000>; 692 693 regulator-state-mem { 694 regulator-off-in-suspend; 695 }; 696 }; 697 698 vdda_0v85_s0: nldo-reg4 { 699 regulator-name = "vdda_0v85_s0"; 700 regulator-always-on; 701 regulator-boot-on; 702 regulator-min-microvolt = <850000>; 703 regulator-max-microvolt = <850000>; 704 705 regulator-state-mem { 706 regulator-off-in-suspend; 707 }; 708 }; 709 710 vdd_0v75_s0: nldo-reg5 { 711 regulator-name = "vdd_0v75_s0"; 712 regulator-always-on; 713 regulator-boot-on; 714 regulator-min-microvolt = <750000>; 715 regulator-max-microvolt = <750000>; 716 717 regulator-state-mem { 718 regulator-off-in-suspend; 719 }; 720 }; 721 }; 722 }; 723}; 724 725&tsadc { 726 status = "okay"; 727}; 728 729/* Routed to UART0 on the Q7 connector */ 730&uart2 { 731 pinctrl-0 = <&uart2m2_xfer>; 732}; 733 734/* Mule-ATtiny UPDI */ 735&uart4 { 736 pinctrl-0 = <&uart4m2_xfer>; 737 status = "okay"; 738}; 739