1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include "rk3588-orangepi-5.dtsi"
8
9/ {
10	model = "Xunlong Orange Pi 5 Max";
11	compatible = "xunlong,orangepi-5-max", "rockchip,rk3588";
12
13	vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
14		compatible = "regulator-fixed";
15		enable-active-high;
16		/* USB_OTG_PWREN */
17		gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
18		pinctrl-names = "default";
19		pinctrl-0 = <&usb_otg_pwren>;
20		regulator-name = "vcc5v0_usb30_otg";
21		regulator-min-microvolt = <5000000>;
22		regulator-max-microvolt = <5000000>;
23		vin-supply = <&vcc5v0_sys>;
24	};
25};
26
27&headphone_amp {
28	/* PHONE_CTL */
29	enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
30};
31
32&analog_sound {
33	pinctrl-names = "default";
34	pinctrl-0 = <&hp_detect>;
35	simple-audio-card,aux-devs = <&headphone_amp>;
36	simple-audio-card,hp-det-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
37
38	simple-audio-card,routing =
39		"Headphones", "LOUT1",
40		"Headphones", "ROUT1",
41		"LINPUT1", "Microphone Jack",
42		"RINPUT1", "Microphone Jack",
43		"LINPUT2", "Onboard Microphone",
44		"RINPUT2", "Onboard Microphone";
45	simple-audio-card,widgets =
46		"Microphone", "Microphone Jack",
47		"Microphone", "Onboard Microphone",
48		"Headphone", "Headphones";
49};
50
51&fan {
52	/* FAN_CTL_H */
53	pwms = <&pwm9 0 50000 0>;
54};
55
56&hym8563 {
57	interrupt-parent = <&gpio0>;
58	interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
59	pinctrl-names = "default";
60	pinctrl-0 = <&rtc_int_l>;
61};
62
63&led_blue_pwm {
64	/* PWM_LED1 */
65	pwms = <&pwm4 0 25000 0>;
66	status = "okay";
67};
68
69&led_green_pwm {
70	/* PWM_LED2 */
71	pwms = <&pwm5 0 25000 0>;
72};
73
74/* phy2 */
75&pcie2x1l1 {
76	reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
77	vpcie3v3-supply = <&vcc3v3_pcie_eth>;
78	status = "okay";
79};
80
81&pinctrl {
82	hym8563 {
83		rtc_int_l: hym8563-int {
84			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
85		};
86	};
87
88	sound {
89		hp_detect: hp-detect {
90			rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
91		};
92	};
93
94	usb {
95		usb_host_pwren: usb-host-pwren {
96			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
97		};
98	};
99};
100
101&pwm4 {
102	pinctrl-names = "default";
103	pinctrl-0 = <&pwm4m0_pins>;
104	status = "okay";
105};
106
107&pwm5 {
108	pinctrl-names = "default";
109	pinctrl-0 = <&pwm5m1_pins>;
110	status = "okay";
111};
112
113&pwm9 {
114	pinctrl-names = "default";
115	pinctrl-0 = <&pwm9m2_pins>;
116	status = "okay";
117};
118
119&sfc {
120	pinctrl-names = "default";
121	pinctrl-0 = <&fspim2_pins>;
122};
123
124&u2phy0_otg {
125	phy-supply = <&vcc5v0_usb30_otg>;
126};
127
128&u2phy1_otg {
129	phy-supply = <&vcc5v0_usb20>;
130};
131
132&usb_host0_xhci {
133	dr_mode = "host";
134};
135
136/* pcie eth. not a real regulator. 33VAUX */
137&vcc3v3_pcie_eth {
138	/* Ethernet_power_en */
139	gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
140};
141
142/*
143 * Represents the vcc5v0_usb20 and vcc5v0_usb30 in the schematic,
144 * both regulators share the same enable gpio
145 */
146&vcc5v0_usb20 {
147	/* USB_HOST_PWREN */
148	gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
149	pinctrl-names = "default";
150	pinctrl-0 = <&usb_host_pwren>;
151};
152