1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH 4 */ 5 6/dts-v1/; 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include <dt-bindings/usb/pd.h> 13#include "rk3588.dtsi" 14 15/ { 16 model = "Theobroma Systems RK3588-SBC Jaguar"; 17 compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; 18 19 adc-keys { 20 compatible = "adc-keys"; 21 io-channels = <&saradc 0>; 22 io-channel-names = "buttons"; 23 keyup-threshold-microvolt = <1800000>; 24 poll-interval = <100>; 25 26 /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ 27 button-bios-disable { 28 label = "BIOS_DISABLE"; 29 linux,code = <KEY_VENDOR>; 30 press-threshold-microvolt = <0>; 31 }; 32 }; 33 34 aliases { 35 ethernet0 = &gmac0; 36 i2c10 = &i2c10; 37 mmc0 = &sdhci; 38 mmc1 = &sdmmc; 39 rtc0 = &rtc_twi; 40 }; 41 42 chosen { 43 stdout-path = "serial2:115200n8"; 44 }; 45 46 /* DCIN is 12-24V but standard is 12V */ 47 dc_12v: regulator-dc-12v { 48 compatible = "regulator-fixed"; 49 regulator-name = "dc_12v"; 50 regulator-always-on; 51 regulator-boot-on; 52 regulator-min-microvolt = <12000000>; 53 regulator-max-microvolt = <12000000>; 54 }; 55 56 emmc_pwrseq: emmc-pwrseq { 57 compatible = "mmc-pwrseq-emmc"; 58 pinctrl-0 = <&emmc_reset>; 59 pinctrl-names = "default"; 60 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 61 }; 62 63 hdmi-con { 64 compatible = "hdmi-connector"; 65 type = "a"; 66 67 port { 68 hdmi_con_in: endpoint { 69 remote-endpoint = <&hdmi0_out_con>; 70 }; 71 }; 72 }; 73 74 leds { 75 compatible = "gpio-leds"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&led1_pin>; 78 79 /* LED1 on PCB */ 80 led-1 { 81 gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 82 function = LED_FUNCTION_HEARTBEAT; 83 linux,default-trigger = "heartbeat"; 84 color = <LED_COLOR_ID_AMBER>; 85 }; 86 }; 87 88 /* 89 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE 90 * clock generator. 91 * The clock output is gated via the OE pin on the clock generator. 92 * This is modeled as a fixed-clock plus a gpio-gate-clock. 93 */ 94 pcie_refclk_gen: pcie-refclk-gen-clock { 95 compatible = "fixed-clock"; 96 #clock-cells = <0>; 97 clock-frequency = <100000000>; 98 }; 99 100 pcie_refclk: pcie-refclk-clock { 101 compatible = "gpio-gate-clock"; 102 clocks = <&pcie_refclk_gen>; 103 #clock-cells = <0>; 104 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */ 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pcie30x4_clkreqn_m0>; 107 }; 108 109 pps { 110 compatible = "pps-gpio"; 111 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 112 }; 113 114 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 115 compatible = "regulator-fixed"; 116 regulator-name = "vcc_1v1_nldo_s3"; 117 regulator-always-on; 118 regulator-boot-on; 119 regulator-min-microvolt = <1100000>; 120 regulator-max-microvolt = <1100000>; 121 vin-supply = <&vcc5v0_sys>; 122 }; 123 124 vcc_1v2_s3: regulator-vcc-1v2-s3 { 125 compatible = "regulator-fixed"; 126 regulator-name = "vcc_1v2_s3"; 127 regulator-always-on; 128 regulator-boot-on; 129 regulator-min-microvolt = <1200000>; 130 regulator-max-microvolt = <1200000>; 131 vin-supply = <&vcc5v0_sys>; 132 }; 133 134 /* Exposed on P14 and P15 */ 135 vcc_2v8_s3: regulator-vcc-2v8-s3 { 136 compatible = "regulator-fixed"; 137 regulator-name = "vcc_2v8_s3"; 138 regulator-always-on; 139 regulator-boot-on; 140 regulator-min-microvolt = <2800000>; 141 regulator-max-microvolt = <2800000>; 142 vin-supply = <&vcc_3v3_s3>; 143 }; 144 145 vcc_5v0_usb_a: regulator-vcc-5v0-usb-a { 146 compatible = "regulator-fixed"; 147 regulator-name = "usb_a_vcc"; 148 regulator-min-microvolt = <5000000>; 149 regulator-max-microvolt = <5000000>; 150 vin-supply = <&vcc5v0_sys>; 151 gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 152 enable-active-high; 153 }; 154 155 vcc_5v0_usb_c1: regulator-vcc-5v0-usb-c1 { 156 compatible = "regulator-fixed"; 157 regulator-name = "5v_usbc1"; 158 regulator-min-microvolt = <5000000>; 159 regulator-max-microvolt = <5000000>; 160 vin-supply = <&vcc5v0_usb>; 161 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 162 enable-active-high; 163 }; 164 165 vcc_5v0_usb_c2: regulator-vcc-5v0-usb-c2 { 166 compatible = "regulator-fixed"; 167 regulator-name = "5v_usbc2"; 168 regulator-min-microvolt = <5000000>; 169 regulator-max-microvolt = <5000000>; 170 vin-supply = <&vcc5v0_usb>; 171 gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 172 enable-active-high; 173 }; 174 175 vcc3v3_mdot2: regulator-vcc3v3-mdot2 { 176 compatible = "regulator-fixed"; 177 regulator-name = "vcc3v3_mdot2"; 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-min-microvolt = <3300000>; 181 regulator-max-microvolt = <3300000>; 182 vin-supply = <&dc_12v>; 183 }; 184 185 vcc5v0_sys: regulator-vcc5v0-sys { 186 compatible = "regulator-fixed"; 187 regulator-name = "vcc5v0_sys"; 188 regulator-always-on; 189 regulator-boot-on; 190 regulator-min-microvolt = <5000000>; 191 regulator-max-microvolt = <5000000>; 192 vin-supply = <&dc_12v>; 193 }; 194 195 vcc5v0_usb: regulator-vcc5v0-usb { 196 compatible = "regulator-fixed"; 197 regulator-name = "vcc5v0_usb"; 198 regulator-always-on; 199 regulator-boot-on; 200 regulator-min-microvolt = <5000000>; 201 regulator-max-microvolt = <5000000>; 202 vin-supply = <&vcc5v0_sys>; 203 }; 204}; 205 206&combphy1_ps { 207 status = "okay"; 208}; 209 210&cpu_b0 { 211 cpu-supply = <&vdd_cpu_big0_s0>; 212}; 213 214&cpu_b1 { 215 cpu-supply = <&vdd_cpu_big0_s0>; 216}; 217 218&cpu_b2 { 219 cpu-supply = <&vdd_cpu_big1_s0>; 220}; 221 222&cpu_b3 { 223 cpu-supply = <&vdd_cpu_big1_s0>; 224}; 225 226&cpu_l0 { 227 cpu-supply = <&vdd_cpu_lit_s0>; 228}; 229 230&cpu_l1 { 231 cpu-supply = <&vdd_cpu_lit_s0>; 232}; 233 234&cpu_l2 { 235 cpu-supply = <&vdd_cpu_lit_s0>; 236}; 237 238&cpu_l3 { 239 cpu-supply = <&vdd_cpu_lit_s0>; 240}; 241 242&gmac0 { 243 clock_in_out = "output"; 244 phy-handle = <&rgmii_phy>; 245 phy-mode = "rgmii"; 246 phy-supply = <&vcc_1v2_s3>; 247 pinctrl-names = "default"; 248 pinctrl-0 = <&gmac0_miim 249 &gmac0_rx_bus2 250 &gmac0_tx_bus2 251 &gmac0_rgmii_clk 252 &gmac0_rgmii_bus 253 ð0_pins 254 ð_reset>; 255 tx_delay = <0x10>; 256 rx_delay = <0x10>; 257 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 258 snps,reset-active-low; 259 snps,reset-delays-us = <0 10000 100000>; 260 261 status = "okay"; 262}; 263 264&gpio1 { 265 mdot2e-w-disable1-n-hog { 266 gpios = <RK_PB1 GPIO_ACTIVE_LOW>; 267 output-low; 268 line-name = "m.2 E-key W_DISABLE1#"; 269 gpio-hog; 270 }; 271}; 272 273&gpio4 { 274 mdot2e-w-disable2-n-hog { 275 gpios = <RK_PC1 GPIO_ACTIVE_LOW>; 276 output-low; 277 line-name = "m.2 E-key W_DISABLE2#"; 278 gpio-hog; 279 }; 280}; 281 282&gpu { 283 mali-supply = <&vdd_gpu_s0>; 284 status = "okay"; 285}; 286 287&hdmi0 { 288 /* No CEC on Jaguar */ 289 pinctrl-names = "default"; 290 pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; 291 status = "okay"; 292}; 293 294&hdmi0_in { 295 hdmi0_in_vp0: endpoint { 296 remote-endpoint = <&vp0_out_hdmi0>; 297 }; 298}; 299 300&hdmi0_out { 301 hdmi0_out_con: endpoint { 302 remote-endpoint = <&hdmi_con_in>; 303 }; 304}; 305 306&hdptxphy_hdmi0 { 307 status = "okay"; 308}; 309 310&i2c0 { 311 pinctrl-0 = <&i2c0m2_xfer>; 312 status = "okay"; 313 314 fan@18 { 315 compatible = "tsd,mule", "ti,amc6821"; 316 reg = <0x18>; 317 318 i2c-mux { 319 compatible = "tsd,mule-i2c-mux"; 320 #address-cells = <1>; 321 #size-cells = <0>; 322 323 i2c10: i2c@0 { 324 reg = <0x0>; 325 #address-cells = <1>; 326 #size-cells = <0>; 327 328 rtc_twi: rtc@6f { 329 compatible = "isil,isl1208"; 330 reg = <0x6f>; 331 }; 332 }; 333 }; 334 }; 335 336 vdd_npu_s0: regulator@42 { 337 compatible = "rockchip,rk8602"; 338 reg = <0x42>; 339 fcs,suspend-voltage-selector = <1>; 340 regulator-name = "vdd_npu_s0"; 341 regulator-always-on; 342 regulator-boot-on; 343 regulator-min-microvolt = <550000>; 344 regulator-max-microvolt = <950000>; 345 regulator-ramp-delay = <2300>; 346 vin-supply = <&vcc5v0_sys>; 347 348 regulator-state-mem { 349 regulator-off-in-suspend; 350 }; 351 }; 352 353 vdd_cpu_big1_s0: regulator@43 { 354 compatible = "rockchip,rk8603", "rockchip,rk8602"; 355 reg = <0x43>; 356 fcs,suspend-voltage-selector = <1>; 357 regulator-name = "vdd_cpu_big1_s0"; 358 regulator-always-on; 359 regulator-boot-on; 360 regulator-min-microvolt = <550000>; 361 regulator-max-microvolt = <1050000>; 362 regulator-ramp-delay = <2300>; 363 vin-supply = <&vcc5v0_sys>; 364 365 regulator-state-mem { 366 regulator-off-in-suspend; 367 }; 368 }; 369}; 370 371&i2c1 { 372 pinctrl-0 = <&i2c1m4_xfer>; 373}; 374 375&i2c6 { 376 pinctrl-0 = <&i2c6m4_xfer>; 377}; 378 379&i2c7 { 380 status = "okay"; 381 382 /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ 383 384 /* Also on 0x55 */ 385 eeprom@54 { 386 compatible = "st,24c04", "atmel,24c04"; 387 reg = <0x54>; 388 pagesize = <16>; 389 vcc-supply = <&vcc_3v3_s3>; 390 }; 391}; 392 393&i2c8 { 394 pinctrl-0 = <&i2c8m2_xfer>; 395 status = "okay"; 396 397 vdd_cpu_big0_s0: regulator@42 { 398 compatible = "rockchip,rk8602"; 399 reg = <0x42>; 400 fcs,suspend-voltage-selector = <1>; 401 regulator-name = "vdd_cpu_big0_s0"; 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <550000>; 405 regulator-max-microvolt = <1050000>; 406 regulator-ramp-delay = <2300>; 407 vin-supply = <&vcc5v0_sys>; 408 409 regulator-state-mem { 410 regulator-off-in-suspend; 411 }; 412 }; 413}; 414 415&mdio0 { 416 rgmii_phy: ethernet-phy@6 { 417 /* KSZ9031 or KSZ9131 */ 418 compatible = "ethernet-phy-ieee802.3-c22"; 419 reg = <0x6>; 420 clocks = <&cru REFCLKO25M_ETH0_OUT>; 421 }; 422}; 423 424&pcie2x1l0 { 425 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ 426 vpcie3v3-supply = <&vcc3v3_mdot2>; 427 status = "okay"; 428}; 429 430&pcie30phy { 431 status = "okay"; 432}; 433 434&pcie3x4 { 435 /* 436 * The board has a gpio-controlled "pcie_refclk" generator, 437 * so add it to the list of clocks. 438 */ 439 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 440 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 441 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 442 <&pcie_refclk>; 443 clock-names = "aclk_mst", "aclk_slv", 444 "aclk_dbi", "pclk", 445 "aux", "pipe", 446 "ref"; 447 pinctrl-names = "default"; 448 pinctrl-0 = <&pcie30x4_waken_m0 &pcie30x4_perstn_m0>; 449 reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */ 450 vpcie3v3-supply = <&vcc3v3_mdot2>; 451 status = "okay"; 452}; 453 454&pinctrl { 455 emmc { 456 emmc_reset: emmc-reset { 457 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 458 }; 459 }; 460 461 ethernet { 462 eth_reset: eth-reset { 463 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 464 }; 465 }; 466 467 leds { 468 led1_pin: led1-pin { 469 rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 470 }; 471 }; 472 473 pcie30x4 { 474 pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 { 475 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 476 }; 477 478 pcie30x4_perstn_m0: pcie30x4-perstn-m0 { 479 rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 480 }; 481 482 pcie30x4_waken_m0: pcie30x4-waken-m0 { 483 rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>; 484 }; 485 }; 486}; 487 488&saradc { 489 vref-supply = <&vcc_1v8_s0>; 490 status = "okay"; 491}; 492 493&sdhci { 494 bus-width = <8>; 495 cap-mmc-highspeed; 496 mmc-ddr-1_8v; 497 mmc-hs200-1_8v; 498 mmc-hs400-1_8v; 499 mmc-hs400-enhanced-strobe; 500 mmc-pwrseq = <&emmc_pwrseq>; 501 no-sdio; 502 no-sd; 503 non-removable; 504 pinctrl-names = "default"; 505 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 506 vmmc-supply = <&vcc_3v3_s3>; 507 vqmmc-supply = <&vcc_1v8_s3>; 508 status = "okay"; 509}; 510 511&sdmmc { 512 broken-cd; 513 bus-width = <4>; 514 cap-sd-highspeed; 515 disable-wp; 516 max-frequency = <150000000>; 517 pinctrl-names = "default"; 518 pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; 519 sd-uhs-sdr12; 520 sd-uhs-sdr25; 521 sd-uhs-sdr50; 522 sd-uhs-ddr50; 523 sd-uhs-sdr104; 524 vmmc-supply = <&vcc_3v3_s3>; 525 vqmmc-supply = <&vccio_sd_s0>; 526 status = "okay"; 527}; 528 529&spi2 { 530 assigned-clocks = <&cru CLK_SPI2>; 531 assigned-clock-rates = <200000000>; 532 num-cs = <1>; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 535 status = "okay"; 536 537 pmic@0 { 538 compatible = "rockchip,rk806"; 539 reg = <0x0>; 540 interrupt-parent = <&gpio0>; 541 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 542 gpio-controller; 543 #gpio-cells = <2>; 544 pinctrl-names = "default"; 545 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 546 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 547 spi-max-frequency = <1000000>; 548 system-power-controller; 549 vcc1-supply = <&vcc5v0_sys>; 550 vcc2-supply = <&vcc5v0_sys>; 551 vcc3-supply = <&vcc5v0_sys>; 552 vcc4-supply = <&vcc5v0_sys>; 553 vcc5-supply = <&vcc5v0_sys>; 554 vcc6-supply = <&vcc5v0_sys>; 555 vcc7-supply = <&vcc5v0_sys>; 556 vcc8-supply = <&vcc5v0_sys>; 557 vcc9-supply = <&vcc5v0_sys>; 558 vcc10-supply = <&vcc5v0_sys>; 559 vcc11-supply = <&vcc_2v0_pldo_s3>; 560 vcc12-supply = <&vcc5v0_sys>; 561 vcc13-supply = <&vcc_1v1_nldo_s3>; 562 vcc14-supply = <&vcc_1v1_nldo_s3>; 563 vcca-supply = <&vcc5v0_sys>; 564 565 rk806_dvs1_null: dvs1-null-pins { 566 pins = "gpio_pwrctrl1"; 567 function = "pin_fun0"; 568 }; 569 570 rk806_dvs2_null: dvs2-null-pins { 571 pins = "gpio_pwrctrl2"; 572 function = "pin_fun0"; 573 }; 574 575 rk806_dvs3_null: dvs3-null-pins { 576 pins = "gpio_pwrctrl3"; 577 function = "pin_fun0"; 578 }; 579 580 regulators { 581 vdd_gpu_s0: dcdc-reg1 { 582 regulator-boot-on; 583 regulator-min-microvolt = <550000>; 584 regulator-max-microvolt = <950000>; 585 regulator-ramp-delay = <12500>; 586 regulator-name = "vdd_gpu_s0"; 587 regulator-enable-ramp-delay = <400>; 588 589 regulator-state-mem { 590 regulator-off-in-suspend; 591 }; 592 }; 593 594 vdd_cpu_lit_s0: dcdc-reg2 { 595 regulator-name = "vdd_cpu_lit_s0"; 596 regulator-always-on; 597 regulator-boot-on; 598 regulator-min-microvolt = <550000>; 599 regulator-max-microvolt = <950000>; 600 regulator-ramp-delay = <12500>; 601 602 regulator-state-mem { 603 regulator-off-in-suspend; 604 }; 605 }; 606 607 vdd_log_s0: dcdc-reg3 { 608 regulator-name = "vdd_log_s0"; 609 regulator-always-on; 610 regulator-boot-on; 611 regulator-min-microvolt = <675000>; 612 regulator-max-microvolt = <750000>; 613 regulator-ramp-delay = <12500>; 614 615 regulator-state-mem { 616 regulator-off-in-suspend; 617 regulator-suspend-microvolt = <750000>; 618 }; 619 }; 620 621 vdd_vdenc_s0: dcdc-reg4 { 622 regulator-name = "vdd_vdenc_s0"; 623 regulator-always-on; 624 regulator-boot-on; 625 regulator-min-microvolt = <550000>; 626 regulator-max-microvolt = <950000>; 627 regulator-ramp-delay = <12500>; 628 629 regulator-state-mem { 630 regulator-off-in-suspend; 631 }; 632 }; 633 634 vdd_ddr_s0: dcdc-reg5 { 635 regulator-name = "vdd_ddr_s0"; 636 regulator-always-on; 637 regulator-boot-on; 638 regulator-min-microvolt = <675000>; 639 regulator-max-microvolt = <900000>; 640 regulator-ramp-delay = <12500>; 641 642 regulator-state-mem { 643 regulator-off-in-suspend; 644 regulator-suspend-microvolt = <850000>; 645 }; 646 }; 647 648 vdd2_ddr_s3: dcdc-reg6 { 649 regulator-name = "vdd2_ddr_s3"; 650 regulator-always-on; 651 regulator-boot-on; 652 653 regulator-state-mem { 654 regulator-on-in-suspend; 655 }; 656 }; 657 658 vcc_2v0_pldo_s3: dcdc-reg7 { 659 regulator-name = "vdd_2v0_pldo_s3"; 660 regulator-always-on; 661 regulator-boot-on; 662 regulator-min-microvolt = <2000000>; 663 regulator-max-microvolt = <2000000>; 664 regulator-ramp-delay = <12500>; 665 666 regulator-state-mem { 667 regulator-on-in-suspend; 668 regulator-suspend-microvolt = <2000000>; 669 }; 670 }; 671 672 vcc_3v3_s3: dcdc-reg8 { 673 regulator-name = "vcc_3v3_s3"; 674 regulator-always-on; 675 regulator-boot-on; 676 regulator-min-microvolt = <3300000>; 677 regulator-max-microvolt = <3300000>; 678 679 regulator-state-mem { 680 regulator-on-in-suspend; 681 regulator-suspend-microvolt = <3300000>; 682 }; 683 }; 684 685 vddq_ddr_s0: dcdc-reg9 { 686 regulator-name = "vddq_ddr_s0"; 687 regulator-always-on; 688 regulator-boot-on; 689 690 regulator-state-mem { 691 regulator-off-in-suspend; 692 }; 693 }; 694 695 vcc_1v8_s3: dcdc-reg10 { 696 regulator-name = "vcc_1v8_s3"; 697 regulator-always-on; 698 regulator-boot-on; 699 regulator-min-microvolt = <1800000>; 700 regulator-max-microvolt = <1800000>; 701 702 regulator-state-mem { 703 regulator-on-in-suspend; 704 regulator-suspend-microvolt = <1800000>; 705 }; 706 }; 707 708 vcca_1v8_s0: pldo-reg1 { 709 regulator-name = "vcca_1v8_s0"; 710 regulator-always-on; 711 regulator-boot-on; 712 regulator-min-microvolt = <1800000>; 713 regulator-max-microvolt = <1800000>; 714 715 regulator-state-mem { 716 regulator-off-in-suspend; 717 }; 718 }; 719 720 vcc_1v8_s0: pldo-reg2 { 721 regulator-name = "vcc_1v8_s0"; 722 regulator-always-on; 723 regulator-boot-on; 724 regulator-min-microvolt = <1800000>; 725 regulator-max-microvolt = <1800000>; 726 727 regulator-state-mem { 728 regulator-off-in-suspend; 729 regulator-suspend-microvolt = <1800000>; 730 }; 731 }; 732 733 vdda_1v2_s0: pldo-reg3 { 734 regulator-name = "vdda_1v2_s0"; 735 regulator-always-on; 736 regulator-boot-on; 737 regulator-min-microvolt = <1200000>; 738 regulator-max-microvolt = <1200000>; 739 740 regulator-state-mem { 741 regulator-off-in-suspend; 742 }; 743 }; 744 745 vcca_3v3_s0: pldo-reg4 { 746 regulator-name = "vcca_3v3_s0"; 747 regulator-always-on; 748 regulator-boot-on; 749 regulator-min-microvolt = <3300000>; 750 regulator-max-microvolt = <3300000>; 751 regulator-ramp-delay = <12500>; 752 753 regulator-state-mem { 754 regulator-off-in-suspend; 755 }; 756 }; 757 758 vccio_sd_s0: pldo-reg5 { 759 regulator-name = "vccio_sd_s0"; 760 regulator-always-on; 761 regulator-boot-on; 762 regulator-min-microvolt = <1800000>; 763 regulator-max-microvolt = <3300000>; 764 regulator-ramp-delay = <12500>; 765 766 regulator-state-mem { 767 regulator-off-in-suspend; 768 }; 769 }; 770 771 pldo6_s3: pldo-reg6 { 772 regulator-name = "pldo6_s3"; 773 regulator-always-on; 774 regulator-boot-on; 775 regulator-min-microvolt = <1800000>; 776 regulator-max-microvolt = <1800000>; 777 778 regulator-state-mem { 779 regulator-on-in-suspend; 780 regulator-suspend-microvolt = <1800000>; 781 }; 782 }; 783 784 vdd_0v75_s3: nldo-reg1 { 785 regulator-name = "vdd_0v75_s3"; 786 regulator-always-on; 787 regulator-boot-on; 788 regulator-min-microvolt = <750000>; 789 regulator-max-microvolt = <750000>; 790 791 regulator-state-mem { 792 regulator-on-in-suspend; 793 regulator-suspend-microvolt = <750000>; 794 }; 795 }; 796 797 vdda_ddr_pll_s0: nldo-reg2 { 798 regulator-name = "vdda_ddr_pll_s0"; 799 regulator-always-on; 800 regulator-boot-on; 801 regulator-min-microvolt = <850000>; 802 regulator-max-microvolt = <850000>; 803 804 regulator-state-mem { 805 regulator-off-in-suspend; 806 regulator-suspend-microvolt = <850000>; 807 }; 808 }; 809 810 vdda_0v75_s0: nldo-reg3 { 811 regulator-name = "vdda_0v75_s0"; 812 regulator-always-on; 813 regulator-boot-on; 814 regulator-min-microvolt = <750000>; 815 regulator-max-microvolt = <750000>; 816 817 regulator-state-mem { 818 regulator-off-in-suspend; 819 }; 820 }; 821 822 vdda_0v85_s0: nldo-reg4 { 823 regulator-name = "vdda_0v85_s0"; 824 regulator-always-on; 825 regulator-boot-on; 826 regulator-min-microvolt = <850000>; 827 regulator-max-microvolt = <850000>; 828 829 regulator-state-mem { 830 regulator-off-in-suspend; 831 }; 832 }; 833 834 vdd_0v75_s0: nldo-reg5 { 835 regulator-name = "vdd_0v75_s0"; 836 regulator-always-on; 837 regulator-boot-on; 838 regulator-min-microvolt = <750000>; 839 regulator-max-microvolt = <750000>; 840 841 regulator-state-mem { 842 regulator-off-in-suspend; 843 }; 844 }; 845 }; 846 }; 847}; 848 849&tsadc { 850 status = "okay"; 851}; 852 853&u2phy2 { 854 status = "okay"; 855}; 856 857&u2phy2_host { 858 phy-supply = <&vcc_5v0_usb_a>; 859 status = "okay"; 860}; 861 862&u2phy3 { 863 status = "okay"; 864}; 865 866&u2phy3_host { 867 status = "okay"; 868}; 869 870/* Mule-ATtiny debug UART; typically baudrate 9600 */ 871&uart0 { 872 pinctrl-0 = <&uart0m0_xfer>; 873 status = "okay"; 874}; 875 876/* Main debug interface on P20 micro-USB B port and P21 header */ 877&uart2 { 878 pinctrl-0 = <&uart2m0_xfer>; 879 status = "okay"; 880}; 881 882/* RS485 on P19 */ 883&uart3 { 884 pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; 885 linux,rs485-enabled-at-boot-time; 886 status = "okay"; 887}; 888 889/* Mule-ATtiny UPDI flashing UART */ 890&uart7 { 891 pinctrl-0 = <&uart7m0_xfer>; 892 status = "okay"; 893}; 894 895/* host0 on P10 USB-A */ 896&usb_host0_ehci { 897 status = "okay"; 898}; 899 900/* host0 on P10 USB-A */ 901&usb_host0_ohci { 902 status = "okay"; 903}; 904 905/* host1 on M.2 E-key */ 906&usb_host1_ehci { 907 status = "okay"; 908}; 909 910/* host1 on M.2 E-key */ 911&usb_host1_ohci { 912 status = "okay"; 913}; 914 915&vop { 916 status = "okay"; 917}; 918 919&vop_mmu { 920 status = "okay"; 921}; 922 923&vp0 { 924 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 925 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 926 remote-endpoint = <&hdmi0_in_vp0>; 927 }; 928}; 929