1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3#include <dt-bindings/gpio/gpio.h> 4#include <dt-bindings/pinctrl/rockchip.h> 5 6#include "rk3588.dtsi" 7 8/ { 9 compatible = "firefly,core-3588j", "rockchip,rk3588"; 10 11 aliases { 12 mmc0 = &sdhci; 13 }; 14}; 15 16&cpu_b0 { 17 cpu-supply = <&vdd_cpu_big0_s0>; 18}; 19 20&cpu_b1 { 21 cpu-supply = <&vdd_cpu_big0_s0>; 22}; 23 24&cpu_b2 { 25 cpu-supply = <&vdd_cpu_big1_s0>; 26}; 27 28&cpu_b3 { 29 cpu-supply = <&vdd_cpu_big1_s0>; 30}; 31 32&cpu_l0 { 33 cpu-supply = <&vdd_cpu_lit_s0>; 34}; 35 36&cpu_l1 { 37 cpu-supply = <&vdd_cpu_lit_s0>; 38}; 39 40&cpu_l2 { 41 cpu-supply = <&vdd_cpu_lit_s0>; 42}; 43 44&cpu_l3 { 45 cpu-supply = <&vdd_cpu_lit_s0>; 46}; 47 48&i2c0 { 49 pinctrl-names = "default"; 50 pinctrl-0 = <&i2c0m2_xfer>; 51 status = "okay"; 52 53 vdd_cpu_big0_s0: regulator@42 { 54 compatible = "rockchip,rk8602"; 55 reg = <0x42>; 56 fcs,suspend-voltage-selector = <1>; 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <550000>; 60 regulator-max-microvolt = <1050000>; 61 regulator-name = "vdd_cpu_big0_s0"; 62 regulator-ramp-delay = <2300>; 63 vin-supply = <&vcc5v0_sys>; 64 65 regulator-state-mem { 66 regulator-off-in-suspend; 67 }; 68 }; 69 70 vdd_cpu_big1_s0: regulator@43 { 71 compatible = "rockchip,rk8603", "rockchip,rk8602"; 72 reg = <0x43>; 73 fcs,suspend-voltage-selector = <1>; 74 regulator-name = "vdd_cpu_big1_s0"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <550000>; 78 regulator-max-microvolt = <1050000>; 79 regulator-ramp-delay = <2300>; 80 vin-supply = <&vcc5v0_sys>; 81 82 regulator-state-mem { 83 regulator-off-in-suspend; 84 }; 85 }; 86}; 87 88&i2c1 { 89 pinctrl-names = "default"; 90 pinctrl-0 = <&i2c1m2_xfer>; 91 status = "okay"; 92 93 vdd_npu_s0: vdd_npu_mem_s0: regulator@42 { 94 compatible = "rockchip,rk8602"; 95 reg = <0x42>; 96 fcs,suspend-voltage-selector = <1>; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <550000>; 100 regulator-max-microvolt = <950000>; 101 regulator-name = "vdd_npu_s0"; 102 regulator-ramp-delay = <2300>; 103 vin-supply = <&vcc5v0_sys>; 104 105 regulator-state-mem { 106 regulator-off-in-suspend; 107 }; 108 }; 109}; 110 111&sdhci { 112 bus-width = <8>; 113 no-sdio; 114 no-sd; 115 non-removable; 116 mmc-hs400-1_8v; 117 mmc-hs400-enhanced-strobe; 118 status = "okay"; 119}; 120 121&spi2 { 122 assigned-clocks = <&cru CLK_SPI2>; 123 assigned-clock-rates = <200000000>; 124 num-cs = <1>; 125 pinctrl-names = "default"; 126 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 127 status = "okay"; 128 129 pmic@0 { 130 compatible = "rockchip,rk806"; 131 reg = <0x0>; 132 interrupt-parent = <&gpio0>; 133 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 134 gpio-controller; 135 #gpio-cells = <2>; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 138 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 139 spi-max-frequency = <1000000>; 140 system-power-controller; 141 142 vcc1-supply = <&vcc5v0_sys>; 143 vcc2-supply = <&vcc5v0_sys>; 144 vcc3-supply = <&vcc5v0_sys>; 145 vcc4-supply = <&vcc5v0_sys>; 146 vcc5-supply = <&vcc5v0_sys>; 147 vcc6-supply = <&vcc5v0_sys>; 148 vcc7-supply = <&vcc5v0_sys>; 149 vcc8-supply = <&vcc5v0_sys>; 150 vcc9-supply = <&vcc5v0_sys>; 151 vcc10-supply = <&vcc5v0_sys>; 152 vcc11-supply = <&vcc_2v0_pldo_s3>; 153 vcc12-supply = <&vcc5v0_sys>; 154 vcc13-supply = <&vcc_1v1_nldo_s3>; 155 vcc14-supply = <&vcc_1v1_nldo_s3>; 156 vcca-supply = <&vcc5v0_sys>; 157 158 rk806_dvs1_null: dvs1-null-pins { 159 pins = "gpio_pwrctrl1"; 160 function = "pin_fun0"; 161 }; 162 163 rk806_dvs2_null: dvs2-null-pins { 164 pins = "gpio_pwrctrl2"; 165 function = "pin_fun0"; 166 }; 167 168 rk806_dvs3_null: dvs3-null-pins { 169 pins = "gpio_pwrctrl3"; 170 function = "pin_fun0"; 171 }; 172 173 regulators { 174 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 175 regulator-boot-on; 176 regulator-min-microvolt = <550000>; 177 regulator-max-microvolt = <950000>; 178 regulator-ramp-delay = <12500>; 179 regulator-name = "vdd_gpu_s0"; 180 regulator-enable-ramp-delay = <400>; 181 182 regulator-state-mem { 183 regulator-off-in-suspend; 184 }; 185 }; 186 187 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 188 regulator-always-on; 189 regulator-boot-on; 190 regulator-min-microvolt = <550000>; 191 regulator-max-microvolt = <950000>; 192 regulator-ramp-delay = <12500>; 193 regulator-name = "vdd_cpu_lit_s0"; 194 195 regulator-state-mem { 196 regulator-off-in-suspend; 197 }; 198 }; 199 200 vdd_log_s0: dcdc-reg3 { 201 regulator-always-on; 202 regulator-boot-on; 203 regulator-min-microvolt = <675000>; 204 regulator-max-microvolt = <750000>; 205 regulator-ramp-delay = <12500>; 206 regulator-name = "vdd_log_s0"; 207 208 regulator-state-mem { 209 regulator-off-in-suspend; 210 regulator-suspend-microvolt = <750000>; 211 }; 212 }; 213 214 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 215 regulator-always-on; 216 regulator-boot-on; 217 regulator-min-microvolt = <550000>; 218 regulator-max-microvolt = <950000>; 219 regulator-ramp-delay = <12500>; 220 regulator-name = "vdd_vdenc_s0"; 221 222 regulator-state-mem { 223 regulator-off-in-suspend; 224 }; 225 }; 226 227 vdd_ddr_s0: dcdc-reg5 { 228 regulator-always-on; 229 regulator-boot-on; 230 regulator-min-microvolt = <675000>; 231 regulator-max-microvolt = <900000>; 232 regulator-ramp-delay = <12500>; 233 regulator-name = "vdd_ddr_s0"; 234 235 regulator-state-mem { 236 regulator-off-in-suspend; 237 regulator-suspend-microvolt = <850000>; 238 }; 239 }; 240 241 vdd2_ddr_s3: dcdc-reg6 { 242 regulator-always-on; 243 regulator-boot-on; 244 regulator-name = "vdd2_ddr_s3"; 245 246 regulator-state-mem { 247 regulator-on-in-suspend; 248 }; 249 }; 250 251 vcc_2v0_pldo_s3: dcdc-reg7 { 252 regulator-always-on; 253 regulator-boot-on; 254 regulator-min-microvolt = <2000000>; 255 regulator-max-microvolt = <2000000>; 256 regulator-name = "vdd_2v0_pldo_s3"; 257 258 regulator-state-mem { 259 regulator-on-in-suspend; 260 regulator-suspend-microvolt = <2000000>; 261 }; 262 }; 263 264 vcc_3v3_s3: dcdc-reg8 { 265 regulator-always-on; 266 regulator-boot-on; 267 regulator-min-microvolt = <3300000>; 268 regulator-max-microvolt = <3300000>; 269 regulator-name = "vcc_3v3_s3"; 270 271 regulator-state-mem { 272 regulator-on-in-suspend; 273 regulator-suspend-microvolt = <3300000>; 274 }; 275 }; 276 277 vddq_ddr_s0: dcdc-reg9 { 278 regulator-always-on; 279 regulator-boot-on; 280 regulator-name = "vddq_ddr_s0"; 281 282 regulator-state-mem { 283 regulator-off-in-suspend; 284 }; 285 }; 286 287 vcc_1v8_s3: dcdc-reg10 { 288 regulator-always-on; 289 regulator-boot-on; 290 regulator-min-microvolt = <1800000>; 291 regulator-max-microvolt = <1800000>; 292 regulator-name = "vcc_1v8_s3"; 293 294 regulator-state-mem { 295 regulator-on-in-suspend; 296 regulator-suspend-microvolt = <1800000>; 297 }; 298 }; 299 300 avcc_1v8_s0: pldo-reg1 { 301 regulator-always-on; 302 regulator-boot-on; 303 regulator-min-microvolt = <1800000>; 304 regulator-max-microvolt = <1800000>; 305 regulator-name = "avcc_1v8_s0"; 306 307 regulator-state-mem { 308 regulator-off-in-suspend; 309 }; 310 }; 311 312 vcc_1v8_s0: pldo-reg2 { 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-min-microvolt = <1800000>; 316 regulator-max-microvolt = <1800000>; 317 regulator-name = "vcc_1v8_s0"; 318 319 regulator-state-mem { 320 regulator-off-in-suspend; 321 regulator-suspend-microvolt = <1800000>; 322 }; 323 }; 324 325 avdd_1v2_s0: pldo-reg3 { 326 regulator-always-on; 327 regulator-boot-on; 328 regulator-min-microvolt = <1200000>; 329 regulator-max-microvolt = <1200000>; 330 regulator-name = "avdd_1v2_s0"; 331 332 regulator-state-mem { 333 regulator-off-in-suspend; 334 }; 335 }; 336 337 avcc_3v3_s0: pldo-reg4 { 338 regulator-always-on; 339 regulator-boot-on; 340 regulator-min-microvolt = <3300000>; 341 regulator-max-microvolt = <3300000>; 342 regulator-name = "avcc_3v3_s0"; 343 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 349 vccio_sd_s0: pldo-reg5 { 350 regulator-always-on; 351 regulator-boot-on; 352 regulator-min-microvolt = <1800000>; 353 regulator-max-microvolt = <3300000>; 354 regulator-name = "vccio_sd_s0"; 355 356 regulator-state-mem { 357 regulator-off-in-suspend; 358 }; 359 }; 360 361 pldo6_s3: pldo-reg6 { 362 regulator-always-on; 363 regulator-boot-on; 364 regulator-min-microvolt = <1800000>; 365 regulator-max-microvolt = <1800000>; 366 regulator-name = "pldo6_s3"; 367 368 regulator-state-mem { 369 regulator-on-in-suspend; 370 regulator-suspend-microvolt = <1800000>; 371 }; 372 }; 373 374 vdd_0v75_s3: nldo-reg1 { 375 regulator-always-on; 376 regulator-boot-on; 377 regulator-min-microvolt = <750000>; 378 regulator-max-microvolt = <750000>; 379 regulator-name = "vdd_0v75_s3"; 380 381 regulator-state-mem { 382 regulator-on-in-suspend; 383 regulator-suspend-microvolt = <750000>; 384 }; 385 }; 386 387 avdd_ddr_pll_s0: nldo-reg2 { 388 regulator-always-on; 389 regulator-boot-on; 390 regulator-min-microvolt = <850000>; 391 regulator-max-microvolt = <850000>; 392 regulator-name = "avdd_ddr_pll_s0"; 393 394 regulator-state-mem { 395 regulator-off-in-suspend; 396 regulator-suspend-microvolt = <850000>; 397 }; 398 }; 399 400 avdd_0v75_s0: nldo-reg3 { 401 regulator-always-on; 402 regulator-boot-on; 403 regulator-min-microvolt = <750000>; 404 regulator-max-microvolt = <750000>; 405 regulator-name = "avdd_0v75_s0"; 406 407 regulator-state-mem { 408 regulator-off-in-suspend; 409 }; 410 }; 411 412 avdd_0v85_s0: nldo-reg4 { 413 regulator-always-on; 414 regulator-boot-on; 415 regulator-min-microvolt = <850000>; 416 regulator-max-microvolt = <850000>; 417 regulator-name = "avdd_0v85_s0"; 418 419 regulator-state-mem { 420 regulator-off-in-suspend; 421 }; 422 }; 423 424 vdd_0v75_s0: nldo-reg5 { 425 regulator-always-on; 426 regulator-boot-on; 427 regulator-min-microvolt = <750000>; 428 regulator-max-microvolt = <750000>; 429 regulator-name = "vdd_0v75_s0"; 430 431 regulator-state-mem { 432 regulator-off-in-suspend; 433 }; 434 }; 435 }; 436 }; 437}; 438 439/* rk3588 preferred debug out */ 440&uart2 { 441 pinctrl-0 = <&uart2m0_xfer>; 442 status = "okay"; 443}; 444