1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2024 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/pinctrl/rockchip.h> 12#include <dt-bindings/pwm/pwm.h> 13#include <dt-bindings/usb/pd.h> 14#include "rk3576.dtsi" 15 16/ { 17 model = "ArmSoM Sige5"; 18 compatible = "armsom,sige5", "rockchip,rk3576"; 19 20 aliases { 21 ethernet0 = &gmac0; 22 ethernet1 = &gmac1; 23 }; 24 25 chosen { 26 stdout-path = "serial0:1500000n8"; 27 }; 28 29 leds: leds { 30 compatible = "gpio-leds"; 31 32 green_led: green-led { 33 color = <LED_COLOR_ID_GREEN>; 34 function = LED_FUNCTION_HEARTBEAT; 35 gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 36 linux,default-trigger = "heartbeat"; 37 }; 38 39 red_led: red-led { 40 color = <LED_COLOR_ID_RED>; 41 function = LED_FUNCTION_STATUS; 42 gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 43 linux,default-trigger = "default-on"; 44 }; 45 }; 46 47 vcc_12v0_dcin: regulator-vcc-12v0-dcin { 48 compatible = "regulator-fixed"; 49 regulator-name = "vcc_12v0_dcin"; 50 regulator-always-on; 51 regulator-boot-on; 52 regulator-min-microvolt = <12000000>; 53 regulator-max-microvolt = <12000000>; 54 }; 55 56 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 57 compatible = "regulator-fixed"; 58 regulator-name = "vcc_1v1_nldo_s3"; 59 regulator-boot-on; 60 regulator-always-on; 61 regulator-min-microvolt = <1100000>; 62 regulator-max-microvolt = <1100000>; 63 vin-supply = <&vcc_5v0_sys>; 64 }; 65 66 vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 { 67 compatible = "regulator-fixed"; 68 regulator-name = "vcc_1v2_ufs_vccq_s0"; 69 regulator-boot-on; 70 regulator-always-on; 71 regulator-min-microvolt = <1200000>; 72 regulator-max-microvolt = <1200000>; 73 vin-supply = <&vcc_5v0_sys>; 74 }; 75 76 vcc_1v8_s0: regulator-vcc-1v8-s0 { 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc_1v8_s0"; 79 regulator-boot-on; 80 regulator-always-on; 81 regulator-min-microvolt = <1800000>; 82 regulator-max-microvolt = <1800000>; 83 vin-supply = <&vcc_1v8_s3>; 84 }; 85 86 vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 { 87 compatible = "regulator-fixed"; 88 regulator-name = "vcc_1v8_ufs_vccq2_s0"; 89 regulator-boot-on; 90 regulator-always-on; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 vin-supply = <&vcc_1v8_s3>; 94 }; 95 96 vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { 97 compatible = "regulator-fixed"; 98 regulator-name = "vcc_2v0_pldo_s3"; 99 regulator-boot-on; 100 regulator-always-on; 101 regulator-min-microvolt = <2000000>; 102 regulator-max-microvolt = <2000000>; 103 vin-supply = <&vcc_5v0_sys>; 104 }; 105 106 vcc_3v3_pcie: regulator-vcc-3v3-pcie { 107 compatible = "regulator-fixed"; 108 regulator-name = "vcc_3v3_pcie"; 109 regulator-min-microvolt = <3300000>; 110 regulator-max-microvolt = <3300000>; 111 enable-active-high; 112 gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; 113 startup-delay-us = <5000>; 114 vin-supply = <&vcc_5v0_sys>; 115 }; 116 117 vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 { 118 compatible = "regulator-fixed"; 119 regulator-name = "vcc_3v3_rtc_s5"; 120 regulator-boot-on; 121 regulator-always-on; 122 regulator-min-microvolt = <3300000>; 123 regulator-max-microvolt = <3300000>; 124 vin-supply = <&vcc_5v0_sys>; 125 }; 126 127 vcc_3v3_s0: regulator-vcc-3v3-s0 { 128 compatible = "regulator-fixed"; 129 regulator-name = "vcc_3v3_s0"; 130 regulator-boot-on; 131 regulator-always-on; 132 regulator-min-microvolt = <3300000>; 133 regulator-max-microvolt = <3300000>; 134 vin-supply = <&vcc_3v3_s3>; 135 }; 136 137 vcc_5v0_sys: regulator-vcc-5v0-sys { 138 compatible = "regulator-fixed"; 139 regulator-name = "vcc_5v0_sys"; 140 regulator-always-on; 141 regulator-boot-on; 142 regulator-min-microvolt = <5000000>; 143 regulator-max-microvolt = <5000000>; 144 vin-supply = <&vcc_12v0_dcin>; 145 }; 146 147 vcc_5v0_device: regulator-vcc-5v0-device { 148 compatible = "regulator-fixed"; 149 regulator-name = "vcc_5v0_device"; 150 regulator-always-on; 151 regulator-boot-on; 152 regulator-min-microvolt = <5000000>; 153 regulator-max-microvolt = <5000000>; 154 vin-supply = <&vcc_12v0_dcin>; 155 }; 156 157 vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { 158 compatible = "regulator-fixed"; 159 regulator-name = "vcc_3v3_ufs_s0"; 160 regulator-boot-on; 161 regulator-always-on; 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 vin-supply = <&vcc_5v0_sys>; 165 }; 166}; 167 168&cpu_l0 { 169 cpu-supply = <&vdd_cpu_lit_s0>; 170}; 171 172&gmac0 { 173 phy-mode = "rgmii-id"; 174 clock_in_out = "output"; 175 176 snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 177 snps,reset-active-low; 178 snps,reset-delays-us = <0 20000 100000>; 179 180 pinctrl-names = "default"; 181 pinctrl-0 = <ð0m0_miim 182 ð0m0_tx_bus2 183 ð0m0_rx_bus2 184 ð0m0_rgmii_clk 185 ð0m0_rgmii_bus>; 186 187 phy-handle = <&rgmii_phy0>; 188 status = "okay"; 189}; 190 191&gmac1 { 192 phy-mode = "rgmii-id"; 193 clock_in_out = "output"; 194 195 snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; 196 snps,reset-active-low; 197 snps,reset-delays-us = <0 20000 100000>; 198 199 pinctrl-names = "default"; 200 pinctrl-0 = <ð1m0_miim 201 ð1m0_tx_bus2 202 ð1m0_rx_bus2 203 ð1m0_rgmii_clk 204 ð1m0_rgmii_bus 205 ðm0_clk1_25m_out>; 206 207 phy-handle = <&rgmii_phy1>; 208 status = "okay"; 209}; 210 211&gpu { 212 mali-supply = <&vdd_gpu_s0>; 213 status = "okay"; 214}; 215 216&i2c1 { 217 status = "okay"; 218 219 pmic@23 { 220 compatible = "rockchip,rk806"; 221 reg = <0x23>; 222 223 interrupt-parent = <&gpio0>; 224 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 225 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 228 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 229 230 system-power-controller; 231 232 vcc1-supply = <&vcc_5v0_sys>; 233 vcc2-supply = <&vcc_5v0_sys>; 234 vcc3-supply = <&vcc_5v0_sys>; 235 vcc4-supply = <&vcc_5v0_sys>; 236 vcc5-supply = <&vcc_5v0_sys>; 237 vcc6-supply = <&vcc_5v0_sys>; 238 vcc7-supply = <&vcc_5v0_sys>; 239 vcc8-supply = <&vcc_5v0_sys>; 240 vcc9-supply = <&vcc_5v0_sys>; 241 vcc10-supply = <&vcc_5v0_sys>; 242 vcc11-supply = <&vcc_2v0_pldo_s3>; 243 vcc12-supply = <&vcc_5v0_sys>; 244 vcc13-supply = <&vcc_1v1_nldo_s3>; 245 vcc14-supply = <&vcc_1v1_nldo_s3>; 246 vcca-supply = <&vcc_5v0_sys>; 247 248 gpio-controller; 249 #gpio-cells = <2>; 250 251 rk806_dvs1_null: dvs1-null-pins { 252 pins = "gpio_pwrctrl1"; 253 function = "pin_fun0"; 254 }; 255 256 rk806_dvs2_null: dvs2-null-pins { 257 pins = "gpio_pwrctrl2"; 258 function = "pin_fun0"; 259 }; 260 261 rk806_dvs3_null: dvs3-null-pins { 262 pins = "gpio_pwrctrl3"; 263 function = "pin_fun0"; 264 }; 265 266 rk806_dvs1_slp: dvs1-slp-pins { 267 pins = "gpio_pwrctrl1"; 268 function = "pin_fun1"; 269 }; 270 271 rk806_dvs1_pwrdn: dvs1-pwrdn-pins { 272 pins = "gpio_pwrctrl1"; 273 function = "pin_fun2"; 274 }; 275 276 rk806_dvs1_rst: dvs1-rst-pins { 277 pins = "gpio_pwrctrl1"; 278 function = "pin_fun3"; 279 }; 280 281 rk806_dvs2_slp: dvs2-slp-pins { 282 pins = "gpio_pwrctrl2"; 283 function = "pin_fun1"; 284 }; 285 286 rk806_dvs2_pwrdn: dvs2-pwrdn-pins { 287 pins = "gpio_pwrctrl2"; 288 function = "pin_fun2"; 289 }; 290 291 rk806_dvs2_rst: dvs2-rst-pins { 292 pins = "gpio_pwrctrl2"; 293 function = "pin_fun3"; 294 }; 295 296 rk806_dvs2_dvs: dvs2-dvs-pins { 297 pins = "gpio_pwrctrl2"; 298 function = "pin_fun4"; 299 }; 300 301 rk806_dvs2_gpio: dvs2-gpio-pins { 302 pins = "gpio_pwrctrl2"; 303 function = "pin_fun5"; 304 }; 305 306 rk806_dvs3_slp: dvs3-slp-pins { 307 pins = "gpio_pwrctrl3"; 308 function = "pin_fun1"; 309 }; 310 311 rk806_dvs3_pwrdn: dvs3-pwrdn-pins { 312 pins = "gpio_pwrctrl3"; 313 function = "pin_fun2"; 314 }; 315 316 rk806_dvs3_rst: dvs3-rst-pins { 317 pins = "gpio_pwrctrl3"; 318 function = "pin_fun3"; 319 }; 320 321 rk806_dvs3_dvs: dvs3-dvs-pins { 322 pins = "gpio_pwrctrl3"; 323 function = "pin_fun4"; 324 }; 325 326 rk806_dvs3_gpio: dvs3-gpio-pins { 327 pins = "gpio_pwrctrl3"; 328 function = "pin_fun5"; 329 }; 330 331 regulators { 332 vdd_cpu_big_s0: dcdc-reg1 { 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-min-microvolt = <550000>; 336 regulator-max-microvolt = <950000>; 337 regulator-ramp-delay = <12500>; 338 regulator-name = "vdd_cpu_big_s0"; 339 regulator-enable-ramp-delay = <400>; 340 regulator-state-mem { 341 regulator-off-in-suspend; 342 }; 343 }; 344 345 vdd_npu_s0: dcdc-reg2 { 346 regulator-boot-on; 347 regulator-min-microvolt = <550000>; 348 regulator-max-microvolt = <950000>; 349 regulator-ramp-delay = <12500>; 350 regulator-name = "vdd_npu_s0"; 351 regulator-enable-ramp-delay = <400>; 352 regulator-state-mem { 353 regulator-off-in-suspend; 354 }; 355 }; 356 357 vdd_cpu_lit_s0: dcdc-reg3 { 358 regulator-always-on; 359 regulator-boot-on; 360 regulator-min-microvolt = <550000>; 361 regulator-max-microvolt = <950000>; 362 regulator-ramp-delay = <12500>; 363 regulator-name = "vdd_cpu_lit_s0"; 364 regulator-state-mem { 365 regulator-off-in-suspend; 366 regulator-suspend-microvolt = <750000>; 367 }; 368 }; 369 370 vcc_3v3_s3: dcdc-reg4 { 371 regulator-always-on; 372 regulator-boot-on; 373 regulator-min-microvolt = <3300000>; 374 regulator-max-microvolt = <3300000>; 375 regulator-name = "vcc_3v3_s3"; 376 regulator-state-mem { 377 regulator-on-in-suspend; 378 regulator-suspend-microvolt = <3300000>; 379 }; 380 }; 381 382 vdd_gpu_s0: dcdc-reg5 { 383 regulator-boot-on; 384 regulator-min-microvolt = <550000>; 385 regulator-max-microvolt = <900000>; 386 regulator-ramp-delay = <12500>; 387 regulator-name = "vdd_gpu_s0"; 388 regulator-enable-ramp-delay = <400>; 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 regulator-suspend-microvolt = <850000>; 392 }; 393 }; 394 395 vddq_ddr_s0: dcdc-reg6 { 396 regulator-always-on; 397 regulator-boot-on; 398 regulator-name = "vddq_ddr_s0"; 399 regulator-state-mem { 400 regulator-off-in-suspend; 401 }; 402 }; 403 404 vdd_logic_s0: dcdc-reg7 { 405 regulator-always-on; 406 regulator-boot-on; 407 regulator-min-microvolt = <550000>; 408 regulator-max-microvolt = <800000>; 409 regulator-name = "vdd_logic_s0"; 410 regulator-state-mem { 411 regulator-off-in-suspend; 412 }; 413 }; 414 415 vcc_1v8_s3: dcdc-reg8 { 416 regulator-always-on; 417 regulator-boot-on; 418 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <1800000>; 420 regulator-name = "vcc_1v8_s3"; 421 regulator-state-mem { 422 regulator-on-in-suspend; 423 regulator-suspend-microvolt = <1800000>; 424 }; 425 }; 426 427 vdd2_ddr_s3: dcdc-reg9 { 428 regulator-always-on; 429 regulator-boot-on; 430 regulator-name = "vdd2_ddr_s3"; 431 regulator-state-mem { 432 regulator-on-in-suspend; 433 }; 434 }; 435 436 vdd_ddr_s0: dcdc-reg10 { 437 regulator-always-on; 438 regulator-boot-on; 439 regulator-min-microvolt = <550000>; 440 regulator-max-microvolt = <1200000>; 441 regulator-name = "vdd_ddr_s0"; 442 regulator-state-mem { 443 regulator-off-in-suspend; 444 }; 445 }; 446 447 vcca_1v8_s0: pldo-reg1 { 448 regulator-always-on; 449 regulator-boot-on; 450 regulator-min-microvolt = <1800000>; 451 regulator-max-microvolt = <1800000>; 452 regulator-name = "vcca_1v8_s0"; 453 regulator-state-mem { 454 regulator-off-in-suspend; 455 }; 456 }; 457 458 vcca1v8_pldo2_s0: pldo-reg2 { 459 regulator-always-on; 460 regulator-boot-on; 461 regulator-min-microvolt = <1800000>; 462 regulator-max-microvolt = <1800000>; 463 regulator-name = "vcca1v8_pldo2_s0"; 464 regulator-state-mem { 465 regulator-off-in-suspend; 466 }; 467 }; 468 469 vdda_1v2_s0: pldo-reg3 { 470 regulator-always-on; 471 regulator-boot-on; 472 regulator-min-microvolt = <1200000>; 473 regulator-max-microvolt = <1200000>; 474 regulator-name = "vdda_1v2_s0"; 475 regulator-state-mem { 476 regulator-off-in-suspend; 477 }; 478 }; 479 480 vcca_3v3_s0: pldo-reg4 { 481 regulator-always-on; 482 regulator-boot-on; 483 regulator-min-microvolt = <3300000>; 484 regulator-max-microvolt = <3300000>; 485 regulator-name = "vcca_3v3_s0"; 486 regulator-state-mem { 487 regulator-off-in-suspend; 488 }; 489 }; 490 491 vccio_sd_s0: pldo-reg5 { 492 regulator-always-on; 493 regulator-boot-on; 494 regulator-min-microvolt = <1800000>; 495 regulator-max-microvolt = <3300000>; 496 regulator-name = "vccio_sd_s0"; 497 regulator-state-mem { 498 regulator-off-in-suspend; 499 }; 500 }; 501 502 vcca1v8_pldo6_s3: pldo-reg6 { 503 regulator-always-on; 504 regulator-boot-on; 505 regulator-min-microvolt = <1800000>; 506 regulator-max-microvolt = <1800000>; 507 regulator-name = "vcca1v8_pldo6_s3"; 508 regulator-state-mem { 509 regulator-on-in-suspend; 510 regulator-suspend-microvolt = <1800000>; 511 }; 512 }; 513 514 vdd_0v75_s3: nldo-reg1 { 515 regulator-always-on; 516 regulator-boot-on; 517 regulator-min-microvolt = <750000>; 518 regulator-max-microvolt = <750000>; 519 regulator-name = "vdd_0v75_s3"; 520 regulator-state-mem { 521 regulator-on-in-suspend; 522 regulator-suspend-microvolt = <750000>; 523 }; 524 }; 525 526 vdda_ddr_pll_s0: nldo-reg2 { 527 regulator-always-on; 528 regulator-boot-on; 529 regulator-min-microvolt = <850000>; 530 regulator-max-microvolt = <850000>; 531 regulator-name = "vdda_ddr_pll_s0"; 532 regulator-state-mem { 533 regulator-off-in-suspend; 534 }; 535 }; 536 537 vdda0v75_hdmi_s0: nldo-reg3 { 538 regulator-always-on; 539 regulator-boot-on; 540 regulator-min-microvolt = <837500>; 541 regulator-max-microvolt = <837500>; 542 regulator-name = "vdda0v75_hdmi_s0"; 543 regulator-state-mem { 544 regulator-off-in-suspend; 545 }; 546 }; 547 548 vdda_0v85_s0: nldo-reg4 { 549 regulator-always-on; 550 regulator-boot-on; 551 regulator-min-microvolt = <850000>; 552 regulator-max-microvolt = <850000>; 553 regulator-name = "vdda_0v85_s0"; 554 regulator-state-mem { 555 regulator-off-in-suspend; 556 }; 557 }; 558 559 vdda_0v75_s0: nldo-reg5 { 560 regulator-always-on; 561 regulator-boot-on; 562 regulator-min-microvolt = <750000>; 563 regulator-max-microvolt = <750000>; 564 regulator-name = "vdda_0v75_s0"; 565 regulator-state-mem { 566 regulator-off-in-suspend; 567 }; 568 }; 569 }; 570 }; 571}; 572 573&i2c2 { 574 status = "okay"; 575 576 hym8563: rtc@51 { 577 compatible = "haoyu,hym8563"; 578 reg = <0x51>; 579 clock-output-names = "hym8563"; 580 interrupt-parent = <&gpio0>; 581 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 582 pinctrl-names = "default"; 583 pinctrl-0 = <&hym8563_int>; 584 wakeup-source; 585 #clock-cells = <0>; 586 }; 587}; 588 589&mdio0 { 590 rgmii_phy0: phy@1 { 591 compatible = "ethernet-phy-ieee802.3-c22"; 592 reg = <0x1>; 593 clocks = <&cru REFCLKO25M_GMAC0_OUT>; 594 }; 595}; 596 597&mdio1 { 598 rgmii_phy1: phy@1 { 599 compatible = "ethernet-phy-ieee802.3-c22"; 600 reg = <0x1>; 601 clocks = <&cru REFCLKO25M_GMAC1_OUT>; 602 }; 603}; 604 605&pinctrl { 606 headphone { 607 hp_det: hp-det { 608 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 609 }; 610 }; 611 612 hym8563 { 613 hym8563_int: hym8563-int { 614 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 615 }; 616 }; 617 618 leds { 619 led_rgb_r: led-red-en { 620 rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 621 }; 622 led_rgb_g: led-green-en { 623 rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 624 }; 625 }; 626}; 627 628&sdhci { 629 bus-width = <8>; 630 full-pwr-cycle-in-suspend; 631 max-frequency = <200000000>; 632 mmc-hs400-1_8v; 633 mmc-hs400-enhanced-strobe; 634 no-sdio; 635 no-sd; 636 non-removable; 637 status = "okay"; 638}; 639 640&sdmmc { 641 bus-width = <4>; 642 cap-mmc-highspeed; 643 cap-sd-highspeed; 644 disable-wp; 645 max-frequency = <200000000>; 646 no-sdio; 647 no-mmc; 648 sd-uhs-sdr104; 649 vmmc-supply = <&vcc_3v3_s3>; 650 vqmmc-supply = <&vccio_sd_s0>; 651 status = "okay"; 652}; 653 654&uart0 { 655 pinctrl-0 = <&uart0m0_xfer>; 656 status = "okay"; 657}; 658