1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/leds/common.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/pwm/pwm.h>
8#include "rk3568.dtsi"
9
10/ {
11	model = "Protonic MECSBC";
12	compatible = "prt,mecsbc", "rockchip,rk3568";
13
14	aliases {
15		mmc0 = &sdhci;
16		mmc1 = &sdmmc0;
17	};
18
19	chosen: chosen {
20		stdout-path = "serial2:1500000n8";
21	};
22
23	tas2562-sound {
24		compatible = "simple-audio-card";
25		simple-audio-card,format = "i2s";
26		simple-audio-card,name = "Speaker";
27		simple-audio-card,mclk-fs = <256>;
28
29		simple-audio-card,cpu {
30			sound-dai = <&i2s1_8ch>;
31		};
32
33		simple-audio-card,codec {
34			sound-dai = <&tas2562>;
35		};
36	};
37
38	vdd_gpu: regulator-vdd-gpu {
39		compatible = "pwm-regulator";
40		pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
41		regulator-name = "vdd_gpu";
42		regulator-min-microvolt = <915000>;
43		regulator-max-microvolt = <1000000>;
44		regulator-always-on;
45		regulator-boot-on;
46		regulator-settling-time-up-us = <250>;
47		pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
48	};
49
50	p3v3: regulator-p3v3 {
51		compatible = "regulator-fixed";
52		regulator-name = "p3v3";
53		regulator-always-on;
54		regulator-boot-on;
55		regulator-min-microvolt = <3300000>;
56		regulator-max-microvolt = <3300000>;
57	};
58
59	p1v8: regulator-p1v8 {
60		compatible = "regulator-fixed";
61		regulator-name = "p1v8";
62		regulator-always-on;
63		regulator-boot-on;
64		regulator-min-microvolt = <1800000>;
65		regulator-max-microvolt = <1800000>;
66	};
67
68	vcc_sd: regulator-sd {
69		compatible = "regulator-gpio";
70		enable-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
71		enable-active-high;
72		gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
73		regulator-name = "sdcard-gpio-supply";
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <3300000>;
76		states = <1800000 0x1>, <3300000 0x0>;
77	};
78
79	vdd_npu: regulator-vdd-npu {
80		compatible = "pwm-regulator";
81		pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
82		regulator-name = "vdd_npu";
83		regulator-min-microvolt = <915000>;
84		regulator-max-microvolt = <1000000>;
85		regulator-always-on;
86		regulator-boot-on;
87		regulator-settling-time-up-us = <250>;
88		pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
89	};
90};
91
92&can0 {
93	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
94	pinctrl-names = "default";
95	pinctrl-0 = <&can0m0_pins>;
96	status = "okay";
97};
98
99&can1 {
100	compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
101	pinctrl-names = "default";
102	pinctrl-0 = <&can1m1_pins>;
103	status = "okay";
104};
105
106&combphy0 {
107	status = "okay";
108};
109
110&combphy1 {
111	status = "okay";
112};
113
114&combphy2 {
115	status = "okay";
116};
117
118&cpu0 {
119	cpu-supply = <&vdd_cpu>;
120};
121
122&cpu1 {
123	cpu-supply = <&vdd_cpu>;
124};
125
126&cpu2 {
127	cpu-supply = <&vdd_cpu>;
128};
129
130&cpu3 {
131	cpu-supply = <&vdd_cpu>;
132};
133
134&gmac1 {
135	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
136	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
137	phy-handle = <&rgmii_phy1>;
138	phy-mode = "rgmii-id";
139	clock_in_out = "output";
140	pinctrl-names = "default";
141	pinctrl-0 = <&gmac1m1_miim
142		     &gmac1m1_tx_bus2
143		     &gmac1m1_rx_bus2
144		     &gmac1m1_rgmii_clk
145		     &gmac1m1_clkinout
146		     &gmac1m1_rgmii_bus>;
147	status = "okay";
148};
149
150&gpu {
151	mali-supply = <&vdd_gpu>;
152	status = "okay";
153};
154
155&gpu_opp_table {
156	compatible = "operating-points-v2";
157
158	opp-200000000 {
159		opp-hz = /bits/ 64 <200000000>;
160		opp-microvolt = <915000>;
161	};
162
163	opp-300000000 {
164		opp-hz = /bits/ 64 <300000000>;
165		opp-microvolt = <915000>;
166	};
167
168	opp-400000000 {
169		opp-hz = /bits/ 64 <400000000>;
170		opp-microvolt = <915000>;
171	};
172
173	opp-600000000 {
174		opp-hz = /bits/ 64 <600000000>;
175		opp-microvolt = <920000>;
176	};
177
178	opp-700000000 {
179		opp-hz = /bits/ 64 <700000000>;
180		opp-microvolt = <950000>;
181	};
182
183	opp-800000000 {
184		opp-hz = /bits/ 64 <800000000>;
185		opp-microvolt = <1000000>;
186	};
187};
188
189&i2c0 {
190	status = "okay";
191
192	vdd_cpu: regulator@60 {
193		compatible = "fcs,fan53555";
194		reg = <0x60>;
195		fcs,suspend-voltage-selector = <1>;
196		regulator-name = "vdd_cpu";
197		regulator-always-on;
198		regulator-boot-on;
199		regulator-min-microvolt = <800000>;
200		regulator-max-microvolt = <1150000>;
201		regulator-ramp-delay = <2300>;
202
203		regulator-state-mem {
204			regulator-off-in-suspend;
205		};
206	};
207};
208
209&i2c3 {
210	pinctrl-names = "default";
211	pinctrl-0 = <&i2c3m0_xfer>;
212	status = "okay";
213
214	tas2562: amplifier@4c {
215		compatible = "ti,tas2562";
216		reg = <0x4c>;
217		#sound-dai-cells = <0>;
218		shutdown-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
219		interrupt-parent = <&gpio1>;
220		pinctrl-names = "default";
221		pinctrl-0 = <&pinctrl_tas2562>;
222		interrupts = <RK_PD1 IRQ_TYPE_LEVEL_LOW>;
223		ti,imon-slot-no = <0>;
224	};
225};
226
227&i2c5 {
228	status = "okay";
229
230	temperature-sensor@48 {
231		compatible = "ti,tmp1075";
232		reg = <0x48>;
233	};
234
235	rtc@51 {
236		compatible = "nxp,pcf85363";
237		reg = <0x51>;
238		#clock-cells = <0>;
239		clock-output-names = "rtcic_32kout";
240	};
241};
242
243&i2s1_8ch {
244	pinctrl-names = "default";
245	pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
246	rockchip,trcm-sync-tx-only;
247	status = "okay";
248};
249
250&mdio1 {
251	rgmii_phy1: ethernet-phy@2 {
252		compatible = "ethernet-phy-ieee802.3-c22";
253		reg = <0x2>;
254		pinctrl-names = "default";
255		pinctrl-0 = <&eth_phy1_rst>;
256		reset-assert-us = <20000>;
257		reset-deassert-us = <100000>;
258		reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
259	};
260};
261
262&pcie2x1 {
263	pinctrl-names = "default";
264	pinctrl-0 = <&pcie20m1_pins>;
265	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
266	status = "okay";
267};
268
269&pcie30phy {
270	status = "okay";
271};
272
273&pcie3x2 {
274	pinctrl-names = "default";
275	pinctrl-0 = <&pcie30x2m1_pins>;
276	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
277	vpcie3v3-supply = <&p3v3>;
278	status = "okay";
279};
280
281&pinctrl {
282	ethernet {
283		eth_phy1_rst: eth-phy1-rst {
284			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
285		};
286	};
287
288	tas2562 {
289		pinctrl_tas2562: tas2562 {
290			rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
291		};
292	};
293};
294
295&pmu_io_domains {
296	pmuio1-supply = <&p3v3>;
297	pmuio2-supply = <&p3v3>;
298	vccio1-supply = <&p1v8>;
299	vccio2-supply = <&p1v8>;
300	vccio3-supply = <&vcc_sd>;
301	vccio4-supply = <&p1v8>;
302	vccio5-supply = <&p3v3>;
303	vccio6-supply = <&p1v8>;
304	vccio7-supply = <&p3v3>;
305	status = "okay";
306};
307
308&pwm1 {
309	status = "okay";
310	pinctrl-names = "default";
311	pinctrl-0 = <&pwm1m0_pins>;
312};
313
314&pwm2 {
315	status = "okay";
316	pinctrl-names = "default";
317	pinctrl-0 = <&pwm2m0_pins>;
318};
319
320&saradc {
321	vref-supply = <&p1v8>;
322	status = "okay";
323};
324
325&sdhci {
326	bus-width = <8>;
327	max-frequency = <200000000>;
328	non-removable;
329	pinctrl-names = "default";
330	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
331	vmmc-supply = <&p3v3>;
332	vqmmc-supply = <&p1v8>;
333	mmc-hs200-1_8v;
334	non-removable;
335	no-sd;
336	no-sdio;
337	status = "okay";
338};
339
340&sdmmc0 {
341	bus-width = <4>;
342	cap-sd-highspeed;
343	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
344	disable-wp;
345	pinctrl-names = "default";
346	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
347	sd-uhs-sdr50;
348	sd-uhs-sdr104;
349	vmmc-supply = <&p3v3>;
350	vqmmc-supply = <&vcc_sd>;
351	status = "okay";
352};
353
354&spi0 {
355	/* use hardware chipselect on cs0 (cs1 unconnected) */
356	pinctrl-names = "default";
357	pinctrl-0 = <&spi0m0_pins>, <&spi0m0_cs0>;
358	status = "okay";
359
360	fram@0 {
361		compatible = "fujitsu,mb85rs128ty";
362		reg = <0>;
363		spi-max-frequency = <33000000>;
364	};
365};
366
367&tsadc {
368	rockchip,hw-tshut-mode = <1>;
369	rockchip,hw-tshut-polarity = <0>;
370	status = "okay";
371};
372
373&uart2 {
374	status = "okay";
375};
376
377&usb_host0_ehci {
378	status = "okay";
379};
380
381&usb_host0_ohci {
382	status = "okay";
383};
384
385&usb_host0_xhci {
386	dr_mode = "host";
387	extcon = <&usb2phy0>;
388	status = "okay";
389};
390
391&usb_host1_ehci {
392	status = "okay";
393};
394
395&usb_host1_ohci {
396	status = "okay";
397};
398
399&usb_host1_xhci {
400	status = "okay";
401};
402
403&usb2phy0 {
404	status = "okay";
405};
406
407&usb2phy0_host {
408	status = "okay";
409};
410
411&usb2phy0_otg {
412	status = "okay";
413};
414
415&usb2phy1 {
416	status = "okay";
417};
418
419&usb2phy1_host {
420	status = "okay";
421};
422
423&usb2phy1_otg {
424	status = "okay";
425};
426