1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp-table-1 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 51 opp-800000000 { 52 opp-hz = /bits/ 64 <800000000>; 53 opp-microvolt = <1030000>; 54 clock-latency-ns = <300000>; 55 }; 56 opp-1000000000 { 57 opp-hz = /bits/ 64 <1000000000>; 58 opp-microvolt = <1030000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1200000000 { 62 opp-hz = /bits/ 64 <1200000000>; 63 opp-microvolt = <1030000>; 64 clock-latency-ns = <300000>; 65 opp-suspend; 66 }; 67 }; 68 69 cpus { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 a53_0: cpu@0 { 74 compatible = "arm,cortex-a53"; 75 reg = <0>; 76 device_type = "cpu"; 77 #cooling-cells = <2>; 78 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 79 next-level-cache = <&L2_CA53>; 80 enable-method = "psci"; 81 cpu-idle-states = <&CPU_SLEEP_0>; 82 dynamic-power-coefficient = <277>; 83 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 84 operating-points-v2 = <&cluster1_opp>; 85 }; 86 87 a53_1: cpu@1 { 88 compatible = "arm,cortex-a53"; 89 reg = <1>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 92 next-level-cache = <&L2_CA53>; 93 enable-method = "psci"; 94 cpu-idle-states = <&CPU_SLEEP_0>; 95 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 96 operating-points-v2 = <&cluster1_opp>; 97 }; 98 99 L2_CA53: cache-controller-0 { 100 compatible = "cache"; 101 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 102 cache-unified; 103 cache-level = <2>; 104 }; 105 106 idle-states { 107 entry-method = "psci"; 108 109 CPU_SLEEP_0: cpu-sleep-0 { 110 compatible = "arm,idle-state"; 111 arm,psci-suspend-param = <0x0010000>; 112 local-timer-stop; 113 entry-latency-us = <700>; 114 exit-latency-us = <700>; 115 min-residency-us = <5000>; 116 }; 117 }; 118 }; 119 120 extal_clk: extal { 121 compatible = "fixed-clock"; 122 #clock-cells = <0>; 123 /* This value must be overridden by the board */ 124 clock-frequency = <0>; 125 }; 126 127 /* External PCIe clock - can be overridden by the board */ 128 pcie_bus_clk: pcie_bus { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 pmu_a53 { 135 compatible = "arm,cortex-a53-pmu"; 136 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 137 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 138 interrupt-affinity = <&a53_0>, <&a53_1>; 139 }; 140 141 psci { 142 compatible = "arm,psci-1.0", "arm,psci-0.2"; 143 method = "smc"; 144 }; 145 146 /* External SCIF clock - to be overridden by boards that provide it */ 147 scif_clk: scif { 148 compatible = "fixed-clock"; 149 #clock-cells = <0>; 150 clock-frequency = <0>; 151 }; 152 153 soc: soc { 154 compatible = "simple-bus"; 155 interrupt-parent = <&gic>; 156 #address-cells = <2>; 157 #size-cells = <2>; 158 ranges; 159 160 rwdt: watchdog@e6020000 { 161 compatible = "renesas,r8a77990-wdt", 162 "renesas,rcar-gen3-wdt"; 163 reg = <0 0xe6020000 0 0x0c>; 164 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 165 clocks = <&cpg CPG_MOD 402>; 166 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 167 resets = <&cpg 402>; 168 status = "disabled"; 169 }; 170 171 gpio0: gpio@e6050000 { 172 compatible = "renesas,gpio-r8a77990", 173 "renesas,rcar-gen3-gpio"; 174 reg = <0 0xe6050000 0 0x50>; 175 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 176 #gpio-cells = <2>; 177 gpio-controller; 178 gpio-ranges = <&pfc 0 0 18>; 179 #interrupt-cells = <2>; 180 interrupt-controller; 181 clocks = <&cpg CPG_MOD 912>; 182 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 183 resets = <&cpg 912>; 184 }; 185 186 gpio1: gpio@e6051000 { 187 compatible = "renesas,gpio-r8a77990", 188 "renesas,rcar-gen3-gpio"; 189 reg = <0 0xe6051000 0 0x50>; 190 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 191 #gpio-cells = <2>; 192 gpio-controller; 193 gpio-ranges = <&pfc 0 32 23>; 194 #interrupt-cells = <2>; 195 interrupt-controller; 196 clocks = <&cpg CPG_MOD 911>; 197 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 198 resets = <&cpg 911>; 199 }; 200 201 gpio2: gpio@e6052000 { 202 compatible = "renesas,gpio-r8a77990", 203 "renesas,rcar-gen3-gpio"; 204 reg = <0 0xe6052000 0 0x50>; 205 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 206 #gpio-cells = <2>; 207 gpio-controller; 208 gpio-ranges = <&pfc 0 64 26>; 209 #interrupt-cells = <2>; 210 interrupt-controller; 211 clocks = <&cpg CPG_MOD 910>; 212 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 213 resets = <&cpg 910>; 214 }; 215 216 gpio3: gpio@e6053000 { 217 compatible = "renesas,gpio-r8a77990", 218 "renesas,rcar-gen3-gpio"; 219 reg = <0 0xe6053000 0 0x50>; 220 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 221 #gpio-cells = <2>; 222 gpio-controller; 223 gpio-ranges = <&pfc 0 96 16>; 224 #interrupt-cells = <2>; 225 interrupt-controller; 226 clocks = <&cpg CPG_MOD 909>; 227 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 228 resets = <&cpg 909>; 229 }; 230 231 gpio4: gpio@e6054000 { 232 compatible = "renesas,gpio-r8a77990", 233 "renesas,rcar-gen3-gpio"; 234 reg = <0 0xe6054000 0 0x50>; 235 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 236 #gpio-cells = <2>; 237 gpio-controller; 238 gpio-ranges = <&pfc 0 128 11>; 239 #interrupt-cells = <2>; 240 interrupt-controller; 241 clocks = <&cpg CPG_MOD 908>; 242 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 243 resets = <&cpg 908>; 244 }; 245 246 gpio5: gpio@e6055000 { 247 compatible = "renesas,gpio-r8a77990", 248 "renesas,rcar-gen3-gpio"; 249 reg = <0 0xe6055000 0 0x50>; 250 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 251 #gpio-cells = <2>; 252 gpio-controller; 253 gpio-ranges = <&pfc 0 160 20>; 254 #interrupt-cells = <2>; 255 interrupt-controller; 256 clocks = <&cpg CPG_MOD 907>; 257 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 258 resets = <&cpg 907>; 259 }; 260 261 gpio6: gpio@e6055400 { 262 compatible = "renesas,gpio-r8a77990", 263 "renesas,rcar-gen3-gpio"; 264 reg = <0 0xe6055400 0 0x50>; 265 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 266 #gpio-cells = <2>; 267 gpio-controller; 268 gpio-ranges = <&pfc 0 192 18>; 269 #interrupt-cells = <2>; 270 interrupt-controller; 271 clocks = <&cpg CPG_MOD 906>; 272 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 273 resets = <&cpg 906>; 274 }; 275 276 pfc: pinctrl@e6060000 { 277 compatible = "renesas,pfc-r8a77990"; 278 reg = <0 0xe6060000 0 0x508>; 279 }; 280 281 i2c_dvfs: i2c@e60b0000 { 282 #address-cells = <1>; 283 #size-cells = <0>; 284 compatible = "renesas,iic-r8a77990", 285 "renesas,rcar-gen3-iic", 286 "renesas,rmobile-iic"; 287 reg = <0 0xe60b0000 0 0x425>; 288 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 289 clocks = <&cpg CPG_MOD 926>; 290 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 291 resets = <&cpg 926>; 292 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 293 dma-names = "tx", "rx"; 294 status = "disabled"; 295 }; 296 297 cmt0: timer@e60f0000 { 298 compatible = "renesas,r8a77990-cmt0", 299 "renesas,rcar-gen3-cmt0"; 300 reg = <0 0xe60f0000 0 0x1004>; 301 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 302 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 303 clocks = <&cpg CPG_MOD 303>; 304 clock-names = "fck"; 305 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 306 resets = <&cpg 303>; 307 status = "disabled"; 308 }; 309 310 cmt1: timer@e6130000 { 311 compatible = "renesas,r8a77990-cmt1", 312 "renesas,rcar-gen3-cmt1"; 313 reg = <0 0xe6130000 0 0x1004>; 314 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 322 clocks = <&cpg CPG_MOD 302>; 323 clock-names = "fck"; 324 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 325 resets = <&cpg 302>; 326 status = "disabled"; 327 }; 328 329 cmt2: timer@e6140000 { 330 compatible = "renesas,r8a77990-cmt1", 331 "renesas,rcar-gen3-cmt1"; 332 reg = <0 0xe6140000 0 0x1004>; 333 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 337 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 338 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 341 clocks = <&cpg CPG_MOD 301>; 342 clock-names = "fck"; 343 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 344 resets = <&cpg 301>; 345 status = "disabled"; 346 }; 347 348 cmt3: timer@e6148000 { 349 compatible = "renesas,r8a77990-cmt1", 350 "renesas,rcar-gen3-cmt1"; 351 reg = <0 0xe6148000 0 0x1004>; 352 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 360 clocks = <&cpg CPG_MOD 300>; 361 clock-names = "fck"; 362 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 363 resets = <&cpg 300>; 364 status = "disabled"; 365 }; 366 367 cpg: clock-controller@e6150000 { 368 compatible = "renesas,r8a77990-cpg-mssr"; 369 reg = <0 0xe6150000 0 0x1000>; 370 clocks = <&extal_clk>; 371 clock-names = "extal"; 372 #clock-cells = <2>; 373 #power-domain-cells = <0>; 374 #reset-cells = <1>; 375 }; 376 377 rst: reset-controller@e6160000 { 378 compatible = "renesas,r8a77990-rst"; 379 reg = <0 0xe6160000 0 0x0200>; 380 }; 381 382 sysc: system-controller@e6180000 { 383 compatible = "renesas,r8a77990-sysc"; 384 reg = <0 0xe6180000 0 0x0400>; 385 #power-domain-cells = <1>; 386 }; 387 388 thermal: thermal@e6190000 { 389 compatible = "renesas,thermal-r8a77990"; 390 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 391 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 392 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 394 clocks = <&cpg CPG_MOD 522>; 395 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 396 resets = <&cpg 522>; 397 #thermal-sensor-cells = <0>; 398 }; 399 400 intc_ex: interrupt-controller@e61c0000 { 401 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 402 #interrupt-cells = <2>; 403 interrupt-controller; 404 reg = <0 0xe61c0000 0 0x200>; 405 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 407 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 409 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 411 clocks = <&cpg CPG_MOD 407>; 412 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 413 resets = <&cpg 407>; 414 }; 415 416 tmu0: timer@e61e0000 { 417 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 418 reg = <0 0xe61e0000 0 0x30>; 419 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 422 interrupt-names = "tuni0", "tuni1", "tuni2"; 423 clocks = <&cpg CPG_MOD 125>; 424 clock-names = "fck"; 425 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 426 resets = <&cpg 125>; 427 status = "disabled"; 428 }; 429 430 tmu1: timer@e6fc0000 { 431 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 432 reg = <0 0xe6fc0000 0 0x30>; 433 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 437 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 438 clocks = <&cpg CPG_MOD 124>; 439 clock-names = "fck"; 440 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 441 resets = <&cpg 124>; 442 status = "disabled"; 443 }; 444 445 tmu2: timer@e6fd0000 { 446 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 447 reg = <0 0xe6fd0000 0 0x30>; 448 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 449 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 452 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 453 clocks = <&cpg CPG_MOD 123>; 454 clock-names = "fck"; 455 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 456 resets = <&cpg 123>; 457 status = "disabled"; 458 }; 459 460 tmu3: timer@e6fe0000 { 461 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 462 reg = <0 0xe6fe0000 0 0x30>; 463 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 464 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 466 interrupt-names = "tuni0", "tuni1", "tuni2"; 467 clocks = <&cpg CPG_MOD 122>; 468 clock-names = "fck"; 469 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 470 resets = <&cpg 122>; 471 status = "disabled"; 472 }; 473 474 tmu4: timer@ffc00000 { 475 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 476 reg = <0 0xffc00000 0 0x30>; 477 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 480 interrupt-names = "tuni0", "tuni1", "tuni2"; 481 clocks = <&cpg CPG_MOD 121>; 482 clock-names = "fck"; 483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 484 resets = <&cpg 121>; 485 status = "disabled"; 486 }; 487 488 i2c0: i2c@e6500000 { 489 #address-cells = <1>; 490 #size-cells = <0>; 491 compatible = "renesas,i2c-r8a77990", 492 "renesas,rcar-gen3-i2c"; 493 reg = <0 0xe6500000 0 0x40>; 494 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 931>; 496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 497 resets = <&cpg 931>; 498 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 499 <&dmac2 0x91>, <&dmac2 0x90>; 500 dma-names = "tx", "rx", "tx", "rx"; 501 i2c-scl-internal-delay-ns = <110>; 502 status = "disabled"; 503 }; 504 505 i2c1: i2c@e6508000 { 506 #address-cells = <1>; 507 #size-cells = <0>; 508 compatible = "renesas,i2c-r8a77990", 509 "renesas,rcar-gen3-i2c"; 510 reg = <0 0xe6508000 0 0x40>; 511 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&cpg CPG_MOD 930>; 513 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 514 resets = <&cpg 930>; 515 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 516 <&dmac2 0x93>, <&dmac2 0x92>; 517 dma-names = "tx", "rx", "tx", "rx"; 518 i2c-scl-internal-delay-ns = <6>; 519 status = "disabled"; 520 }; 521 522 i2c2: i2c@e6510000 { 523 #address-cells = <1>; 524 #size-cells = <0>; 525 compatible = "renesas,i2c-r8a77990", 526 "renesas,rcar-gen3-i2c"; 527 reg = <0 0xe6510000 0 0x40>; 528 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 529 clocks = <&cpg CPG_MOD 929>; 530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 531 resets = <&cpg 929>; 532 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 533 <&dmac2 0x95>, <&dmac2 0x94>; 534 dma-names = "tx", "rx", "tx", "rx"; 535 i2c-scl-internal-delay-ns = <6>; 536 status = "disabled"; 537 }; 538 539 i2c3: i2c@e66d0000 { 540 #address-cells = <1>; 541 #size-cells = <0>; 542 compatible = "renesas,i2c-r8a77990", 543 "renesas,rcar-gen3-i2c"; 544 reg = <0 0xe66d0000 0 0x40>; 545 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 546 clocks = <&cpg CPG_MOD 928>; 547 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 548 resets = <&cpg 928>; 549 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 550 dma-names = "tx", "rx"; 551 i2c-scl-internal-delay-ns = <110>; 552 status = "disabled"; 553 }; 554 555 i2c4: i2c@e66d8000 { 556 #address-cells = <1>; 557 #size-cells = <0>; 558 compatible = "renesas,i2c-r8a77990", 559 "renesas,rcar-gen3-i2c"; 560 reg = <0 0xe66d8000 0 0x40>; 561 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 927>; 563 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 564 resets = <&cpg 927>; 565 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 566 dma-names = "tx", "rx"; 567 i2c-scl-internal-delay-ns = <6>; 568 status = "disabled"; 569 }; 570 571 i2c5: i2c@e66e0000 { 572 #address-cells = <1>; 573 #size-cells = <0>; 574 compatible = "renesas,i2c-r8a77990", 575 "renesas,rcar-gen3-i2c"; 576 reg = <0 0xe66e0000 0 0x40>; 577 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 919>; 579 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 580 resets = <&cpg 919>; 581 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 582 dma-names = "tx", "rx"; 583 i2c-scl-internal-delay-ns = <6>; 584 status = "disabled"; 585 }; 586 587 i2c6: i2c@e66e8000 { 588 #address-cells = <1>; 589 #size-cells = <0>; 590 compatible = "renesas,i2c-r8a77990", 591 "renesas,rcar-gen3-i2c"; 592 reg = <0 0xe66e8000 0 0x40>; 593 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 918>; 595 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 596 resets = <&cpg 918>; 597 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 598 dma-names = "tx", "rx"; 599 i2c-scl-internal-delay-ns = <6>; 600 status = "disabled"; 601 }; 602 603 i2c7: i2c@e6690000 { 604 #address-cells = <1>; 605 #size-cells = <0>; 606 compatible = "renesas,i2c-r8a77990", 607 "renesas,rcar-gen3-i2c"; 608 reg = <0 0xe6690000 0 0x40>; 609 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 610 clocks = <&cpg CPG_MOD 1003>; 611 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 612 resets = <&cpg 1003>; 613 i2c-scl-internal-delay-ns = <6>; 614 status = "disabled"; 615 }; 616 617 hscif0: serial@e6540000 { 618 compatible = "renesas,hscif-r8a77990", 619 "renesas,rcar-gen3-hscif", 620 "renesas,hscif"; 621 reg = <0 0xe6540000 0 0x60>; 622 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 623 clocks = <&cpg CPG_MOD 520>, 624 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 625 <&scif_clk>; 626 clock-names = "fck", "brg_int", "scif_clk"; 627 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 628 <&dmac2 0x31>, <&dmac2 0x30>; 629 dma-names = "tx", "rx", "tx", "rx"; 630 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 631 resets = <&cpg 520>; 632 status = "disabled"; 633 }; 634 635 hscif1: serial@e6550000 { 636 compatible = "renesas,hscif-r8a77990", 637 "renesas,rcar-gen3-hscif", 638 "renesas,hscif"; 639 reg = <0 0xe6550000 0 0x60>; 640 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 641 clocks = <&cpg CPG_MOD 519>, 642 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 643 <&scif_clk>; 644 clock-names = "fck", "brg_int", "scif_clk"; 645 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 646 <&dmac2 0x33>, <&dmac2 0x32>; 647 dma-names = "tx", "rx", "tx", "rx"; 648 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 649 resets = <&cpg 519>; 650 status = "disabled"; 651 }; 652 653 hscif2: serial@e6560000 { 654 compatible = "renesas,hscif-r8a77990", 655 "renesas,rcar-gen3-hscif", 656 "renesas,hscif"; 657 reg = <0 0xe6560000 0 0x60>; 658 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 659 clocks = <&cpg CPG_MOD 518>, 660 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 661 <&scif_clk>; 662 clock-names = "fck", "brg_int", "scif_clk"; 663 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 664 <&dmac2 0x35>, <&dmac2 0x34>; 665 dma-names = "tx", "rx", "tx", "rx"; 666 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 667 resets = <&cpg 518>; 668 status = "disabled"; 669 }; 670 671 hscif3: serial@e66a0000 { 672 compatible = "renesas,hscif-r8a77990", 673 "renesas,rcar-gen3-hscif", 674 "renesas,hscif"; 675 reg = <0 0xe66a0000 0 0x60>; 676 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 677 clocks = <&cpg CPG_MOD 517>, 678 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 679 <&scif_clk>; 680 clock-names = "fck", "brg_int", "scif_clk"; 681 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 682 dma-names = "tx", "rx"; 683 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 684 resets = <&cpg 517>; 685 status = "disabled"; 686 }; 687 688 hscif4: serial@e66b0000 { 689 compatible = "renesas,hscif-r8a77990", 690 "renesas,rcar-gen3-hscif", 691 "renesas,hscif"; 692 reg = <0 0xe66b0000 0 0x60>; 693 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 516>, 695 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 696 <&scif_clk>; 697 clock-names = "fck", "brg_int", "scif_clk"; 698 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 699 dma-names = "tx", "rx"; 700 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 701 resets = <&cpg 516>; 702 status = "disabled"; 703 }; 704 705 hsusb: usb@e6590000 { 706 compatible = "renesas,usbhs-r8a77990", 707 "renesas,rcar-gen3-usbhs"; 708 reg = <0 0xe6590000 0 0x200>; 709 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 711 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 712 <&usb_dmac1 0>, <&usb_dmac1 1>; 713 dma-names = "ch0", "ch1", "ch2", "ch3"; 714 renesas,buswait = <11>; 715 phys = <&usb2_phy0 3>; 716 phy-names = "usb"; 717 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 718 resets = <&cpg 704>, <&cpg 703>; 719 status = "disabled"; 720 }; 721 722 usb_dmac0: dma-controller@e65a0000 { 723 compatible = "renesas,r8a77990-usb-dmac", 724 "renesas,usb-dmac"; 725 reg = <0 0xe65a0000 0 0x100>; 726 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 728 interrupt-names = "ch0", "ch1"; 729 clocks = <&cpg CPG_MOD 330>; 730 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 731 resets = <&cpg 330>; 732 #dma-cells = <1>; 733 dma-channels = <2>; 734 }; 735 736 usb_dmac1: dma-controller@e65b0000 { 737 compatible = "renesas,r8a77990-usb-dmac", 738 "renesas,usb-dmac"; 739 reg = <0 0xe65b0000 0 0x100>; 740 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 742 interrupt-names = "ch0", "ch1"; 743 clocks = <&cpg CPG_MOD 331>; 744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 745 resets = <&cpg 331>; 746 #dma-cells = <1>; 747 dma-channels = <2>; 748 }; 749 750 arm_cc630p: crypto@e6601000 { 751 compatible = "arm,cryptocell-630p-ree"; 752 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 753 reg = <0x0 0xe6601000 0 0x1000>; 754 clocks = <&cpg CPG_MOD 229>; 755 resets = <&cpg 229>; 756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 757 }; 758 759 dmac0: dma-controller@e6700000 { 760 compatible = "renesas,dmac-r8a77990", 761 "renesas,rcar-dmac"; 762 reg = <0 0xe6700000 0 0x10000>; 763 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 780 interrupt-names = "error", 781 "ch0", "ch1", "ch2", "ch3", 782 "ch4", "ch5", "ch6", "ch7", 783 "ch8", "ch9", "ch10", "ch11", 784 "ch12", "ch13", "ch14", "ch15"; 785 clocks = <&cpg CPG_MOD 219>; 786 clock-names = "fck"; 787 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 788 resets = <&cpg 219>; 789 #dma-cells = <1>; 790 dma-channels = <16>; 791 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 792 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 793 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 794 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 795 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 796 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 797 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 798 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 799 }; 800 801 dmac1: dma-controller@e7300000 { 802 compatible = "renesas,dmac-r8a77990", 803 "renesas,rcar-dmac"; 804 reg = <0 0xe7300000 0 0x10000>; 805 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 822 interrupt-names = "error", 823 "ch0", "ch1", "ch2", "ch3", 824 "ch4", "ch5", "ch6", "ch7", 825 "ch8", "ch9", "ch10", "ch11", 826 "ch12", "ch13", "ch14", "ch15"; 827 clocks = <&cpg CPG_MOD 218>; 828 clock-names = "fck"; 829 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 830 resets = <&cpg 218>; 831 #dma-cells = <1>; 832 dma-channels = <16>; 833 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 834 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 835 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 836 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 837 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 838 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 839 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 840 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 841 }; 842 843 dmac2: dma-controller@e7310000 { 844 compatible = "renesas,dmac-r8a77990", 845 "renesas,rcar-dmac"; 846 reg = <0 0xe7310000 0 0x10000>; 847 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 864 interrupt-names = "error", 865 "ch0", "ch1", "ch2", "ch3", 866 "ch4", "ch5", "ch6", "ch7", 867 "ch8", "ch9", "ch10", "ch11", 868 "ch12", "ch13", "ch14", "ch15"; 869 clocks = <&cpg CPG_MOD 217>; 870 clock-names = "fck"; 871 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 872 resets = <&cpg 217>; 873 #dma-cells = <1>; 874 dma-channels = <16>; 875 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 876 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 877 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 878 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 879 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 880 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 881 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 882 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 883 }; 884 885 ipmmu_ds0: iommu@e6740000 { 886 compatible = "renesas,ipmmu-r8a77990"; 887 reg = <0 0xe6740000 0 0x1000>; 888 renesas,ipmmu-main = <&ipmmu_mm 0>; 889 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 890 #iommu-cells = <1>; 891 }; 892 893 ipmmu_ds1: iommu@e7740000 { 894 compatible = "renesas,ipmmu-r8a77990"; 895 reg = <0 0xe7740000 0 0x1000>; 896 renesas,ipmmu-main = <&ipmmu_mm 1>; 897 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 898 #iommu-cells = <1>; 899 }; 900 901 ipmmu_hc: iommu@e6570000 { 902 compatible = "renesas,ipmmu-r8a77990"; 903 reg = <0 0xe6570000 0 0x1000>; 904 renesas,ipmmu-main = <&ipmmu_mm 2>; 905 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 906 #iommu-cells = <1>; 907 }; 908 909 ipmmu_mm: iommu@e67b0000 { 910 compatible = "renesas,ipmmu-r8a77990"; 911 reg = <0 0xe67b0000 0 0x1000>; 912 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 914 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 915 #iommu-cells = <1>; 916 }; 917 918 ipmmu_mp: iommu@ec670000 { 919 compatible = "renesas,ipmmu-r8a77990"; 920 reg = <0 0xec670000 0 0x1000>; 921 renesas,ipmmu-main = <&ipmmu_mm 4>; 922 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 923 #iommu-cells = <1>; 924 }; 925 926 ipmmu_pv0: iommu@fd800000 { 927 compatible = "renesas,ipmmu-r8a77990"; 928 reg = <0 0xfd800000 0 0x1000>; 929 renesas,ipmmu-main = <&ipmmu_mm 6>; 930 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 931 #iommu-cells = <1>; 932 }; 933 934 ipmmu_rt: iommu@ffc80000 { 935 compatible = "renesas,ipmmu-r8a77990"; 936 reg = <0 0xffc80000 0 0x1000>; 937 renesas,ipmmu-main = <&ipmmu_mm 10>; 938 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 939 #iommu-cells = <1>; 940 }; 941 942 ipmmu_vc0: iommu@fe6b0000 { 943 compatible = "renesas,ipmmu-r8a77990"; 944 reg = <0 0xfe6b0000 0 0x1000>; 945 renesas,ipmmu-main = <&ipmmu_mm 12>; 946 power-domains = <&sysc R8A77990_PD_A3VC>; 947 #iommu-cells = <1>; 948 }; 949 950 ipmmu_vi0: iommu@febd0000 { 951 compatible = "renesas,ipmmu-r8a77990"; 952 reg = <0 0xfebd0000 0 0x1000>; 953 renesas,ipmmu-main = <&ipmmu_mm 14>; 954 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 955 #iommu-cells = <1>; 956 }; 957 958 ipmmu_vp0: iommu@fe990000 { 959 compatible = "renesas,ipmmu-r8a77990"; 960 reg = <0 0xfe990000 0 0x1000>; 961 renesas,ipmmu-main = <&ipmmu_mm 16>; 962 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 963 #iommu-cells = <1>; 964 }; 965 966 avb: ethernet@e6800000 { 967 compatible = "renesas,etheravb-r8a77990", 968 "renesas,etheravb-rcar-gen3"; 969 reg = <0 0xe6800000 0 0x800>; 970 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 995 interrupt-names = "ch0", "ch1", "ch2", "ch3", 996 "ch4", "ch5", "ch6", "ch7", 997 "ch8", "ch9", "ch10", "ch11", 998 "ch12", "ch13", "ch14", "ch15", 999 "ch16", "ch17", "ch18", "ch19", 1000 "ch20", "ch21", "ch22", "ch23", 1001 "ch24"; 1002 clocks = <&cpg CPG_MOD 812>; 1003 clock-names = "fck"; 1004 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1005 resets = <&cpg 812>; 1006 phy-mode = "rgmii"; 1007 rx-internal-delay-ps = <0>; 1008 iommus = <&ipmmu_ds0 16>; 1009 #address-cells = <1>; 1010 #size-cells = <0>; 1011 status = "disabled"; 1012 }; 1013 1014 can0: can@e6c30000 { 1015 compatible = "renesas,can-r8a77990", 1016 "renesas,rcar-gen3-can"; 1017 reg = <0 0xe6c30000 0 0x1000>; 1018 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1019 clocks = <&cpg CPG_MOD 916>, 1020 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1021 <&can_clk>; 1022 clock-names = "clkp1", "clkp2", "can_clk"; 1023 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1024 assigned-clock-rates = <40000000>; 1025 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1026 resets = <&cpg 916>; 1027 status = "disabled"; 1028 }; 1029 1030 can1: can@e6c38000 { 1031 compatible = "renesas,can-r8a77990", 1032 "renesas,rcar-gen3-can"; 1033 reg = <0 0xe6c38000 0 0x1000>; 1034 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1035 clocks = <&cpg CPG_MOD 915>, 1036 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1037 <&can_clk>; 1038 clock-names = "clkp1", "clkp2", "can_clk"; 1039 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1040 assigned-clock-rates = <40000000>; 1041 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1042 resets = <&cpg 915>; 1043 status = "disabled"; 1044 }; 1045 1046 canfd: can@e66c0000 { 1047 compatible = "renesas,r8a77990-canfd", 1048 "renesas,rcar-gen3-canfd"; 1049 reg = <0 0xe66c0000 0 0x8000>; 1050 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1051 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1052 interrupt-names = "ch_int", "g_int"; 1053 clocks = <&cpg CPG_MOD 914>, 1054 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1055 <&can_clk>; 1056 clock-names = "fck", "canfd", "can_clk"; 1057 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1058 assigned-clock-rates = <40000000>; 1059 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1060 resets = <&cpg 914>; 1061 status = "disabled"; 1062 1063 channel0 { 1064 status = "disabled"; 1065 }; 1066 1067 channel1 { 1068 status = "disabled"; 1069 }; 1070 }; 1071 1072 pwm0: pwm@e6e30000 { 1073 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1074 reg = <0 0xe6e30000 0 0x8>; 1075 clocks = <&cpg CPG_MOD 523>; 1076 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1077 resets = <&cpg 523>; 1078 #pwm-cells = <2>; 1079 status = "disabled"; 1080 }; 1081 1082 pwm1: pwm@e6e31000 { 1083 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1084 reg = <0 0xe6e31000 0 0x8>; 1085 clocks = <&cpg CPG_MOD 523>; 1086 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1087 resets = <&cpg 523>; 1088 #pwm-cells = <2>; 1089 status = "disabled"; 1090 }; 1091 1092 pwm2: pwm@e6e32000 { 1093 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1094 reg = <0 0xe6e32000 0 0x8>; 1095 clocks = <&cpg CPG_MOD 523>; 1096 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1097 resets = <&cpg 523>; 1098 #pwm-cells = <2>; 1099 status = "disabled"; 1100 }; 1101 1102 pwm3: pwm@e6e33000 { 1103 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1104 reg = <0 0xe6e33000 0 0x8>; 1105 clocks = <&cpg CPG_MOD 523>; 1106 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1107 resets = <&cpg 523>; 1108 #pwm-cells = <2>; 1109 status = "disabled"; 1110 }; 1111 1112 pwm4: pwm@e6e34000 { 1113 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1114 reg = <0 0xe6e34000 0 0x8>; 1115 clocks = <&cpg CPG_MOD 523>; 1116 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1117 resets = <&cpg 523>; 1118 #pwm-cells = <2>; 1119 status = "disabled"; 1120 }; 1121 1122 pwm5: pwm@e6e35000 { 1123 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1124 reg = <0 0xe6e35000 0 0x8>; 1125 clocks = <&cpg CPG_MOD 523>; 1126 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1127 resets = <&cpg 523>; 1128 #pwm-cells = <2>; 1129 status = "disabled"; 1130 }; 1131 1132 pwm6: pwm@e6e36000 { 1133 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1134 reg = <0 0xe6e36000 0 0x8>; 1135 clocks = <&cpg CPG_MOD 523>; 1136 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1137 resets = <&cpg 523>; 1138 #pwm-cells = <2>; 1139 status = "disabled"; 1140 }; 1141 1142 scif0: serial@e6e60000 { 1143 compatible = "renesas,scif-r8a77990", 1144 "renesas,rcar-gen3-scif", "renesas,scif"; 1145 reg = <0 0xe6e60000 0 64>; 1146 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 207>, 1148 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1149 <&scif_clk>; 1150 clock-names = "fck", "brg_int", "scif_clk"; 1151 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1152 <&dmac2 0x51>, <&dmac2 0x50>; 1153 dma-names = "tx", "rx", "tx", "rx"; 1154 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1155 resets = <&cpg 207>; 1156 status = "disabled"; 1157 }; 1158 1159 scif1: serial@e6e68000 { 1160 compatible = "renesas,scif-r8a77990", 1161 "renesas,rcar-gen3-scif", "renesas,scif"; 1162 reg = <0 0xe6e68000 0 64>; 1163 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1164 clocks = <&cpg CPG_MOD 206>, 1165 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1166 <&scif_clk>; 1167 clock-names = "fck", "brg_int", "scif_clk"; 1168 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1169 <&dmac2 0x53>, <&dmac2 0x52>; 1170 dma-names = "tx", "rx", "tx", "rx"; 1171 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1172 resets = <&cpg 206>; 1173 status = "disabled"; 1174 }; 1175 1176 scif2: serial@e6e88000 { 1177 compatible = "renesas,scif-r8a77990", 1178 "renesas,rcar-gen3-scif", "renesas,scif"; 1179 reg = <0 0xe6e88000 0 64>; 1180 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 310>, 1182 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1183 <&scif_clk>; 1184 clock-names = "fck", "brg_int", "scif_clk"; 1185 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1186 <&dmac2 0x13>, <&dmac2 0x12>; 1187 dma-names = "tx", "rx", "tx", "rx"; 1188 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1189 resets = <&cpg 310>; 1190 status = "disabled"; 1191 }; 1192 1193 scif3: serial@e6c50000 { 1194 compatible = "renesas,scif-r8a77990", 1195 "renesas,rcar-gen3-scif", "renesas,scif"; 1196 reg = <0 0xe6c50000 0 64>; 1197 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 204>, 1199 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1200 <&scif_clk>; 1201 clock-names = "fck", "brg_int", "scif_clk"; 1202 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1203 dma-names = "tx", "rx"; 1204 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1205 resets = <&cpg 204>; 1206 status = "disabled"; 1207 }; 1208 1209 scif4: serial@e6c40000 { 1210 compatible = "renesas,scif-r8a77990", 1211 "renesas,rcar-gen3-scif", "renesas,scif"; 1212 reg = <0 0xe6c40000 0 64>; 1213 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1214 clocks = <&cpg CPG_MOD 203>, 1215 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1216 <&scif_clk>; 1217 clock-names = "fck", "brg_int", "scif_clk"; 1218 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1219 dma-names = "tx", "rx"; 1220 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1221 resets = <&cpg 203>; 1222 status = "disabled"; 1223 }; 1224 1225 scif5: serial@e6f30000 { 1226 compatible = "renesas,scif-r8a77990", 1227 "renesas,rcar-gen3-scif", "renesas,scif"; 1228 reg = <0 0xe6f30000 0 64>; 1229 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 202>, 1231 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1232 <&scif_clk>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1235 dma-names = "tx", "rx"; 1236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1237 resets = <&cpg 202>; 1238 status = "disabled"; 1239 }; 1240 1241 msiof0: spi@e6e90000 { 1242 compatible = "renesas,msiof-r8a77990", 1243 "renesas,rcar-gen3-msiof"; 1244 reg = <0 0xe6e90000 0 0x0064>; 1245 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1246 clocks = <&cpg CPG_MOD 211>; 1247 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1248 <&dmac2 0x41>, <&dmac2 0x40>; 1249 dma-names = "tx", "rx", "tx", "rx"; 1250 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1251 resets = <&cpg 211>; 1252 #address-cells = <1>; 1253 #size-cells = <0>; 1254 status = "disabled"; 1255 }; 1256 1257 msiof1: spi@e6ea0000 { 1258 compatible = "renesas,msiof-r8a77990", 1259 "renesas,rcar-gen3-msiof"; 1260 reg = <0 0xe6ea0000 0 0x0064>; 1261 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 210>; 1263 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1264 dma-names = "tx", "rx"; 1265 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1266 resets = <&cpg 210>; 1267 #address-cells = <1>; 1268 #size-cells = <0>; 1269 status = "disabled"; 1270 }; 1271 1272 msiof2: spi@e6c00000 { 1273 compatible = "renesas,msiof-r8a77990", 1274 "renesas,rcar-gen3-msiof"; 1275 reg = <0 0xe6c00000 0 0x0064>; 1276 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1277 clocks = <&cpg CPG_MOD 209>; 1278 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1279 dma-names = "tx", "rx"; 1280 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1281 resets = <&cpg 209>; 1282 #address-cells = <1>; 1283 #size-cells = <0>; 1284 status = "disabled"; 1285 }; 1286 1287 msiof3: spi@e6c10000 { 1288 compatible = "renesas,msiof-r8a77990", 1289 "renesas,rcar-gen3-msiof"; 1290 reg = <0 0xe6c10000 0 0x0064>; 1291 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1292 clocks = <&cpg CPG_MOD 208>; 1293 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1294 dma-names = "tx", "rx"; 1295 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1296 resets = <&cpg 208>; 1297 #address-cells = <1>; 1298 #size-cells = <0>; 1299 status = "disabled"; 1300 }; 1301 1302 vin4: video@e6ef4000 { 1303 compatible = "renesas,vin-r8a77990"; 1304 reg = <0 0xe6ef4000 0 0x1000>; 1305 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1306 clocks = <&cpg CPG_MOD 807>; 1307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1308 resets = <&cpg 807>; 1309 renesas,id = <4>; 1310 status = "disabled"; 1311 1312 ports { 1313 #address-cells = <1>; 1314 #size-cells = <0>; 1315 1316 port@1 { 1317 #address-cells = <1>; 1318 #size-cells = <0>; 1319 1320 reg = <1>; 1321 1322 vin4csi40: endpoint@2 { 1323 reg = <2>; 1324 remote-endpoint = <&csi40vin4>; 1325 }; 1326 }; 1327 }; 1328 }; 1329 1330 vin5: video@e6ef5000 { 1331 compatible = "renesas,vin-r8a77990"; 1332 reg = <0 0xe6ef5000 0 0x1000>; 1333 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1334 clocks = <&cpg CPG_MOD 806>; 1335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1336 resets = <&cpg 806>; 1337 renesas,id = <5>; 1338 status = "disabled"; 1339 1340 ports { 1341 #address-cells = <1>; 1342 #size-cells = <0>; 1343 1344 port@1 { 1345 #address-cells = <1>; 1346 #size-cells = <0>; 1347 1348 reg = <1>; 1349 1350 vin5csi40: endpoint@2 { 1351 reg = <2>; 1352 remote-endpoint = <&csi40vin5>; 1353 }; 1354 }; 1355 }; 1356 }; 1357 1358 drif00: rif@e6f40000 { 1359 compatible = "renesas,r8a77990-drif", 1360 "renesas,rcar-gen3-drif"; 1361 reg = <0 0xe6f40000 0 0x84>; 1362 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1363 clocks = <&cpg CPG_MOD 515>; 1364 clock-names = "fck"; 1365 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1366 dma-names = "rx", "rx"; 1367 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1368 resets = <&cpg 515>; 1369 renesas,bonding = <&drif01>; 1370 status = "disabled"; 1371 }; 1372 1373 drif01: rif@e6f50000 { 1374 compatible = "renesas,r8a77990-drif", 1375 "renesas,rcar-gen3-drif"; 1376 reg = <0 0xe6f50000 0 0x84>; 1377 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1378 clocks = <&cpg CPG_MOD 514>; 1379 clock-names = "fck"; 1380 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1381 dma-names = "rx", "rx"; 1382 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1383 resets = <&cpg 514>; 1384 renesas,bonding = <&drif00>; 1385 status = "disabled"; 1386 }; 1387 1388 drif10: rif@e6f60000 { 1389 compatible = "renesas,r8a77990-drif", 1390 "renesas,rcar-gen3-drif"; 1391 reg = <0 0xe6f60000 0 0x84>; 1392 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1393 clocks = <&cpg CPG_MOD 513>; 1394 clock-names = "fck"; 1395 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1396 dma-names = "rx", "rx"; 1397 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1398 resets = <&cpg 513>; 1399 renesas,bonding = <&drif11>; 1400 status = "disabled"; 1401 }; 1402 1403 drif11: rif@e6f70000 { 1404 compatible = "renesas,r8a77990-drif", 1405 "renesas,rcar-gen3-drif"; 1406 reg = <0 0xe6f70000 0 0x84>; 1407 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1408 clocks = <&cpg CPG_MOD 512>; 1409 clock-names = "fck"; 1410 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1411 dma-names = "rx", "rx"; 1412 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1413 resets = <&cpg 512>; 1414 renesas,bonding = <&drif10>; 1415 status = "disabled"; 1416 }; 1417 1418 drif20: rif@e6f80000 { 1419 compatible = "renesas,r8a77990-drif", 1420 "renesas,rcar-gen3-drif"; 1421 reg = <0 0xe6f80000 0 0x84>; 1422 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1423 clocks = <&cpg CPG_MOD 511>; 1424 clock-names = "fck"; 1425 dmas = <&dmac0 0x28>; 1426 dma-names = "rx"; 1427 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1428 resets = <&cpg 511>; 1429 renesas,bonding = <&drif21>; 1430 status = "disabled"; 1431 }; 1432 1433 drif21: rif@e6f90000 { 1434 compatible = "renesas,r8a77990-drif", 1435 "renesas,rcar-gen3-drif"; 1436 reg = <0 0xe6f90000 0 0x84>; 1437 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1438 clocks = <&cpg CPG_MOD 510>; 1439 clock-names = "fck"; 1440 dmas = <&dmac0 0x2a>; 1441 dma-names = "rx"; 1442 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1443 resets = <&cpg 510>; 1444 renesas,bonding = <&drif20>; 1445 status = "disabled"; 1446 }; 1447 1448 drif30: rif@e6fa0000 { 1449 compatible = "renesas,r8a77990-drif", 1450 "renesas,rcar-gen3-drif"; 1451 reg = <0 0xe6fa0000 0 0x84>; 1452 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1453 clocks = <&cpg CPG_MOD 509>; 1454 clock-names = "fck"; 1455 dmas = <&dmac0 0x2c>; 1456 dma-names = "rx"; 1457 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1458 resets = <&cpg 509>; 1459 renesas,bonding = <&drif31>; 1460 status = "disabled"; 1461 }; 1462 1463 drif31: rif@e6fb0000 { 1464 compatible = "renesas,r8a77990-drif", 1465 "renesas,rcar-gen3-drif"; 1466 reg = <0 0xe6fb0000 0 0x84>; 1467 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 508>; 1469 clock-names = "fck"; 1470 dmas = <&dmac0 0x2e>; 1471 dma-names = "rx"; 1472 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1473 resets = <&cpg 508>; 1474 renesas,bonding = <&drif30>; 1475 status = "disabled"; 1476 }; 1477 1478 rcar_sound: sound@ec500000 { 1479 /* 1480 * #sound-dai-cells is required if simple-card 1481 * 1482 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1483 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1484 */ 1485 /* 1486 * #clock-cells is required for audio_clkout0/1/2/3 1487 * 1488 * clkout : #clock-cells = <0>; <&rcar_sound>; 1489 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1490 */ 1491 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1492 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1493 <0 0xec5a0000 0 0x100>, /* ADG */ 1494 <0 0xec540000 0 0x1000>, /* SSIU */ 1495 <0 0xec541000 0 0x280>, /* SSI */ 1496 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1497 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1498 1499 clocks = <&cpg CPG_MOD 1005>, 1500 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1501 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1502 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1503 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1504 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1505 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1506 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1507 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1508 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1509 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1510 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1511 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1512 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1513 <&audio_clk_a>, <&audio_clk_b>, 1514 <&audio_clk_c>, 1515 <&cpg CPG_MOD 922>; 1516 clock-names = "ssi-all", 1517 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1518 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1519 "ssi.1", "ssi.0", 1520 "src.9", "src.8", "src.7", "src.6", 1521 "src.5", "src.4", "src.3", "src.2", 1522 "src.1", "src.0", 1523 "mix.1", "mix.0", 1524 "ctu.1", "ctu.0", 1525 "dvc.0", "dvc.1", 1526 "clk_a", "clk_b", "clk_c", "clk_i"; 1527 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1528 resets = <&cpg 1005>, 1529 <&cpg 1006>, <&cpg 1007>, 1530 <&cpg 1008>, <&cpg 1009>, 1531 <&cpg 1010>, <&cpg 1011>, 1532 <&cpg 1012>, <&cpg 1013>, 1533 <&cpg 1014>, <&cpg 1015>; 1534 reset-names = "ssi-all", 1535 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1536 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1537 "ssi.1", "ssi.0"; 1538 status = "disabled"; 1539 1540 rcar_sound,ctu { 1541 ctu00: ctu-0 { }; 1542 ctu01: ctu-1 { }; 1543 ctu02: ctu-2 { }; 1544 ctu03: ctu-3 { }; 1545 ctu10: ctu-4 { }; 1546 ctu11: ctu-5 { }; 1547 ctu12: ctu-6 { }; 1548 ctu13: ctu-7 { }; 1549 }; 1550 1551 rcar_sound,dvc { 1552 dvc0: dvc-0 { 1553 dmas = <&audma0 0xbc>; 1554 dma-names = "tx"; 1555 }; 1556 dvc1: dvc-1 { 1557 dmas = <&audma0 0xbe>; 1558 dma-names = "tx"; 1559 }; 1560 }; 1561 1562 rcar_sound,mix { 1563 mix0: mix-0 { }; 1564 mix1: mix-1 { }; 1565 }; 1566 1567 rcar_sound,src { 1568 src0: src-0 { 1569 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1570 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1571 dma-names = "rx", "tx"; 1572 }; 1573 src1: src-1 { 1574 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1575 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1576 dma-names = "rx", "tx"; 1577 }; 1578 src2: src-2 { 1579 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1580 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1581 dma-names = "rx", "tx"; 1582 }; 1583 src3: src-3 { 1584 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1585 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1586 dma-names = "rx", "tx"; 1587 }; 1588 src4: src-4 { 1589 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1590 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1591 dma-names = "rx", "tx"; 1592 }; 1593 src5: src-5 { 1594 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1595 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1596 dma-names = "rx", "tx"; 1597 }; 1598 src6: src-6 { 1599 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1600 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1601 dma-names = "rx", "tx"; 1602 }; 1603 src7: src-7 { 1604 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1605 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1606 dma-names = "rx", "tx"; 1607 }; 1608 src8: src-8 { 1609 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1610 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1611 dma-names = "rx", "tx"; 1612 }; 1613 src9: src-9 { 1614 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1615 dmas = <&audma0 0x97>, <&audma0 0xba>; 1616 dma-names = "rx", "tx"; 1617 }; 1618 }; 1619 1620 rcar_sound,ssi { 1621 ssi0: ssi-0 { 1622 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1623 dmas = <&audma0 0x01>, <&audma0 0x02>, 1624 <&audma0 0x15>, <&audma0 0x16>; 1625 dma-names = "rx", "tx", "rxu", "txu"; 1626 }; 1627 ssi1: ssi-1 { 1628 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1629 dmas = <&audma0 0x03>, <&audma0 0x04>, 1630 <&audma0 0x49>, <&audma0 0x4a>; 1631 dma-names = "rx", "tx", "rxu", "txu"; 1632 }; 1633 ssi2: ssi-2 { 1634 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1635 dmas = <&audma0 0x05>, <&audma0 0x06>, 1636 <&audma0 0x63>, <&audma0 0x64>; 1637 dma-names = "rx", "tx", "rxu", "txu"; 1638 }; 1639 ssi3: ssi-3 { 1640 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1641 dmas = <&audma0 0x07>, <&audma0 0x08>, 1642 <&audma0 0x6f>, <&audma0 0x70>; 1643 dma-names = "rx", "tx", "rxu", "txu"; 1644 }; 1645 ssi4: ssi-4 { 1646 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1647 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1648 <&audma0 0x71>, <&audma0 0x72>; 1649 dma-names = "rx", "tx", "rxu", "txu"; 1650 }; 1651 ssi5: ssi-5 { 1652 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1653 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1654 <&audma0 0x73>, <&audma0 0x74>; 1655 dma-names = "rx", "tx", "rxu", "txu"; 1656 }; 1657 ssi6: ssi-6 { 1658 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1659 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1660 <&audma0 0x75>, <&audma0 0x76>; 1661 dma-names = "rx", "tx", "rxu", "txu"; 1662 }; 1663 ssi7: ssi-7 { 1664 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1665 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1666 <&audma0 0x79>, <&audma0 0x7a>; 1667 dma-names = "rx", "tx", "rxu", "txu"; 1668 }; 1669 ssi8: ssi-8 { 1670 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1671 dmas = <&audma0 0x11>, <&audma0 0x12>, 1672 <&audma0 0x7b>, <&audma0 0x7c>; 1673 dma-names = "rx", "tx", "rxu", "txu"; 1674 }; 1675 ssi9: ssi-9 { 1676 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1677 dmas = <&audma0 0x13>, <&audma0 0x14>, 1678 <&audma0 0x7d>, <&audma0 0x7e>; 1679 dma-names = "rx", "tx", "rxu", "txu"; 1680 }; 1681 }; 1682 }; 1683 1684 mlp: mlp@ec520000 { 1685 compatible = "renesas,r8a77990-mlp", 1686 "renesas,rcar-gen3-mlp"; 1687 reg = <0 0xec520000 0 0x800>; 1688 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1689 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1690 clocks = <&cpg CPG_MOD 802>; 1691 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1692 resets = <&cpg 802>; 1693 status = "disabled"; 1694 }; 1695 1696 audma0: dma-controller@ec700000 { 1697 compatible = "renesas,dmac-r8a77990", 1698 "renesas,rcar-dmac"; 1699 reg = <0 0xec700000 0 0x10000>; 1700 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1701 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1702 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1703 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1704 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1705 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1706 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1707 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1708 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1709 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1710 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1711 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1712 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1713 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1714 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1715 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1716 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1717 interrupt-names = "error", 1718 "ch0", "ch1", "ch2", "ch3", 1719 "ch4", "ch5", "ch6", "ch7", 1720 "ch8", "ch9", "ch10", "ch11", 1721 "ch12", "ch13", "ch14", "ch15"; 1722 clocks = <&cpg CPG_MOD 502>; 1723 clock-names = "fck"; 1724 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1725 resets = <&cpg 502>; 1726 #dma-cells = <1>; 1727 dma-channels = <16>; 1728 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1729 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1730 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1731 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1732 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1733 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1734 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1735 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1736 }; 1737 1738 xhci0: usb@ee000000 { 1739 compatible = "renesas,xhci-r8a77990", 1740 "renesas,rcar-gen3-xhci"; 1741 reg = <0 0xee000000 0 0xc00>; 1742 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 328>; 1744 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1745 resets = <&cpg 328>; 1746 status = "disabled"; 1747 }; 1748 1749 usb3_peri0: usb@ee020000 { 1750 compatible = "renesas,r8a77990-usb3-peri", 1751 "renesas,rcar-gen3-usb3-peri"; 1752 reg = <0 0xee020000 0 0x400>; 1753 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1754 clocks = <&cpg CPG_MOD 328>; 1755 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1756 resets = <&cpg 328>; 1757 status = "disabled"; 1758 }; 1759 1760 ohci0: usb@ee080000 { 1761 compatible = "generic-ohci"; 1762 reg = <0 0xee080000 0 0x100>; 1763 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1765 phys = <&usb2_phy0 1>; 1766 phy-names = "usb"; 1767 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1768 resets = <&cpg 703>, <&cpg 704>; 1769 status = "disabled"; 1770 }; 1771 1772 ehci0: usb@ee080100 { 1773 compatible = "generic-ehci"; 1774 reg = <0 0xee080100 0 0x100>; 1775 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1776 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1777 phys = <&usb2_phy0 2>; 1778 phy-names = "usb"; 1779 companion = <&ohci0>; 1780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1781 resets = <&cpg 703>, <&cpg 704>; 1782 status = "disabled"; 1783 }; 1784 1785 usb2_phy0: usb-phy@ee080200 { 1786 compatible = "renesas,usb2-phy-r8a77990", 1787 "renesas,rcar-gen3-usb2-phy"; 1788 reg = <0 0xee080200 0 0x700>; 1789 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1790 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1791 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1792 resets = <&cpg 703>, <&cpg 704>; 1793 #phy-cells = <1>; 1794 status = "disabled"; 1795 }; 1796 1797 sdhi0: mmc@ee100000 { 1798 compatible = "renesas,sdhi-r8a77990", 1799 "renesas,rcar-gen3-sdhi"; 1800 reg = <0 0xee100000 0 0x2000>; 1801 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1802 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; 1803 clock-names = "core", "clkh"; 1804 max-frequency = <200000000>; 1805 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1806 resets = <&cpg 314>; 1807 iommus = <&ipmmu_ds1 32>; 1808 status = "disabled"; 1809 }; 1810 1811 sdhi1: mmc@ee120000 { 1812 compatible = "renesas,sdhi-r8a77990", 1813 "renesas,rcar-gen3-sdhi"; 1814 reg = <0 0xee120000 0 0x2000>; 1815 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1816 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; 1817 clock-names = "core", "clkh"; 1818 max-frequency = <200000000>; 1819 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1820 resets = <&cpg 313>; 1821 iommus = <&ipmmu_ds1 33>; 1822 status = "disabled"; 1823 }; 1824 1825 sdhi3: mmc@ee160000 { 1826 compatible = "renesas,sdhi-r8a77990", 1827 "renesas,rcar-gen3-sdhi"; 1828 reg = <0 0xee160000 0 0x2000>; 1829 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1830 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; 1831 clock-names = "core", "clkh"; 1832 max-frequency = <200000000>; 1833 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1834 resets = <&cpg 311>; 1835 iommus = <&ipmmu_ds1 35>; 1836 status = "disabled"; 1837 }; 1838 1839 rpc: spi@ee200000 { 1840 compatible = "renesas,r8a77990-rpc-if", 1841 "renesas,rcar-gen3-rpc-if"; 1842 reg = <0 0xee200000 0 0x200>, 1843 <0 0x08000000 0 0x04000000>, 1844 <0 0xee208000 0 0x100>; 1845 reg-names = "regs", "dirmap", "wbuf"; 1846 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1847 clocks = <&cpg CPG_MOD 917>; 1848 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1849 resets = <&cpg 917>; 1850 #address-cells = <1>; 1851 #size-cells = <0>; 1852 status = "disabled"; 1853 }; 1854 1855 gic: interrupt-controller@f1010000 { 1856 compatible = "arm,gic-400"; 1857 #interrupt-cells = <3>; 1858 #address-cells = <0>; 1859 interrupt-controller; 1860 reg = <0x0 0xf1010000 0 0x1000>, 1861 <0x0 0xf1020000 0 0x20000>, 1862 <0x0 0xf1040000 0 0x20000>, 1863 <0x0 0xf1060000 0 0x20000>; 1864 interrupts = <GIC_PPI 9 1865 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1866 clocks = <&cpg CPG_MOD 408>; 1867 clock-names = "clk"; 1868 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1869 resets = <&cpg 408>; 1870 }; 1871 1872 pciec0: pcie@fe000000 { 1873 compatible = "renesas,pcie-r8a77990", 1874 "renesas,pcie-rcar-gen3"; 1875 reg = <0 0xfe000000 0 0x80000>; 1876 #address-cells = <3>; 1877 #size-cells = <2>; 1878 bus-range = <0x00 0xff>; 1879 device_type = "pci"; 1880 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1881 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1882 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1883 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1884 /* Map all possible DDR/IOMMU as inbound ranges */ 1885 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 1886 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1887 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1888 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1889 #interrupt-cells = <1>; 1890 interrupt-map-mask = <0 0 0 0>; 1891 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1892 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1893 clock-names = "pcie", "pcie_bus"; 1894 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1895 resets = <&cpg 319>; 1896 iommu-map = <0 &ipmmu_hc 0 1>; 1897 iommu-map-mask = <0>; 1898 status = "disabled"; 1899 }; 1900 1901 vspb0: vsp@fe960000 { 1902 compatible = "renesas,vsp2"; 1903 reg = <0 0xfe960000 0 0x8000>; 1904 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1905 clocks = <&cpg CPG_MOD 626>; 1906 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1907 resets = <&cpg 626>; 1908 renesas,fcp = <&fcpvb0>; 1909 }; 1910 1911 fcpvb0: fcp@fe96f000 { 1912 compatible = "renesas,fcpv"; 1913 reg = <0 0xfe96f000 0 0x200>; 1914 clocks = <&cpg CPG_MOD 607>; 1915 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1916 resets = <&cpg 607>; 1917 iommus = <&ipmmu_vp0 5>; 1918 }; 1919 1920 vspi0: vsp@fe9a0000 { 1921 compatible = "renesas,vsp2"; 1922 reg = <0 0xfe9a0000 0 0x8000>; 1923 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1924 clocks = <&cpg CPG_MOD 631>; 1925 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1926 resets = <&cpg 631>; 1927 renesas,fcp = <&fcpvi0>; 1928 }; 1929 1930 fcpvi0: fcp@fe9af000 { 1931 compatible = "renesas,fcpv"; 1932 reg = <0 0xfe9af000 0 0x200>; 1933 clocks = <&cpg CPG_MOD 611>; 1934 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1935 resets = <&cpg 611>; 1936 iommus = <&ipmmu_vp0 8>; 1937 }; 1938 1939 vspd0: vsp@fea20000 { 1940 compatible = "renesas,vsp2"; 1941 reg = <0 0xfea20000 0 0x7000>; 1942 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1943 clocks = <&cpg CPG_MOD 623>; 1944 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1945 resets = <&cpg 623>; 1946 renesas,fcp = <&fcpvd0>; 1947 }; 1948 1949 fcpvd0: fcp@fea27000 { 1950 compatible = "renesas,fcpv"; 1951 reg = <0 0xfea27000 0 0x200>; 1952 clocks = <&cpg CPG_MOD 603>; 1953 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1954 resets = <&cpg 603>; 1955 iommus = <&ipmmu_vi0 8>; 1956 }; 1957 1958 vspd1: vsp@fea28000 { 1959 compatible = "renesas,vsp2"; 1960 reg = <0 0xfea28000 0 0x7000>; 1961 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1962 clocks = <&cpg CPG_MOD 622>; 1963 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1964 resets = <&cpg 622>; 1965 renesas,fcp = <&fcpvd1>; 1966 }; 1967 1968 fcpvd1: fcp@fea2f000 { 1969 compatible = "renesas,fcpv"; 1970 reg = <0 0xfea2f000 0 0x200>; 1971 clocks = <&cpg CPG_MOD 602>; 1972 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1973 resets = <&cpg 602>; 1974 iommus = <&ipmmu_vi0 9>; 1975 }; 1976 1977 cmm0: cmm@fea40000 { 1978 compatible = "renesas,r8a77990-cmm", 1979 "renesas,rcar-gen3-cmm"; 1980 reg = <0 0xfea40000 0 0x1000>; 1981 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1982 clocks = <&cpg CPG_MOD 711>; 1983 resets = <&cpg 711>; 1984 }; 1985 1986 cmm1: cmm@fea50000 { 1987 compatible = "renesas,r8a77990-cmm", 1988 "renesas,rcar-gen3-cmm"; 1989 reg = <0 0xfea50000 0 0x1000>; 1990 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1991 clocks = <&cpg CPG_MOD 710>; 1992 resets = <&cpg 710>; 1993 }; 1994 1995 csi40: csi2@feaa0000 { 1996 compatible = "renesas,r8a77990-csi2"; 1997 reg = <0 0xfeaa0000 0 0x10000>; 1998 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1999 clocks = <&cpg CPG_MOD 716>; 2000 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2001 resets = <&cpg 716>; 2002 status = "disabled"; 2003 2004 ports { 2005 #address-cells = <1>; 2006 #size-cells = <0>; 2007 2008 port@0 { 2009 reg = <0>; 2010 }; 2011 2012 port@1 { 2013 #address-cells = <1>; 2014 #size-cells = <0>; 2015 2016 reg = <1>; 2017 2018 csi40vin4: endpoint@0 { 2019 reg = <0>; 2020 remote-endpoint = <&vin4csi40>; 2021 }; 2022 csi40vin5: endpoint@1 { 2023 reg = <1>; 2024 remote-endpoint = <&vin5csi40>; 2025 }; 2026 }; 2027 }; 2028 }; 2029 2030 du: display@feb00000 { 2031 compatible = "renesas,du-r8a77990"; 2032 reg = <0 0xfeb00000 0 0x40000>; 2033 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2034 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 2035 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 2036 clock-names = "du.0", "du.1"; 2037 resets = <&cpg 724>; 2038 reset-names = "du.0"; 2039 2040 renesas,cmms = <&cmm0>, <&cmm1>; 2041 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2042 2043 status = "disabled"; 2044 2045 ports { 2046 #address-cells = <1>; 2047 #size-cells = <0>; 2048 2049 port@0 { 2050 reg = <0>; 2051 }; 2052 2053 port@1 { 2054 reg = <1>; 2055 du_out_lvds0: endpoint { 2056 remote-endpoint = <&lvds0_in>; 2057 }; 2058 }; 2059 2060 port@2 { 2061 reg = <2>; 2062 du_out_lvds1: endpoint { 2063 remote-endpoint = <&lvds1_in>; 2064 }; 2065 }; 2066 }; 2067 }; 2068 2069 lvds0: lvds-encoder@feb90000 { 2070 compatible = "renesas,r8a77990-lvds"; 2071 reg = <0 0xfeb90000 0 0x20>; 2072 clocks = <&cpg CPG_MOD 727>; 2073 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2074 resets = <&cpg 727>; 2075 status = "disabled"; 2076 2077 renesas,companion = <&lvds1>; 2078 2079 ports { 2080 #address-cells = <1>; 2081 #size-cells = <0>; 2082 2083 port@0 { 2084 reg = <0>; 2085 lvds0_in: endpoint { 2086 remote-endpoint = <&du_out_lvds0>; 2087 }; 2088 }; 2089 2090 port@1 { 2091 reg = <1>; 2092 }; 2093 }; 2094 }; 2095 2096 lvds1: lvds-encoder@feb90100 { 2097 compatible = "renesas,r8a77990-lvds"; 2098 reg = <0 0xfeb90100 0 0x20>; 2099 clocks = <&cpg CPG_MOD 727>; 2100 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2101 resets = <&cpg 726>; 2102 status = "disabled"; 2103 2104 ports { 2105 #address-cells = <1>; 2106 #size-cells = <0>; 2107 2108 port@0 { 2109 reg = <0>; 2110 lvds1_in: endpoint { 2111 remote-endpoint = <&du_out_lvds1>; 2112 }; 2113 }; 2114 2115 port@1 { 2116 reg = <1>; 2117 }; 2118 }; 2119 }; 2120 2121 prr: chipid@fff00044 { 2122 compatible = "renesas,prr"; 2123 reg = <0 0xfff00044 0 4>; 2124 }; 2125 }; 2126 2127 thermal-zones { 2128 cpu-thermal { 2129 polling-delay-passive = <250>; 2130 polling-delay = <0>; 2131 thermal-sensors = <&thermal>; 2132 sustainable-power = <717>; 2133 2134 cooling-maps { 2135 map0 { 2136 trip = <&target>; 2137 cooling-device = <&a53_0 0 2>; 2138 contribution = <1024>; 2139 }; 2140 }; 2141 2142 trips { 2143 sensor1_crit: sensor1-crit { 2144 temperature = <120000>; 2145 hysteresis = <2000>; 2146 type = "critical"; 2147 }; 2148 2149 target: trip-point1 { 2150 temperature = <100000>; 2151 hysteresis = <2000>; 2152 type = "passive"; 2153 }; 2154 }; 2155 }; 2156 }; 2157 2158 timer { 2159 compatible = "arm,armv8-timer"; 2160 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2161 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2162 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2163 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2164 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2165 }; 2166}; 2167