1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9#include "qdu1000.dtsi"
10#include "pm8150.dtsi"
11
12/ {
13	model = "Qualcomm Technologies, Inc. QDU1000 IDP";
14	compatible = "qcom,qdu1000-idp", "qcom,qdu1000";
15	chassis-type = "embedded";
16
17	aliases {
18		serial0 = &uart7;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	ppvar_sys: ppvar-sys-regulator {
26		compatible = "regulator-fixed";
27		regulator-name = "ppvar_sys";
28		regulator-min-microvolt = <4200000>;
29		regulator-max-microvolt = <4200000>;
30
31		regulator-always-on;
32		regulator-boot-on;
33	};
34
35	vph_pwr: vph-pwr-regulator {
36		compatible = "regulator-fixed";
37		regulator-name = "vph_pwr";
38		regulator-min-microvolt = <3700000>;
39		regulator-max-microvolt = <3700000>;
40
41		regulator-always-on;
42		regulator-boot-on;
43
44		vin-supply = <&ppvar_sys>;
45	};
46};
47
48&apps_rsc {
49	regulators {
50		compatible = "qcom,pm8150-rpmh-regulators";
51		qcom,pmic-id = "a";
52
53		vdd-s1-supply = <&vph_pwr>;
54		vdd-s2-supply = <&vph_pwr>;
55		vdd-s3-supply = <&vph_pwr>;
56		vdd-s4-supply = <&vph_pwr>;
57		vdd-s5-supply = <&vph_pwr>;
58		vdd-s6-supply = <&vph_pwr>;
59		vdd-s7-supply = <&vph_pwr>;
60		vdd-s8-supply = <&vph_pwr>;
61		vdd-s9-supply = <&vph_pwr>;
62		vdd-s10-supply = <&vph_pwr>;
63
64		vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>;
65		vdd-l2-l10-supply = <&vph_pwr>;
66		vdd-l3-l4-l5-l18-supply = <&vreg_s5a_2p0>;
67		vdd-l6-l9-supply = <&vreg_s6a_0p9>;
68		vdd-l7-l12-l14-l15-supply = <&vreg_s4a_1p8>;
69		vdd-l13-l16-l17-supply = <&vph_pwr>;
70
71		vreg_s2a_0p5: smps2 {
72			regulator-name = "vreg_s2a_0p5";
73			regulator-min-microvolt = <320000>;
74			regulator-max-microvolt = <570000>;
75		};
76
77		vreg_s3a_1p05: smps3 {
78			regulator-name = "vreg_s3a_1p05";
79			regulator-min-microvolt = <950000>;
80			regulator-max-microvolt = <1170000>;
81		};
82
83		vreg_s4a_1p8: smps4 {
84			regulator-name = "vreg_s4a_1p8";
85			regulator-min-microvolt = <1800000>;
86			regulator-max-microvolt = <1800000>;
87		};
88
89		vreg_s5a_2p0: smps5 {
90			regulator-name = "vreg_s5a_2p0";
91			regulator-min-microvolt = <1904000>;
92			regulator-max-microvolt = <2000000>;
93		};
94
95		vreg_s6a_0p9: smps6 {
96			regulator-name = "vreg_s6a_0p9";
97			regulator-min-microvolt = <920000>;
98			regulator-max-microvolt = <1128000>;
99		};
100
101		vreg_s7a_1p2: smps7 {
102			regulator-name = "vreg_s7a_1p2";
103			regulator-min-microvolt = <1200000>;
104			regulator-max-microvolt = <1200000>;
105		};
106
107		vreg_s8a_1p3: smps8 {
108			regulator-name = "vreg_s8a_1p3";
109			regulator-min-microvolt = <1352000>;
110			regulator-max-microvolt = <1352000>;
111		};
112
113		vreg_l1a_0p91: ldo1 {
114			regulator-name = "vreg_l1a_0p91";
115			regulator-min-microvolt = <312000>;
116			regulator-max-microvolt = <1304000>;
117			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
118		};
119
120		vreg_l2a_2p3: ldo2 {
121			regulator-name = "vreg_l2a_2p3";
122			regulator-min-microvolt = <2970000>;
123			regulator-max-microvolt = <3300000>;
124			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
125		};
126
127		vreg_l3a_1p2: ldo3 {
128			regulator-name = "vreg_l3a_1p2";
129			regulator-min-microvolt = <920000>;
130			regulator-max-microvolt = <1260000>;
131			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
132		};
133
134		vreg_l5a_0p8: ldo5 {
135			regulator-name = "vreg_l5a_0p8";
136			regulator-min-microvolt = <312000>;
137			regulator-max-microvolt = <1304000>;
138			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
139		};
140
141		vreg_l6a_0p91: ldo6 {
142			regulator-name = "vreg_l6a_0p91";
143			regulator-min-microvolt = <880000>;
144			regulator-max-microvolt = <950000>;
145			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
146		};
147
148		vreg_l7a_1p8: ldo7 {
149			regulator-name = "vreg_l7a_1p8";
150			regulator-min-microvolt = <1650000>;
151			regulator-max-microvolt = <2000000>;
152			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
153
154		};
155
156		vreg_l8a_0p91: ldo8 {
157			regulator-name = "vreg_l8a_0p91";
158			regulator-min-microvolt = <888000>;
159			regulator-max-microvolt = <925000>;
160			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
161		};
162
163		vreg_l9a_0p91: ldo9 {
164			regulator-name = "vreg_l9a_0p91";
165			regulator-min-microvolt = <312000>;
166			regulator-max-microvolt = <1304000>;
167			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
168		};
169
170		vreg_l10a_2p95: ldo10 {
171			regulator-name = "vreg_l10a_2p95";
172			regulator-min-microvolt = <2700000>;
173			regulator-max-microvolt = <3544000>;
174			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
175		};
176
177		vreg_l11a_0p91: ldo11 {
178			regulator-name = "vreg_l11a_0p91";
179			regulator-min-microvolt = <800000>;
180			regulator-max-microvolt = <1000000>;
181			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
182		};
183
184		vreg_l12a_1p8: ldo12 {
185			regulator-name = "vreg_l12a_1p8";
186			regulator-min-microvolt = <1504000>;
187			regulator-max-microvolt = <1504000>;
188			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
189		};
190
191		vreg_l14a_1p8: ldo14 {
192			regulator-name = "vreg_l14a_1p8";
193			regulator-min-microvolt = <1650000>;
194			regulator-max-microvolt = <1950000>;
195			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
196		};
197
198		vreg_l15a_1p8: ldo15 {
199			regulator-name = "vreg_l15a_1p8";
200			regulator-min-microvolt = <1504000>;
201			regulator-max-microvolt = <2000000>;
202			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
203		};
204
205		vreg_l16a_1p8: ldo16 {
206			regulator-name = "vreg_l16a_1p8";
207			regulator-min-microvolt = <1710000>;
208			regulator-max-microvolt = <1890000>;
209			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
210		};
211
212		vreg_l17a_3p3: ldo17 {
213			regulator-name = "vreg_l17a_3p3";
214			regulator-min-microvolt = <3000000>;
215			regulator-max-microvolt = <3544000>;
216			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
217		};
218
219		vreg_l18a_1p2: ldo18 {
220			regulator-name = "vreg_l18a_1p2";
221			regulator-min-microvolt = <312000>;
222			regulator-max-microvolt = <1304000>;
223			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
224		};
225	};
226};
227
228&pon {
229	mode-bootloader = <0x2>;
230	mode-recovery = <0x1>;
231};
232
233&qup_i2c1_data_clk {
234	drive-strength = <2>;
235	bias-pull-up;
236};
237
238&qup_i2c2_data_clk {
239	drive-strength = <2>;
240	bias-pull-up;
241};
242
243&qup_i2c3_data_clk {
244	drive-strength = <2>;
245	bias-pull-up;
246};
247
248&qup_i2c4_data_clk {
249	drive-strength = <2>;
250	bias-pull-up;
251};
252
253&qup_i2c5_data_clk {
254	drive-strength = <2>;
255	bias-pull-up;
256};
257
258&qup_i2c6_data_clk {
259	drive-strength = <2>;
260	bias-pull-up;
261};
262
263&qup_i2c9_data_clk {
264	drive-strength = <2>;
265	bias-pull-up;
266};
267
268&qup_i2c10_data_clk {
269	drive-strength = <2>;
270	bias-pull-up;
271};
272
273&qup_i2c11_data_clk {
274	drive-strength = <2>;
275	bias-pull-up;
276};
277
278&qup_i2c12_data_clk {
279	drive-strength = <2>;
280	bias-pull-up;
281};
282
283&qup_i2c13_data_clk {
284	drive-strength = <2>;
285	bias-pull-up;
286};
287
288&qup_i2c14_data_clk {
289	drive-strength = <2>;
290	bias-pull-up;
291};
292
293&qup_i2c15_data_clk {
294	drive-strength = <2>;
295	bias-pull-up;
296};
297
298&qup_spi1_cs {
299	drive-strength = <6>;
300	bias-disable;
301};
302
303&qup_spi1_data_clk {
304	drive-strength = <6>;
305	bias-disable;
306};
307
308&qup_spi2_cs {
309	drive-strength = <6>;
310	bias-disable;
311};
312
313&qup_spi2_data_clk {
314	drive-strength = <6>;
315	bias-disable;
316};
317
318&qup_spi3_cs {
319	drive-strength = <6>;
320	bias-disable;
321};
322
323&qup_spi3_data_clk {
324	drive-strength = <6>;
325	bias-disable;
326};
327
328&qup_spi4_cs {
329	drive-strength = <6>;
330	bias-disable;
331};
332
333&qup_spi4_data_clk {
334	drive-strength = <6>;
335	bias-disable;
336};
337
338&qup_spi5_cs {
339	drive-strength = <6>;
340	bias-disable;
341};
342
343&qup_spi5_data_clk {
344	drive-strength = <6>;
345	bias-disable;
346};
347
348&qup_spi6_cs {
349	drive-strength = <6>;
350	bias-disable;
351};
352
353&qup_spi6_data_clk {
354	drive-strength = <6>;
355	bias-disable;
356};
357
358&qup_spi9_cs {
359	drive-strength = <6>;
360	bias-disable;
361};
362
363&qup_spi9_data_clk {
364	drive-strength = <6>;
365	bias-disable;
366};
367
368&qup_spi10_cs {
369	drive-strength = <6>;
370	bias-disable;
371};
372
373&qup_spi10_data_clk {
374	drive-strength = <6>;
375	bias-disable;
376};
377
378&qup_spi11_cs {
379	drive-strength = <6>;
380	bias-disable;
381};
382
383&qup_spi11_data_clk {
384	drive-strength = <6>;
385	bias-disable;
386};
387
388&qup_spi12_cs {
389	drive-strength = <6>;
390	bias-disable;
391};
392
393&qup_spi12_data_clk {
394	drive-strength = <6>;
395	bias-disable;
396};
397
398&qup_spi13_cs {
399	drive-strength = <6>;
400	bias-disable;
401};
402
403&qup_spi13_data_clk {
404	drive-strength = <6>;
405	bias-disable;
406};
407
408&qup_spi14_cs {
409	drive-strength = <6>;
410	bias-disable;
411};
412
413&qup_spi14_data_clk {
414	drive-strength = <6>;
415	bias-disable;
416};
417
418&qup_spi15_cs {
419	drive-strength = <6>;
420	bias-disable;
421};
422
423&qup_spi15_data_clk {
424	drive-strength = <6>;
425	bias-disable;
426};
427
428&qup_uart7_rx {
429	drive-strength = <2>;
430	bias-disable;
431};
432
433&qup_uart7_tx {
434	drive-strength = <2>;
435	bias-disable;
436};
437
438&qupv3_id_0 {
439	status = "okay";
440};
441
442&reserved_memory {
443	ecc_meta_data_mem: ecc-meta-data@e0000000 {
444		reg = <0x0 0xe0000000 0x0 0x20000000>;
445		no-map;
446	};
447
448	harq_buffer_mem: harq-buffer@800000000 {
449		reg = <0x8 0x0 0x0 0x80000000>;
450		no-map;
451	};
452
453	tenx_sp_buffer_mem: tenx-sp-buffer@880000000 {
454		reg = <0x8 0x80000000 0x0 0x50000000>;
455		no-map;
456	};
457
458	fapi_buffer_mem: fapi-buffer@8d0000000 {
459		reg = <0x8 0xd0000000 0x0 0x20000000>;
460		no-map;
461	};
462};
463
464&sdhc {
465	pinctrl-0 = <&sdc_on_state>;
466	pinctrl-1 = <&sdc_off_state>;
467	pinctrl-names = "default", "sleep";
468
469	cap-mmc-hw-reset;
470	mmc-ddr-1_8v;
471	mmc-hs200-1_8v;
472	mmc-hs400-1_8v;
473	mmc-hs400-enhanced-strobe;
474
475	non-removable;
476	no-sd;
477	no-sdio;
478
479	supports-cqe;
480
481	vmmc-supply = <&vreg_l10a_2p95>;
482	vqmmc-supply = <&vreg_l7a_1p8>;
483
484	status = "okay";
485};
486
487&tlmm {
488	gpio-reserved-ranges = <28 2>;
489};
490
491&uart7 {
492	status = "okay";
493};
494
495&usb_1 {
496	status = "okay";
497};
498
499&usb_1_dwc3 {
500	dr_mode = "peripheral";
501};
502
503&usb_1_hsphy {
504	vdda-pll-supply = <&vreg_l8a_0p91>;
505	vdda18-supply = <&vreg_l14a_1p8>;
506	vdda33-supply = <&vreg_l2a_2p3>;
507
508	status = "okay";
509};
510
511&usb_1_qmpphy {
512	vdda-phy-supply = <&vreg_l8a_0p91>;
513	vdda-pll-supply = <&vreg_l3a_1p2>;
514
515	status = "okay";
516};
517