1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2023 Google LLC 4 */ 5/dts-v1/; 6#include "mt8188-geralt.dtsi" 7 8&aud_etdm_hp_on { 9 pins-mclk { 10 pinmux = <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>; 11 }; 12}; 13 14&aud_etdm_hp_off { 15 pins-mclk { 16 pinmux = <PINMUX_GPIO114__FUNC_B_GPIO114>; 17 bias-pull-down; 18 input-enable; 19 }; 20}; 21 22&i2c0 { 23 rt5682s: audio-codec@1a { 24 compatible = "realtek,rt5682s"; 25 reg = <0x1a>; 26 interrupts-extended = <&pio 108 IRQ_TYPE_EDGE_BOTH>; 27 pinctrl-names = "default"; 28 pinctrl-0 = <&audio_codec_pins>; 29 #sound-dai-cells = <1>; 30 31 AVDD-supply = <&mt6359_vio18_ldo_reg>; 32 DBVDD-supply = <&mt6359_vio18_ldo_reg>; 33 LDO1-IN-supply = <&mt6359_vio18_ldo_reg>; 34 MICVDD-supply = <&pp3300_s3>; 35 realtek,jd-src = <1>; 36 }; 37 38 max98390_38: amplifier@38 { 39 compatible = "maxim,max98390"; 40 reg = <0x38>; 41 sound-name-prefix = "Front Right"; 42 reset-gpios = <&pio 118 GPIO_ACTIVE_LOW>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&speaker_en>; 45 #sound-dai-cells = <0>; 46 }; 47 48 max98390_39: amplifier@39 { 49 compatible = "maxim,max98390"; 50 reg = <0x39>; 51 sound-name-prefix = "Front Left"; 52 #sound-dai-cells = <0>; 53 }; 54}; 55 56&i2c_tunnel { 57 /* 58 * The virtual battery I2C addr is 0xf on Ciri, so we describe it 59 * manually instead of including 'arm/cros-ec-sbs.dtsi'. 60 **/ 61 battery: sbs-battery@f { 62 compatible = "sbs,sbs-battery"; 63 reg = <0xf>; 64 sbs,i2c-retry-count = <2>; 65 sbs,poll-retry-count = <1>; 66 }; 67}; 68 69&mipi_tx_config0 { 70 drive-strength-microamp = <5200>; 71}; 72 73&mt6359_vm18_ldo_reg { 74 regulator-min-microvolt = <1800000>; 75 regulator-max-microvolt = <1900000>; 76 regulator-microvolt-offset = <100000>; 77}; 78 79&sound { 80 dai-link-0 { 81 link-name = "ETDM1_IN_BE"; 82 dai-format = "i2s"; 83 mediatek,clk-provider = "cpu"; 84 }; 85 86 dai-link-1 { 87 link-name = "ETDM1_OUT_BE"; 88 dai-format = "i2s"; 89 mediatek,clk-provider = "cpu"; 90 91 codec { 92 sound-dai = <&max98390_38>, 93 <&max98390_39>; 94 }; 95 }; 96 97 dai-link-2 { 98 link-name = "ETDM2_IN_BE"; 99 mediatek,clk-provider = "cpu"; 100 101 codec { 102 sound-dai = <&rt5682s 0>; 103 }; 104 }; 105 106 dai-link-3 { 107 link-name = "ETDM2_OUT_BE"; 108 mediatek,clk-provider = "cpu"; 109 110 codec { 111 sound-dai = <&rt5682s 0>; 112 }; 113 }; 114 115 dai-link-4 { 116 link-name = "DPTX_BE"; 117 118 codec { 119 sound-dai = <&dp_tx>; 120 }; 121 }; 122}; 123 124&pio { 125 gpio-line-names = 126 "GSC_AP_INT_ODL", 127 "AP_DISP_BKLTEN", 128 "", 129 "EN_PPVAR_MIPI_DISP", 130 "EN_PPVAR_MIPI_DISP_150MA", 131 "TCHSCR_RST_1V8_L", 132 "", 133 "", 134 "", 135 "", 136 "", 137 "I2S_SPKR_DATAOUT", 138 "EN_PP3300_WLAN_X", 139 "WIFI_KILL_1V8_L", 140 "BT_KILL_1V8_L", 141 "AP_FLASH_WP_L", /* ... is crossystem ABI. Rev1 schematics call it AP_WP_ODL. */ 142 "", 143 "", 144 "WCAM_PWDN_L", 145 "WCAM_RST_L", 146 "UCAM_PWDM_L", 147 "UCAM_RST_L", 148 "WCAM_24M_CLK", 149 "UCAM_24M_CLK", 150 "MT6319_INT", 151 "DISP_RST_1V8_L", 152 "DSIO_DSI_TE", 153 "", 154 "TP", 155 "MIPI_BL_PWM_1V8", 156 "", 157 "UART_AP_TX_GSC_RX", 158 "UART_GSC_TX_AP_RX", 159 "UART_SSPM_TX_DBGCON_RX", 160 "UART_DBGCON_TX_SSPM_RX", 161 "UART_ADSP_TX_DBGCON_RX", 162 "UART_DBGCON_TX_ADSP_RX", 163 "JTAG_AP_TMS", 164 "JTAG_AP_TCK", 165 "JTAG_AP_TDI", 166 "JTAG_AP_TDO", 167 "JTAG_AP_TRST", 168 "AP_KPCOL0", 169 "TP", 170 "", 171 "TP", 172 "EC_AP_HPD_OD", 173 "PCIE_WAKE_1V8_ODL", 174 "PCIE_RST_1V8_L", 175 "PCIE_CLKREQ_1V8_ODL", 176 "", 177 "", 178 "", 179 "", 180 "", 181 "AP_I2C_AUD_SCL_1V8", 182 "AP_I2C_AUD_SDA_1V8", 183 "AP_I2C_TPM_SCL_1V8", 184 "AP_I2C_TPM_SDA_1V8", 185 "AP_I2C_TCHSCR_SCL_1V8", 186 "AP_I2C_TCHSCR_SDA_1V8", 187 "AP_I2C_PMIC_SAR_SCL_1V8", 188 "AP_I2C_PMIC_SAR_SDA_1V8", 189 "AP_I2C_EC_HID_KB_SCL_1V8", 190 "AP_I2C_EC_HID_KB_SDA_1V8", 191 "AP_I2C_UCAM_SCL_1V8", 192 "AP_I2C_UCAM_SDA_1V8", 193 "AP_I2C_WCAM_SCL_1V8", 194 "AP_I2C_WCAM_SDA_1V8", 195 "SPI_AP_CS_EC_L", 196 "SPI_AP_CLK_EC", 197 "SPI_AP_DO_EC_DI", 198 "SPI_AP_DI_EC_DO", 199 "TP", 200 "TP", 201 "SPI_AP_CS_TCHSCR_L", 202 "SPI_AP_CLK_TCHSCR", 203 "SPI_AP_DO_TCHSCR_DI", 204 "SPI_AP_DI_TCHSCR_DO", 205 "TP", 206 "TP", 207 "TP", 208 "TP", 209 "", 210 "", 211 "", 212 "TP", 213 "", 214 "", 215 "", 216 "", 217 "", 218 "PWRAP_SPI_CS_L", 219 "PWRAP_SPI_CK", 220 "PWRAP_SPI_MOSI", 221 "PWRAP_SPI_MISO", 222 "SRCLKENA0", 223 "SRCLKENA1", 224 "SCP_VREQ_VAO", 225 "AP_RTC_CLK32K", 226 "AP_PMIC_WDTRST_L", 227 "AUD_CLK_MOSI", 228 "AUD_SYNC_MOSI", 229 "AUD_DAT_MOSI0", 230 "AUD_DAT_MOSI1", 231 "AUD_DAT_MISO0", 232 "AUD_DAT_MISO1", 233 "", 234 "HP_INT_ODL", 235 "SPKR_INT_ODL", 236 "I2S_HP_DATAIN", 237 "EN_SPKR", 238 "I2S_SPKR_MCLK", 239 "I2S_SPKR_BCLK", 240 "I2S_HP_MCLK", 241 "I2S_HP_BCLK", 242 "I2S_HP_LRCK", 243 "I2S_HP_DATAOUT", 244 "RST_SPKR_L", 245 "I2S_SPKR_LRCK", 246 "I2S_SPKR_DATAIN", 247 "", 248 "", 249 "", 250 "", 251 "SPI_AP_CLK_ROM", 252 "SPI_AP_CS_ROM_L", 253 "SPI_AP_DO_ROM_DI", 254 "SPI_AP_DI_ROM_DO", 255 "TP", 256 "TP", 257 "", 258 "", 259 "", 260 "", 261 "", 262 "", 263 "", 264 "", 265 "EN_PP2800A_UCAM_X", 266 "EN_PP1200_UCAM_X", 267 "EN_PP2800A_WCAM_X", 268 "EN_PP1100_WCAM_X", 269 "TCHSCR_INT_1V8_L", 270 "", 271 "MT7921_PMU_EN_1V8", 272 "", 273 "AP_EC_WARM_RST_REQ", 274 "EC_AP_HID_INT_ODL", 275 "EC_AP_INT_ODL", 276 "AP_XHCI_INIT_DONE", 277 "EMMC_DAT7", 278 "EMMC_DAT6", 279 "EMMC_DAT5", 280 "EMMC_DAT4", 281 "EMMC_RST_L", 282 "EMMC_CMD", 283 "EMMC_CLK", 284 "EMMC_DAT3", 285 "EMMC_DAT2", 286 "EMMC_DAT1", 287 "EMMC_DAT0", 288 "EMMC_DSL", 289 "", 290 "", 291 "", 292 "", 293 "", 294 "", 295 "", 296 "", 297 "USB3_HUB_RST_L", 298 "EC_AP_RSVD0_ODL", 299 "", 300 "", 301 "SPMI_SCL", 302 "SPMI_SDA"; 303 304 audio_codec_pins: audio-codec-pins { 305 pins-hp-int-odl { 306 pinmux = <PINMUX_GPIO108__FUNC_B_GPIO108>; 307 input-enable; 308 }; 309 }; 310 311 speaker_en: speaker-en-pins { 312 pins-en-spkr { 313 pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>; 314 }; 315 }; 316}; 317