1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <[email protected]>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12	model = "MediaTek MT8173 evaluation board";
13	chassis-type = "embedded";
14	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
15
16	aliases {
17		serial0 = &uart0;
18		serial1 = &uart1;
19		serial2 = &uart2;
20		serial3 = &uart3;
21	};
22
23	memory@40000000 {
24		device_type = "memory";
25		reg = <0 0x40000000 0 0x80000000>;
26	};
27
28	chosen { };
29
30	connector {
31		compatible = "hdmi-connector";
32		label = "hdmi";
33		type = "d";
34
35		port {
36			hdmi_connector_in: endpoint {
37				remote-endpoint = <&hdmi0_out>;
38			};
39		};
40	};
41
42	extcon_usb: extcon_iddig {
43		compatible = "linux,extcon-usb-gpio";
44		id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
45	};
46
47	usb_p1_vbus: regulator-usb-p1 {
48		compatible = "regulator-fixed";
49		regulator-name = "usb_vbus";
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
53		enable-active-high;
54	};
55
56	usb_p0_vbus: regulator-usb-p0 {
57		compatible = "regulator-fixed";
58		regulator-name = "vbus";
59		regulator-min-microvolt = <5000000>;
60		regulator-max-microvolt = <5000000>;
61		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
62		enable-active-high;
63	};
64};
65
66&mfg_async {
67	domain-supply = <&da9211_vgpu_reg>;
68};
69
70&cec {
71	status = "okay";
72};
73
74&cpu0 {
75	proc-supply = <&mt6397_vpca15_reg>;
76};
77
78&cpu1 {
79	proc-supply = <&mt6397_vpca15_reg>;
80};
81
82&cpu2 {
83	proc-supply = <&da9211_vcpu_reg>;
84	sram-supply = <&mt6397_vsramca7_reg>;
85};
86
87&cpu3 {
88	proc-supply = <&da9211_vcpu_reg>;
89	sram-supply = <&mt6397_vsramca7_reg>;
90};
91
92&dpi0 {
93	status = "okay";
94};
95
96&hdmi_phy {
97	status = "okay";
98};
99
100&hdmi0 {
101	status = "okay";
102
103	ports {
104		port@1 {
105			reg = <1>;
106
107			hdmi0_out: endpoint {
108				remote-endpoint = <&hdmi_connector_in>;
109			};
110		};
111	};
112};
113
114&i2c1 {
115	status = "okay";
116
117	buck: da9211@68 {
118		compatible = "dlg,da9211";
119		reg = <0x68>;
120
121		regulators {
122			da9211_vcpu_reg: BUCKA {
123				regulator-name = "VBUCKA";
124				regulator-min-microvolt = < 700000>;
125				regulator-max-microvolt = <1310000>;
126				regulator-min-microamp = <2000000>;
127				regulator-max-microamp = <4400000>;
128				regulator-ramp-delay = <10000>;
129				regulator-always-on;
130			};
131
132			da9211_vgpu_reg: BUCKB {
133				regulator-name = "VBUCKB";
134				regulator-min-microvolt = < 700000>;
135				regulator-max-microvolt = <1310000>;
136				regulator-min-microamp = <2000000>;
137				regulator-max-microamp = <3000000>;
138				regulator-ramp-delay = <10000>;
139			};
140		};
141	};
142};
143
144&mmc0 {
145	status = "okay";
146	pinctrl-names = "default", "state_uhs";
147	pinctrl-0 = <&mmc0_pins_default>;
148	pinctrl-1 = <&mmc0_pins_uhs>;
149	bus-width = <8>;
150	max-frequency = <50000000>;
151	cap-mmc-highspeed;
152	mediatek,hs200-cmd-int-delay = <26>;
153	mediatek,hs400-cmd-int-delay = <14>;
154	mediatek,hs400-cmd-resp-sel-rising;
155	vmmc-supply = <&mt6397_vemc_3v3_reg>;
156	vqmmc-supply = <&mt6397_vio18_reg>;
157	non-removable;
158};
159
160&mmc1 {
161	status = "okay";
162	pinctrl-names = "default", "state_uhs";
163	pinctrl-0 = <&mmc1_pins_default>;
164	pinctrl-1 = <&mmc1_pins_uhs>;
165	bus-width = <4>;
166	max-frequency = <50000000>;
167	cap-sd-highspeed;
168	sd-uhs-sdr25;
169	cd-gpios = <&pio 132 0>;
170	vmmc-supply = <&mt6397_vmch_reg>;
171	vqmmc-supply = <&mt6397_vmc_reg>;
172};
173
174&pio {
175	disp_pwm0_pins: disp_pwm0_pins {
176		pins1 {
177			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
178			output-low;
179		};
180	};
181
182	mmc0_pins_default: mmc0default {
183		pins_cmd_dat {
184			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
185				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
186				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
187				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
188				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
189				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
190				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
191				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
192				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
193			input-enable;
194			bias-pull-up;
195		};
196
197		pins_clk {
198			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
199			bias-pull-down;
200		};
201
202		pins_rst {
203			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
204			bias-pull-up;
205		};
206	};
207
208	mmc1_pins_default: mmc1default {
209		pins_cmd_dat {
210			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
211				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
212				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
213				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
214				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
215			input-enable;
216			drive-strength = <4>;
217			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
218		};
219
220		pins_clk {
221			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
222			bias-pull-down;
223			drive-strength = <4>;
224		};
225
226		pins_insert {
227			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
228			bias-pull-up;
229		};
230	};
231
232	mmc0_pins_uhs: mmc0 {
233		pins_cmd_dat {
234			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
235				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
236				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
237				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
238				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
239				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
240				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
241				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
242				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
243			input-enable;
244			drive-strength = <2>;
245			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
246		};
247
248		pins_clk {
249			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
250			drive-strength = <2>;
251			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
252		};
253
254		pins_rst {
255			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
256			bias-pull-up;
257		};
258	};
259
260	mmc1_pins_uhs: mmc1 {
261		pins_cmd_dat {
262			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
263				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
264				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
265				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
266				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
267			input-enable;
268			drive-strength = <4>;
269			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
270		};
271
272		pins_clk {
273			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
274			drive-strength = <4>;
275			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
276		};
277	};
278
279	usb_id_pins_float: usb_iddig_pull_up {
280		pins_iddig {
281			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
282			bias-pull-up;
283		};
284	};
285
286	usb_id_pins_ground: usb_iddig_pull_down {
287		pins_iddig {
288			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
289			bias-pull-down;
290		};
291	};
292};
293
294&pwm0 {
295	pinctrl-names = "default";
296	pinctrl-0 = <&disp_pwm0_pins>;
297	status = "okay";
298};
299
300&pwrap {
301	/* Only MT8173 E1 needs USB power domain */
302	power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
303
304	pmic: pmic {
305		compatible = "mediatek,mt6397";
306		interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_HIGH>;
307		interrupt-controller;
308		#interrupt-cells = <2>;
309
310		regulators {
311			compatible = "mediatek,mt6397-regulator";
312
313			mt6397_vpca15_reg: buck_vpca15 {
314				regulator-name = "vpca15";
315				regulator-min-microvolt = < 700000>;
316				regulator-max-microvolt = <1350000>;
317				regulator-ramp-delay = <12500>;
318				regulator-always-on;
319			};
320
321			mt6397_vpca7_reg: buck_vpca7 {
322				regulator-name = "vpca7";
323				regulator-min-microvolt = < 700000>;
324				regulator-max-microvolt = <1350000>;
325				regulator-ramp-delay = <12500>;
326				regulator-enable-ramp-delay = <115>;
327			};
328
329			mt6397_vsramca15_reg: buck_vsramca15 {
330				regulator-name = "vsramca15";
331				regulator-min-microvolt = < 700000>;
332				regulator-max-microvolt = <1350000>;
333				regulator-ramp-delay = <12500>;
334				regulator-always-on;
335			};
336
337			mt6397_vsramca7_reg: buck_vsramca7 {
338				regulator-name = "vsramca7";
339				regulator-min-microvolt = < 700000>;
340				regulator-max-microvolt = <1350000>;
341				regulator-ramp-delay = <12500>;
342				regulator-always-on;
343			};
344
345			mt6397_vcore_reg: buck_vcore {
346				regulator-name = "vcore";
347				regulator-min-microvolt = < 700000>;
348				regulator-max-microvolt = <1350000>;
349				regulator-ramp-delay = <12500>;
350				regulator-always-on;
351			};
352
353			mt6397_vgpu_reg: buck_vgpu {
354				regulator-name = "vgpu";
355				regulator-min-microvolt = < 700000>;
356				regulator-max-microvolt = <1350000>;
357				regulator-ramp-delay = <12500>;
358				regulator-enable-ramp-delay = <115>;
359			};
360
361			mt6397_vdrm_reg: buck_vdrm {
362				regulator-name = "vdrm";
363				regulator-min-microvolt = <1200000>;
364				regulator-max-microvolt = <1400000>;
365				regulator-ramp-delay = <12500>;
366				regulator-always-on;
367			};
368
369			mt6397_vio18_reg: buck_vio18 {
370				regulator-name = "vio18";
371				regulator-min-microvolt = <1620000>;
372				regulator-max-microvolt = <1980000>;
373				regulator-ramp-delay = <12500>;
374				regulator-always-on;
375			};
376
377			mt6397_vtcxo_reg: ldo_vtcxo {
378				regulator-name = "vtcxo";
379				regulator-always-on;
380			};
381
382			mt6397_va28_reg: ldo_va28 {
383				regulator-name = "va28";
384				regulator-always-on;
385			};
386
387			mt6397_vcama_reg: ldo_vcama {
388				regulator-name = "vcama";
389				regulator-min-microvolt = <1500000>;
390				regulator-max-microvolt = <2800000>;
391				regulator-enable-ramp-delay = <218>;
392			};
393
394			mt6397_vio28_reg: ldo_vio28 {
395				regulator-name = "vio28";
396				regulator-always-on;
397			};
398
399			mt6397_vusb_reg: ldo_vusb {
400				regulator-name = "vusb";
401			};
402
403			mt6397_vmc_reg: ldo_vmc {
404				regulator-name = "vmc";
405				regulator-min-microvolt = <1800000>;
406				regulator-max-microvolt = <3300000>;
407				regulator-enable-ramp-delay = <218>;
408			};
409
410			mt6397_vmch_reg: ldo_vmch {
411				regulator-name = "vmch";
412				regulator-min-microvolt = <3000000>;
413				regulator-max-microvolt = <3300000>;
414				regulator-enable-ramp-delay = <218>;
415			};
416
417			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
418				regulator-name = "vemc_3v3";
419				regulator-min-microvolt = <3000000>;
420				regulator-max-microvolt = <3300000>;
421				regulator-enable-ramp-delay = <218>;
422			};
423
424			mt6397_vgp1_reg: ldo_vgp1 {
425				regulator-name = "vcamd";
426				regulator-min-microvolt = <1220000>;
427				regulator-max-microvolt = <3300000>;
428				regulator-enable-ramp-delay = <240>;
429			};
430
431			mt6397_vgp2_reg: ldo_vgp2 {
432				regulator-name = "vcamio";
433				regulator-min-microvolt = <1000000>;
434				regulator-max-microvolt = <3300000>;
435				regulator-enable-ramp-delay = <218>;
436			};
437
438			mt6397_vgp3_reg: ldo_vgp3 {
439				regulator-name = "vcamaf";
440				regulator-min-microvolt = <1200000>;
441				regulator-max-microvolt = <3300000>;
442				regulator-enable-ramp-delay = <218>;
443			};
444
445			mt6397_vgp4_reg: ldo_vgp4 {
446				regulator-name = "vgp4";
447				regulator-min-microvolt = <1200000>;
448				regulator-max-microvolt = <3300000>;
449				regulator-enable-ramp-delay = <218>;
450			};
451
452			mt6397_vgp5_reg: ldo_vgp5 {
453				regulator-name = "vgp5";
454				regulator-min-microvolt = <1200000>;
455				regulator-max-microvolt = <3000000>;
456				regulator-enable-ramp-delay = <218>;
457			};
458
459			mt6397_vgp6_reg: ldo_vgp6 {
460				regulator-name = "vgp6";
461				regulator-min-microvolt = <1200000>;
462				regulator-max-microvolt = <3300000>;
463				regulator-enable-ramp-delay = <218>;
464			};
465
466			mt6397_vibr_reg: ldo_vibr {
467				regulator-name = "vibr";
468				regulator-min-microvolt = <1300000>;
469				regulator-max-microvolt = <3300000>;
470				regulator-enable-ramp-delay = <218>;
471			};
472		};
473	};
474};
475
476&pio {
477	spi_pins_a: spi0 {
478		pins_spi {
479			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
480				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
481				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
482				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
483		};
484	};
485};
486
487&spi {
488	pinctrl-names = "default";
489	pinctrl-0 = <&spi_pins_a>;
490	mediatek,pad-select = <0>;
491	status = "okay";
492};
493
494&ssusb {
495	vusb33-supply = <&mt6397_vusb_reg>;
496	vbus-supply = <&usb_p0_vbus>;
497	extcon = <&extcon_usb>;
498	dr_mode = "otg";
499	wakeup-source;
500	pinctrl-names = "default";
501	pinctrl-0 = <&usb_id_pins_float>;
502	status = "okay";
503};
504
505&uart0 {
506	status = "okay";
507};
508
509&usb_host {
510	vusb33-supply = <&mt6397_vusb_reg>;
511	vbus-supply = <&usb_p1_vbus>;
512	status = "okay";
513};
514