1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Samsung's Exynos 9810 SoC pin-mux and pin-config device tree source
4 *
5 * Copyright (c) 2024 Markuss Broks <[email protected]>
6 * Copyright (c) 2024 Maksym Holovach <[email protected]>
7 */
8
9#include "exynos-pinctrl.h"
10
11&pinctrl_alive {
12	etc1: etc1-gpio-bank {
13		gpio-controller;
14		#gpio-cells = <2>;
15
16		interrupt-controller;
17		#interrupt-cells = <2>;
18	};
19
20	gpa0: gpa0-gpio-bank {
21		gpio-controller;
22		#gpio-cells = <2>;
23
24		interrupt-controller;
25		interrupt-parent = <&gic>;
26		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
27			     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
28			     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
29			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
30			     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
31			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
32			     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
33			     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
34		#interrupt-cells = <2>;
35	};
36
37	gpa1: gpa1-gpio-bank {
38		gpio-controller;
39		#gpio-cells = <2>;
40
41		interrupt-controller;
42		interrupt-parent = <&gic>;
43		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
44			     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
45			     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
46			     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
47			     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
48			     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
49			     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
50			     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
51		#interrupt-cells = <2>;
52	};
53
54	gpa2: gpa2-gpio-bank {
55		gpio-controller;
56		#gpio-cells = <2>;
57
58		interrupt-controller;
59		interrupt-parent = <&gic>;
60		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
61			     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
62			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
63			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
64			     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
65			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
66			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
67			     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
68		#interrupt-cells = <2>;
69	};
70
71	gpa3: gpa3-gpio-bank {
72		gpio-controller;
73		#gpio-cells = <2>;
74
75		interrupt-controller;
76		interrupt-parent = <&gic>;
77		interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
78			     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
79			     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
80			     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
81			     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
82			     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
83			     <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
84			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
85		#interrupt-cells = <2>;
86	};
87
88	gpa4: gpa4-gpio-bank {
89		gpio-controller;
90		#gpio-cells = <2>;
91
92		interrupt-controller;
93		#interrupt-cells = <2>;
94	};
95
96	gpq0: gpq0-gpio-bank {
97		gpio-controller;
98		#gpio-cells = <2>;
99
100		interrupt-controller;
101		#interrupt-cells = <2>;
102	};
103};
104
105&pinctrl_aud {
106	gpb0: gpb0-gpio-bank {
107		gpio-controller;
108		#gpio-cells = <2>;
109
110		interrupt-controller;
111		#interrupt-cells = <2>;
112	};
113
114	gpb1: gpb1-gpio-bank {
115		gpio-controller;
116		#gpio-cells = <2>;
117
118		interrupt-controller;
119		#interrupt-cells = <2>;
120	};
121
122	gpb2: gpb2-gpio-bank {
123		gpio-controller;
124		#gpio-cells = <2>;
125
126		interrupt-controller;
127		#interrupt-cells = <2>;
128	};
129};
130
131&pinctrl_chub {
132	gph0: gph0-gpio-bank {
133		gpio-controller;
134		#gpio-cells = <2>;
135
136		interrupt-controller;
137		#interrupt-cells = <2>;
138	};
139
140	gph1: gph1-gpio-bank {
141		gpio-controller;
142		#gpio-cells = <2>;
143
144		interrupt-controller;
145		#interrupt-cells = <2>;
146	};
147};
148
149&pinctrl_cmgp {
150	gpm0: gpm0-gpio-bank {
151		gpio-controller;
152		#gpio-cells = <2>;
153
154		interrupt-controller;
155		#interrupt-cells = <2>;
156
157		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
158	};
159
160	gpm1: gpm1-gpio-bank {
161		gpio-controller;
162		#gpio-cells = <2>;
163
164		interrupt-controller;
165		#interrupt-cells = <2>;
166
167		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
168	};
169
170	gpm2: gpm2-gpio-bank {
171		gpio-controller;
172		#gpio-cells = <2>;
173
174		interrupt-controller;
175		#interrupt-cells = <2>;
176
177		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
178	};
179
180	gpm3: gpm3-gpio-bank {
181		gpio-controller;
182		#gpio-cells = <2>;
183
184		interrupt-controller;
185		#interrupt-cells = <2>;
186
187		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
188	};
189
190	gpm4: gpm4-gpio-bank {
191		gpio-controller;
192		#gpio-cells = <2>;
193
194		interrupt-controller;
195		#interrupt-cells = <2>;
196
197		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
198	};
199
200	gpm5: gpm5-gpio-bank {
201		gpio-controller;
202		#gpio-cells = <2>;
203
204		interrupt-controller;
205		#interrupt-cells = <2>;
206
207		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
208	};
209
210	gpm6: gpm6-gpio-bank {
211		gpio-controller;
212		#gpio-cells = <2>;
213
214		interrupt-controller;
215		#interrupt-cells = <2>;
216
217		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
218	};
219
220	gpm7: gpm7-gpio-bank {
221		gpio-controller;
222		#gpio-cells = <2>;
223
224		interrupt-controller;
225		#interrupt-cells = <2>;
226
227		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
228	};
229
230	gpm10: gpm10-gpio-bank {
231		gpio-controller;
232		#gpio-cells = <2>;
233
234		interrupt-controller;
235		#interrupt-cells = <2>;
236
237		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
238	};
239
240	gpm11: gpm11-gpio-bank {
241		gpio-controller;
242		#gpio-cells = <2>;
243
244		interrupt-controller;
245		#interrupt-cells = <2>;
246
247		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
248	};
249
250	gpm12: gpm12-gpio-bank {
251		gpio-controller;
252		#gpio-cells = <2>;
253
254		interrupt-controller;
255		#interrupt-cells = <2>;
256
257		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
258	};
259
260	gpm13: gpm13-gpio-bank {
261		gpio-controller;
262		#gpio-cells = <2>;
263
264		interrupt-controller;
265		#interrupt-cells = <2>;
266
267		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
268	};
269
270	gpm14: gpm14-gpio-bank {
271		gpio-controller;
272		#gpio-cells = <2>;
273
274		interrupt-controller;
275		#interrupt-cells = <2>;
276
277		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
278	};
279
280	gpm15: gpm15-gpio-bank {
281		gpio-controller;
282		#gpio-cells = <2>;
283
284		interrupt-controller;
285		#interrupt-cells = <2>;
286
287		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
288	};
289
290	gpm16: gpm16-gpio-bank {
291		gpio-controller;
292		#gpio-cells = <2>;
293
294		interrupt-controller;
295		#interrupt-cells = <2>;
296
297		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
298	};
299
300	gpm17: gpm17-gpio-bank {
301		gpio-controller;
302		#gpio-cells = <2>;
303
304		interrupt-controller;
305		#interrupt-cells = <2>;
306
307		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
308	};
309
310	gpm40: gpm40-gpio-bank {
311		gpio-controller;
312		#gpio-cells = <2>;
313
314		interrupt-controller;
315		#interrupt-cells = <2>;
316
317		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
318	};
319
320	gpm41: gpm41-gpio-bank {
321		gpio-controller;
322		#gpio-cells = <2>;
323
324		interrupt-controller;
325		#interrupt-cells = <2>;
326
327		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
328	};
329
330	gpm42: gpm42-gpio-bank {
331		gpio-controller;
332		#gpio-cells = <2>;
333
334		interrupt-controller;
335		#interrupt-cells = <2>;
336
337		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
338	};
339
340	gpm43: gpm43-gpio-bank {
341		gpio-controller;
342		#gpio-cells = <2>;
343
344		interrupt-controller;
345		#interrupt-cells = <2>;
346
347		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
348	};
349};
350
351&pinctrl_fsys0 {
352	gpf0: gpf0-gpio-bank {
353		gpio-controller;
354		#gpio-cells = <2>;
355
356		interrupt-controller;
357		#interrupt-cells = <2>;
358	};
359};
360
361&pinctrl_fsys1 {
362	gpf1: gpf1-gpio-bank {
363		gpio-controller;
364		#gpio-cells = <2>;
365
366		interrupt-controller;
367		#interrupt-cells = <2>;
368	};
369
370	gpf2: gpf2-gpio-bank {
371		gpio-controller;
372		#gpio-cells = <2>;
373
374		interrupt-controller;
375		#interrupt-cells = <2>;
376	};
377};
378
379&pinctrl_peric0 {
380	gpg0: gpg0-gpio-bank {
381		gpio-controller;
382		#gpio-cells = <2>;
383
384		interrupt-controller;
385		#interrupt-cells = <2>;
386	};
387
388	gpg1: gpg1-gpio-bank {
389		gpio-controller;
390		#gpio-cells = <2>;
391
392		interrupt-controller;
393		#interrupt-cells = <2>;
394	};
395
396	gpg2: gpg2-gpio-bank {
397		gpio-controller;
398		#gpio-cells = <2>;
399
400		interrupt-controller;
401		#interrupt-cells = <2>;
402	};
403
404	gpp0: gpp0-gpio-bank {
405		gpio-controller;
406		#gpio-cells = <2>;
407
408		interrupt-controller;
409		#interrupt-cells = <2>;
410	};
411
412	gpp1: gpp1-gpio-bank {
413		gpio-controller;
414		#gpio-cells = <2>;
415
416		interrupt-controller;
417		#interrupt-cells = <2>;
418	};
419
420	gpp2: gpp2-gpio-bank {
421		gpio-controller;
422		#gpio-cells = <2>;
423
424		interrupt-controller;
425		#interrupt-cells = <2>;
426	};
427
428	gpp3: gpp3-gpio-bank {
429		gpio-controller;
430		#gpio-cells = <2>;
431
432		interrupt-controller;
433		#interrupt-cells = <2>;
434	};
435};
436
437&pinctrl_peric1 {
438	gpc0: gpc0-gpio-bank {
439		gpio-controller;
440		#gpio-cells = <2>;
441
442		interrupt-controller;
443		#interrupt-cells = <2>;
444	};
445
446	gpc1: gpc1-gpio-bank {
447		gpio-controller;
448		#gpio-cells = <2>;
449
450		interrupt-controller;
451		#interrupt-cells = <2>;
452	};
453
454	gpd0: gpd0-gpio-bank {
455		gpio-controller;
456		#gpio-cells = <2>;
457
458		interrupt-controller;
459		#interrupt-cells = <2>;
460	};
461
462	gpg3: gpg3-gpio-bank {
463		gpio-controller;
464		#gpio-cells = <2>;
465
466		interrupt-controller;
467		#interrupt-cells = <2>;
468	};
469
470	gpp4: gpp4-gpio-bank {
471		gpio-controller;
472		#gpio-cells = <2>;
473
474		interrupt-controller;
475		#interrupt-cells = <2>;
476	};
477
478	gpp5: gpp5-gpio-bank {
479		gpio-controller;
480		#gpio-cells = <2>;
481
482		interrupt-controller;
483		#interrupt-cells = <2>;
484	};
485
486	gpp6: gpp6-gpio-bank {
487		gpio-controller;
488		#gpio-cells = <2>;
489
490		interrupt-controller;
491		#interrupt-cells = <2>;
492	};
493};
494
495&pinctrl_vts {
496	gpt0: gpt0-gpio-bank {
497		gpio-controller;
498		#gpio-cells = <2>;
499
500		interrupt-controller;
501		#interrupt-cells = <2>;
502	};
503};
504