1&l4_wkup { /* 0x44c00000 */ 2 compatible = "ti,am4-l4-wkup", "simple-pm-bus"; 3 power-domains = <&prm_wkup>; 4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>; 5 clock-names = "fck"; 6 reg = <0x44c00000 0x800>, 7 <0x44c00800 0x800>, 8 <0x44c01000 0x400>, 9 <0x44c01400 0x400>; 10 reg-names = "ap", "la", "ia0", "ia1"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 16 17 segment@0 { /* 0x44c00000 */ 18 compatible = "simple-pm-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 21 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 22 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 23 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 24 <0x00001400 0x00001400 0x000400>; /* ap 3 */ 25 }; 26 27 segment@100000 { /* 0x44d00000 */ 28 compatible = "simple-pm-bus"; 29 #address-cells = <1>; 30 #size-cells = <1>; 31 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */ 32 <0x00004000 0x00104000 0x001000>, /* ap 5 */ 33 <0x00080000 0x00180000 0x002000>, /* ap 6 */ 34 <0x00082000 0x00182000 0x001000>, /* ap 7 */ 35 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */ 36 37 target-module@0 { /* 0x44d00000, ap 4 28.0 */ 38 compatible = "ti,sysc-omap4", "ti,sysc"; 39 reg = <0x0 0x4>; 40 reg-names = "rev"; 41 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>; 42 clock-names = "fck"; 43 #address-cells = <1>; 44 #size-cells = <1>; 45 ranges = <0x00000000 0x00000000 0x4000>, 46 <0x00080000 0x00080000 0x2000>; 47 48 wkup_m3: cpu@0 { 49 compatible = "ti,am4372-wkup-m3"; 50 reg = <0x00000000 0x4000>, 51 <0x00080000 0x2000>; 52 reg-names = "umem", "dmem"; 53 resets = <&prm_wkup 3>; 54 reset-names = "rstctrl"; 55 ti,pm-firmware = "am335x-pm-firmware.elf"; 56 }; 57 }; 58 59 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */ 60 compatible = "ti,sysc-omap4", "ti,sysc"; 61 reg = <0xf0000 0x4>; 62 reg-names = "rev"; 63 #address-cells = <1>; 64 #size-cells = <1>; 65 ranges = <0x0 0xf0000 0x10000>; 66 67 prcm: prcm@0 { 68 compatible = "ti,am4-prcm", "simple-bus"; 69 reg = <0x0 0x11000>; 70 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges = <0 0 0x11000>; 74 75 prcm_clocks: clocks { 76 #address-cells = <1>; 77 #size-cells = <0>; 78 }; 79 80 prcm_clockdomains: clockdomains { 81 }; 82 }; 83 }; 84 }; 85 86 segment@200000 { /* 0x44e00000 */ 87 compatible = "simple-pm-bus"; 88 #address-cells = <1>; 89 #size-cells = <1>; 90 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */ 91 <0x00003000 0x00203000 0x001000>, /* ap 10 */ 92 <0x00004000 0x00204000 0x001000>, /* ap 11 */ 93 <0x00005000 0x00205000 0x001000>, /* ap 12 */ 94 <0x00006000 0x00206000 0x001000>, /* ap 13 */ 95 <0x00007000 0x00207000 0x001000>, /* ap 14 */ 96 <0x00008000 0x00208000 0x001000>, /* ap 15 */ 97 <0x00009000 0x00209000 0x001000>, /* ap 16 */ 98 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */ 99 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */ 100 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */ 101 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */ 102 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */ 103 <0x00010000 0x00210000 0x010000>, /* ap 22 */ 104 <0x00030000 0x00230000 0x001000>, /* ap 23 */ 105 <0x00031000 0x00231000 0x001000>, /* ap 24 */ 106 <0x00032000 0x00232000 0x001000>, /* ap 25 */ 107 <0x00033000 0x00233000 0x001000>, /* ap 26 */ 108 <0x00034000 0x00234000 0x001000>, /* ap 27 */ 109 <0x00035000 0x00235000 0x001000>, /* ap 28 */ 110 <0x00036000 0x00236000 0x001000>, /* ap 29 */ 111 <0x00037000 0x00237000 0x001000>, /* ap 30 */ 112 <0x00038000 0x00238000 0x001000>, /* ap 31 */ 113 <0x00039000 0x00239000 0x001000>, /* ap 32 */ 114 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */ 115 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */ 116 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */ 117 <0x00040000 0x00240000 0x040000>, /* ap 36 */ 118 <0x00080000 0x00280000 0x001000>, /* ap 37 */ 119 <0x00088000 0x00288000 0x008000>, /* ap 38 */ 120 <0x00092000 0x00292000 0x001000>, /* ap 39 */ 121 <0x00086000 0x00286000 0x001000>, /* ap 40 */ 122 <0x00087000 0x00287000 0x001000>, /* ap 41 */ 123 <0x00090000 0x00290000 0x001000>, /* ap 42 */ 124 <0x00091000 0x00291000 0x001000>; /* ap 43 */ 125 126 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */ 127 compatible = "ti,sysc"; 128 status = "disabled"; 129 #address-cells = <1>; 130 #size-cells = <1>; 131 ranges = <0x0 0x3000 0x1000>; 132 }; 133 134 target-module@5000 { /* 0x44e05000, ap 12 30.0 */ 135 compatible = "ti,sysc"; 136 status = "disabled"; 137 #address-cells = <1>; 138 #size-cells = <1>; 139 ranges = <0x0 0x5000 0x1000>; 140 }; 141 142 target-module@7000 { /* 0x44e07000, ap 14 20.0 */ 143 compatible = "ti,sysc-omap2", "ti,sysc"; 144 reg = <0x7000 0x4>, 145 <0x7010 0x4>, 146 <0x7114 0x4>; 147 reg-names = "rev", "sysc", "syss"; 148 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 149 SYSC_OMAP2_SOFTRESET | 150 SYSC_OMAP2_AUTOIDLE)>; 151 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 152 <SYSC_IDLE_NO>, 153 <SYSC_IDLE_SMART>, 154 <SYSC_IDLE_SMART_WKUP>; 155 ti,syss-mask = <1>; 156 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 157 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>, 158 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>; 159 clock-names = "fck", "dbclk"; 160 #address-cells = <1>; 161 #size-cells = <1>; 162 ranges = <0x0 0x7000 0x1000>; 163 164 gpio0: gpio@0 { 165 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 166 reg = <0x0 0x1000>; 167 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 168 gpio-controller; 169 #gpio-cells = <2>; 170 interrupt-controller; 171 #interrupt-cells = <2>; 172 status = "disabled"; 173 }; 174 }; 175 176 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ 177 compatible = "ti,sysc-omap2", "ti,sysc"; 178 reg = <0x9050 0x4>, 179 <0x9054 0x4>, 180 <0x9058 0x4>; 181 reg-names = "rev", "sysc", "syss"; 182 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 183 SYSC_OMAP2_SOFTRESET)>; 184 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 185 <SYSC_IDLE_NO>, 186 <SYSC_IDLE_SMART>, 187 <SYSC_IDLE_SMART_WKUP>; 188 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 189 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>; 190 clock-names = "fck"; 191 #address-cells = <1>; 192 #size-cells = <1>; 193 ranges = <0x0 0x9000 0x1000>; 194 195 uart0: serial@0 { 196 compatible = "ti,am4372-uart"; 197 reg = <0x0 0x2000>; 198 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 199 }; 200 }; 201 202 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ 203 compatible = "ti,sysc-omap2", "ti,sysc"; 204 reg = <0xb000 0x8>, 205 <0xb010 0x8>, 206 <0xb090 0x8>; 207 reg-names = "rev", "sysc", "syss"; 208 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 209 SYSC_OMAP2_ENAWAKEUP | 210 SYSC_OMAP2_SOFTRESET | 211 SYSC_OMAP2_AUTOIDLE)>; 212 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 213 <SYSC_IDLE_NO>, 214 <SYSC_IDLE_SMART>, 215 <SYSC_IDLE_SMART_WKUP>; 216 ti,syss-mask = <1>; 217 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 218 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>; 219 clock-names = "fck"; 220 #address-cells = <1>; 221 #size-cells = <1>; 222 ranges = <0x0 0xb000 0x1000>; 223 224 i2c0: i2c@0 { 225 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 226 reg = <0x0 0x1000>; 227 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 status = "disabled"; 231 }; 232 }; 233 234 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ 235 compatible = "ti,sysc-omap4", "ti,sysc"; 236 reg = <0xd000 0x4>, 237 <0xd010 0x4>; 238 reg-names = "rev", "sysc"; 239 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 240 <SYSC_IDLE_NO>, 241 <SYSC_IDLE_SMART>, 242 <SYSC_IDLE_SMART_WKUP>; 243 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */ 244 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>; 245 clock-names = "fck"; 246 #address-cells = <1>; 247 #size-cells = <1>; 248 ranges = <0x0 0xd000 0x1000>; 249 250 tscadc: tscadc@0 { 251 compatible = "ti,am3359-tscadc"; 252 reg = <0x0 0x1000>; 253 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 254 clocks = <&adc_tsc_fck>; 255 clock-names = "fck"; 256 status = "disabled"; 257 dmas = <&edma 53 0>, <&edma 57 0>; 258 dma-names = "fifo0", "fifo1"; 259 260 tsc { 261 compatible = "ti,am3359-tsc"; 262 }; 263 264 adc { 265 #io-channel-cells = <1>; 266 compatible = "ti,am3359-adc"; 267 }; 268 269 }; 270 }; 271 272 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 273 compatible = "ti,sysc-omap4", "ti,sysc"; 274 reg = <0x10000 0x4>; 275 reg-names = "rev"; 276 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>; 277 clock-names = "fck"; 278 ti,no-idle; 279 #address-cells = <1>; 280 #size-cells = <1>; 281 ranges = <0x0 0x10000 0x10000>; 282 283 scm: scm@0 { 284 compatible = "ti,am4-scm", "simple-bus"; 285 reg = <0x0 0x4000>; 286 #address-cells = <1>; 287 #size-cells = <1>; 288 ranges = <0 0 0x4000>; 289 290 am43xx_pinmux: pinmux@800 { 291 compatible = "ti,am437-padconf", 292 "pinctrl-single"; 293 reg = <0x800 0x31c>; 294 #address-cells = <1>; 295 #size-cells = <0>; 296 #pinctrl-cells = <1>; 297 #interrupt-cells = <1>; 298 interrupt-controller; 299 pinctrl-single,register-width = <32>; 300 pinctrl-single,function-mask = <0xffffffff>; 301 }; 302 303 scm_conf: scm_conf@0 { 304 compatible = "syscon", "simple-bus"; 305 reg = <0x0 0x800>; 306 #address-cells = <1>; 307 #size-cells = <1>; 308 309 phy_gmii_sel: phy-gmii-sel { 310 compatible = "ti,am43xx-phy-gmii-sel"; 311 reg = <0x650 0x4>; 312 #phy-cells = <2>; 313 }; 314 315 scm_clocks: clocks { 316 #address-cells = <1>; 317 #size-cells = <0>; 318 }; 319 }; 320 321 wkup_m3_ipc: wkup_m3_ipc@1324 { 322 compatible = "ti,am4372-wkup-m3-ipc"; 323 reg = <0x1324 0x44>; 324 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 325 ti,rproc = <&wkup_m3>; 326 mboxes = <&mailbox &mbox_wkupm3>; 327 }; 328 329 edma_xbar: dma-router@f90 { 330 compatible = "ti,am335x-edma-crossbar"; 331 reg = <0xf90 0x40>; 332 #dma-cells = <3>; 333 dma-requests = <64>; 334 dma-masters = <&edma>; 335 }; 336 337 scm_clockdomains: clockdomains { 338 }; 339 }; 340 }; 341 342 timer1_target: target-module@31000 { /* 0x44e31000, ap 24 40.0 */ 343 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 344 reg = <0x31000 0x4>, 345 <0x31010 0x4>, 346 <0x31014 0x4>; 347 reg-names = "rev", "sysc", "syss"; 348 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 349 SYSC_OMAP2_SOFTRESET | 350 SYSC_OMAP2_AUTOIDLE)>; 351 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 352 <SYSC_IDLE_NO>, 353 <SYSC_IDLE_SMART>; 354 ti,syss-mask = <1>; 355 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 356 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>; 357 clock-names = "fck"; 358 #address-cells = <1>; 359 #size-cells = <1>; 360 ranges = <0x0 0x31000 0x1000>; 361 362 timer1: timer@0 { 363 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 364 reg = <0x0 0x400>; 365 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 366 ti,timer-alwon; 367 clocks = <&timer1_fck>; 368 clock-names = "fck"; 369 }; 370 }; 371 372 target-module@33000 { /* 0x44e33000, ap 26 18.0 */ 373 compatible = "ti,sysc"; 374 status = "disabled"; 375 #address-cells = <1>; 376 #size-cells = <1>; 377 ranges = <0x0 0x33000 0x1000>; 378 }; 379 380 target-module@35000 { /* 0x44e35000, ap 28 50.0 */ 381 compatible = "ti,sysc-omap2", "ti,sysc"; 382 reg = <0x35000 0x4>, 383 <0x35010 0x4>, 384 <0x35014 0x4>; 385 reg-names = "rev", "sysc", "syss"; 386 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 387 SYSC_OMAP2_SOFTRESET)>; 388 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 389 <SYSC_IDLE_NO>, 390 <SYSC_IDLE_SMART>, 391 <SYSC_IDLE_SMART_WKUP>; 392 ti,syss-mask = <1>; 393 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 394 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>; 395 clock-names = "fck"; 396 #address-cells = <1>; 397 #size-cells = <1>; 398 ranges = <0x0 0x35000 0x1000>; 399 400 wdt: wdt@0 { 401 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 402 reg = <0x0 0x1000>; 403 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 404 }; 405 }; 406 407 target-module@37000 { /* 0x44e37000, ap 30 08.0 */ 408 compatible = "ti,sysc"; 409 status = "disabled"; 410 #address-cells = <1>; 411 #size-cells = <1>; 412 ranges = <0x0 0x37000 0x1000>; 413 }; 414 415 target-module@39000 { /* 0x44e39000, ap 32 02.0 */ 416 compatible = "ti,sysc"; 417 status = "disabled"; 418 #address-cells = <1>; 419 #size-cells = <1>; 420 ranges = <0x0 0x39000 0x1000>; 421 }; 422 423 rtc_target: target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ 424 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 425 reg = <0x3e074 0x4>, 426 <0x3e078 0x4>; 427 reg-names = "rev", "sysc"; 428 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 429 <SYSC_IDLE_NO>, 430 <SYSC_IDLE_SMART>, 431 <SYSC_IDLE_SMART_WKUP>; 432 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */ 433 power-domains = <&prm_rtc>; 434 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>; 435 clock-names = "fck"; 436 #address-cells = <1>; 437 #size-cells = <1>; 438 ranges = <0x0 0x3e000 0x1000>; 439 440 rtc: rtc@0 { 441 compatible = "ti,am4372-rtc", "ti,am3352-rtc", 442 "ti,da830-rtc"; 443 reg = <0x0 0x1000>; 444 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, 445 <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 446 clocks = <&clk_32768_ck>; 447 clock-names = "int-clk"; 448 system-power-controller; 449 status = "disabled"; 450 }; 451 }; 452 453 target-module@40000 { /* 0x44e40000, ap 36 68.0 */ 454 compatible = "ti,sysc"; 455 status = "disabled"; 456 #address-cells = <1>; 457 #size-cells = <1>; 458 ranges = <0x0 0x40000 0x40000>; 459 }; 460 461 target-module@86000 { /* 0x44e86000, ap 40 70.0 */ 462 compatible = "ti,sysc-omap2", "ti,sysc"; 463 reg = <0x86000 0x4>, 464 <0x86004 0x4>; 465 reg-names = "rev", "sysc"; 466 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 467 <SYSC_IDLE_NO>; 468 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */ 469 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>; 470 clock-names = "fck"; 471 #address-cells = <1>; 472 #size-cells = <1>; 473 ranges = <0x0 0x86000 0x1000>; 474 475 counter32k: counter@0 { 476 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 477 reg = <0x0 0x40>; 478 }; 479 }; 480 481 target-module@88000 { /* 0x44e88000, ap 38 12.0 */ 482 compatible = "ti,sysc"; 483 status = "disabled"; 484 #address-cells = <1>; 485 #size-cells = <1>; 486 ranges = <0x00000000 0x00088000 0x00008000>, 487 <0x00008000 0x00090000 0x00001000>, 488 <0x00009000 0x00091000 0x00001000>; 489 }; 490 }; 491}; 492 493&l4_fast { /* 0x4a000000 */ 494 compatible = "ti,am4-l4-fast", "simple-pm-bus"; 495 power-domains = <&prm_per>; 496 clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>; 497 clock-names = "fck"; 498 reg = <0x4a000000 0x800>, 499 <0x4a000800 0x800>, 500 <0x4a001000 0x400>; 501 reg-names = "ap", "la", "ia0"; 502 #address-cells = <1>; 503 #size-cells = <1>; 504 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */ 505 506 segment@0 { /* 0x4a000000 */ 507 compatible = "simple-pm-bus"; 508 #address-cells = <1>; 509 #size-cells = <1>; 510 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 511 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 512 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 513 <0x00100000 0x00100000 0x008000>, /* ap 3 */ 514 <0x00108000 0x00108000 0x001000>, /* ap 4 */ 515 <0x00400000 0x00400000 0x002000>, /* ap 5 */ 516 <0x00402000 0x00402000 0x001000>, /* ap 6 */ 517 <0x00200000 0x00200000 0x080000>, /* ap 7 */ 518 <0x00280000 0x00280000 0x001000>; /* ap 8 */ 519 520 target-module@100000 { /* 0x4a100000, ap 3 04.0 */ 521 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 522 reg = <0x101200 0x4>, 523 <0x101208 0x4>, 524 <0x101204 0x4>; 525 reg-names = "rev", "sysc", "syss"; 526 ti,sysc-mask = <0>; 527 ti,sysc-midle = <SYSC_IDLE_FORCE>, 528 <SYSC_IDLE_NO>; 529 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 530 <SYSC_IDLE_NO>; 531 ti,syss-mask = <1>; 532 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 533 clock-names = "fck"; 534 #address-cells = <1>; 535 #size-cells = <1>; 536 ranges = <0x0 0x100000 0x8000>; 537 538 mac_sw: switch@0 { 539 compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch"; 540 reg = <0x0 0x4000>; 541 ranges = <0 0 0x4000>; 542 clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>; 543 clock-names = "fck", "50mclk"; 544 assigned-clocks = <&dpll_clksel_mac_clk>; 545 assigned-clock-rates = <50000000>; 546 #address-cells = <1>; 547 #size-cells = <1>; 548 syscon = <&scm_conf>; 549 status = "disabled"; 550 551 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 552 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 555 interrupt-names = "rx_thresh", "rx", "tx", "misc"; 556 557 ethernet-ports { 558 #address-cells = <1>; 559 #size-cells = <0>; 560 561 cpsw_port1: port@1 { 562 reg = <1>; 563 label = "port1"; 564 mac-address = [ 00 00 00 00 00 00 ]; 565 phys = <&phy_gmii_sel 1 0>; 566 }; 567 568 cpsw_port2: port@2 { 569 reg = <2>; 570 label = "port2"; 571 mac-address = [ 00 00 00 00 00 00 ]; 572 phys = <&phy_gmii_sel 2 0>; 573 }; 574 }; 575 576 davinci_mdio_sw: mdio@1000 { 577 compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio"; 578 clocks = <&cpsw_125mhz_gclk>; 579 clock-names = "fck"; 580 #address-cells = <1>; 581 #size-cells = <0>; 582 bus_freq = <1000000>; 583 reg = <0x1000 0x100>; 584 }; 585 586 cpts { 587 clocks = <&cpsw_cpts_rft_clk>; 588 clock-names = "cpts"; 589 }; 590 }; 591 }; 592 593 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ 594 compatible = "ti,sysc"; 595 status = "disabled"; 596 #address-cells = <1>; 597 #size-cells = <1>; 598 ranges = <0x0 0x200000 0x80000>; 599 }; 600 601 target-module@400000 { /* 0x4a400000, ap 5 08.0 */ 602 compatible = "ti,sysc"; 603 status = "disabled"; 604 #address-cells = <1>; 605 #size-cells = <1>; 606 ranges = <0x0 0x400000 0x2000>; 607 }; 608 }; 609}; 610 611&l4_per { /* 0x48000000 */ 612 compatible = "ti,am4-l4-per", "simple-pm-bus"; 613 power-domains = <&prm_per>; 614 clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>; 615 clock-names = "fck"; 616 reg = <0x48000000 0x800>, 617 <0x48000800 0x800>, 618 <0x48001000 0x400>, 619 <0x48001400 0x400>, 620 <0x48001800 0x400>, 621 <0x48001c00 0x400>; 622 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 623 #address-cells = <1>; 624 #size-cells = <1>; 625 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */ 626 <0x00100000 0x48100000 0x100000>, /* segment 1 */ 627 <0x00200000 0x48200000 0x100000>, /* segment 2 */ 628 <0x00300000 0x48300000 0x100000>, /* segment 3 */ 629 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 630 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 631 632 segment@0 { /* 0x48000000 */ 633 compatible = "simple-pm-bus"; 634 #address-cells = <1>; 635 #size-cells = <1>; 636 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 637 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 638 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 639 <0x00001400 0x00001400 0x000400>, /* ap 3 */ 640 <0x00001800 0x00001800 0x000400>, /* ap 4 */ 641 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */ 642 <0x00008000 0x00008000 0x001000>, /* ap 6 */ 643 <0x00009000 0x00009000 0x001000>, /* ap 7 */ 644 <0x00022000 0x00022000 0x001000>, /* ap 8 */ 645 <0x00023000 0x00023000 0x001000>, /* ap 9 */ 646 <0x00024000 0x00024000 0x001000>, /* ap 10 */ 647 <0x00025000 0x00025000 0x001000>, /* ap 11 */ 648 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */ 649 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */ 650 <0x00038000 0x00038000 0x002000>, /* ap 14 */ 651 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */ 652 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */ 653 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */ 654 <0x00040000 0x00040000 0x001000>, /* ap 18 */ 655 <0x00041000 0x00041000 0x001000>, /* ap 19 */ 656 <0x00042000 0x00042000 0x001000>, /* ap 20 */ 657 <0x00043000 0x00043000 0x001000>, /* ap 21 */ 658 <0x00044000 0x00044000 0x001000>, /* ap 22 */ 659 <0x00045000 0x00045000 0x001000>, /* ap 23 */ 660 <0x00046000 0x00046000 0x001000>, /* ap 24 */ 661 <0x00047000 0x00047000 0x001000>, /* ap 25 */ 662 <0x00048000 0x00048000 0x001000>, /* ap 26 */ 663 <0x00049000 0x00049000 0x001000>, /* ap 27 */ 664 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */ 665 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */ 666 <0x00060000 0x00060000 0x001000>, /* ap 30 */ 667 <0x00061000 0x00061000 0x001000>, /* ap 31 */ 668 <0x00080000 0x00080000 0x010000>, /* ap 32 */ 669 <0x00090000 0x00090000 0x001000>, /* ap 33 */ 670 <0x00030000 0x00030000 0x001000>, /* ap 65 */ 671 <0x00031000 0x00031000 0x001000>, /* ap 66 */ 672 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */ 673 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */ 674 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */ 675 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */ 676 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */ 677 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */ 678 <0x00034000 0x00034000 0x001000>, /* ap 80 */ 679 <0x00035000 0x00035000 0x001000>, /* ap 81 */ 680 <0x00036000 0x00036000 0x001000>, /* ap 84 */ 681 <0x00037000 0x00037000 0x001000>, /* ap 85 */ 682 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 683 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 684 685 target-module@8000 { /* 0x48008000, ap 6 10.0 */ 686 compatible = "ti,sysc"; 687 status = "disabled"; 688 #address-cells = <1>; 689 #size-cells = <1>; 690 ranges = <0x0 0x8000 0x1000>; 691 }; 692 693 target-module@22000 { /* 0x48022000, ap 8 0a.0 */ 694 compatible = "ti,sysc-omap2", "ti,sysc"; 695 reg = <0x22050 0x4>, 696 <0x22054 0x4>, 697 <0x22058 0x4>; 698 reg-names = "rev", "sysc", "syss"; 699 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 700 SYSC_OMAP2_SOFTRESET)>; 701 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 702 <SYSC_IDLE_NO>, 703 <SYSC_IDLE_SMART>, 704 <SYSC_IDLE_SMART_WKUP>; 705 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 706 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>; 707 clock-names = "fck"; 708 #address-cells = <1>; 709 #size-cells = <1>; 710 ranges = <0x0 0x22000 0x1000>; 711 712 uart1: serial@0 { 713 compatible = "ti,am4372-uart"; 714 reg = <0x0 0x2000>; 715 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 716 status = "disabled"; 717 }; 718 }; 719 720 target-module@24000 { /* 0x48024000, ap 10 1c.0 */ 721 compatible = "ti,sysc-omap2", "ti,sysc"; 722 reg = <0x24050 0x4>, 723 <0x24054 0x4>, 724 <0x24058 0x4>; 725 reg-names = "rev", "sysc", "syss"; 726 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 727 SYSC_OMAP2_SOFTRESET)>; 728 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 729 <SYSC_IDLE_NO>, 730 <SYSC_IDLE_SMART>, 731 <SYSC_IDLE_SMART_WKUP>; 732 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 733 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>; 734 clock-names = "fck"; 735 #address-cells = <1>; 736 #size-cells = <1>; 737 ranges = <0x0 0x24000 0x1000>; 738 739 uart2: serial@0 { 740 compatible = "ti,am4372-uart"; 741 reg = <0x0 0x2000>; 742 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 743 status = "disabled"; 744 }; 745 }; 746 747 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */ 748 compatible = "ti,sysc-omap2", "ti,sysc"; 749 reg = <0x2a000 0x8>, 750 <0x2a010 0x8>, 751 <0x2a090 0x8>; 752 reg-names = "rev", "sysc", "syss"; 753 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 754 SYSC_OMAP2_ENAWAKEUP | 755 SYSC_OMAP2_SOFTRESET | 756 SYSC_OMAP2_AUTOIDLE)>; 757 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 758 <SYSC_IDLE_NO>, 759 <SYSC_IDLE_SMART>, 760 <SYSC_IDLE_SMART_WKUP>; 761 ti,syss-mask = <1>; 762 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 763 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>; 764 clock-names = "fck"; 765 #address-cells = <1>; 766 #size-cells = <1>; 767 ranges = <0x0 0x2a000 0x1000>; 768 769 i2c1: i2c@0 { 770 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 771 reg = <0x0 0x1000>; 772 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 773 #address-cells = <1>; 774 #size-cells = <0>; 775 status = "disabled"; 776 }; 777 }; 778 779 target-module@30000 { /* 0x48030000, ap 65 08.0 */ 780 compatible = "ti,sysc-omap2", "ti,sysc"; 781 reg = <0x30000 0x4>, 782 <0x30110 0x4>, 783 <0x30114 0x4>; 784 reg-names = "rev", "sysc", "syss"; 785 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 786 SYSC_OMAP2_SOFTRESET | 787 SYSC_OMAP2_AUTOIDLE)>; 788 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 789 <SYSC_IDLE_NO>, 790 <SYSC_IDLE_SMART>; 791 ti,syss-mask = <1>; 792 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 793 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>; 794 clock-names = "fck"; 795 #address-cells = <1>; 796 #size-cells = <1>; 797 ranges = <0x0 0x30000 0x1000>; 798 799 spi0: spi@0 { 800 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 801 reg = <0x0 0x400>; 802 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 803 #address-cells = <1>; 804 #size-cells = <0>; 805 status = "disabled"; 806 }; 807 }; 808 809 target-module@34000 { /* 0x48034000, ap 80 56.0 */ 810 compatible = "ti,sysc"; 811 status = "disabled"; 812 #address-cells = <1>; 813 #size-cells = <1>; 814 ranges = <0x0 0x34000 0x1000>; 815 }; 816 817 target-module@36000 { /* 0x48036000, ap 84 3e.0 */ 818 compatible = "ti,sysc"; 819 status = "disabled"; 820 #address-cells = <1>; 821 #size-cells = <1>; 822 ranges = <0x0 0x36000 0x1000>; 823 }; 824 825 target-module@38000 { /* 0x48038000, ap 14 04.0 */ 826 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 827 reg = <0x38000 0x4>, 828 <0x38004 0x4>; 829 reg-names = "rev", "sysc"; 830 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 831 <SYSC_IDLE_NO>, 832 <SYSC_IDLE_SMART>; 833 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 834 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>; 835 clock-names = "fck"; 836 #address-cells = <1>; 837 #size-cells = <1>; 838 ranges = <0x0 0x38000 0x2000>, 839 <0x46000000 0x46000000 0x400000>; 840 841 mcasp0: mcasp@0 { 842 compatible = "ti,am33xx-mcasp-audio"; 843 reg = <0x0 0x2000>, 844 <0x46000000 0x400000>; 845 reg-names = "mpu", "dat"; 846 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 848 interrupt-names = "tx", "rx"; 849 status = "disabled"; 850 dmas = <&edma 8 2>, 851 <&edma 9 2>; 852 dma-names = "tx", "rx"; 853 }; 854 }; 855 856 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */ 857 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 858 reg = <0x3c000 0x4>, 859 <0x3c004 0x4>; 860 reg-names = "rev", "sysc"; 861 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 862 <SYSC_IDLE_NO>, 863 <SYSC_IDLE_SMART>; 864 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 865 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>; 866 clock-names = "fck"; 867 #address-cells = <1>; 868 #size-cells = <1>; 869 ranges = <0x0 0x3c000 0x2000>, 870 <0x46400000 0x46400000 0x400000>; 871 872 mcasp1: mcasp@0 { 873 compatible = "ti,am33xx-mcasp-audio"; 874 reg = <0x0 0x2000>, 875 <0x46400000 0x400000>; 876 reg-names = "mpu", "dat"; 877 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 879 interrupt-names = "tx", "rx"; 880 status = "disabled"; 881 dmas = <&edma 10 2>, 882 <&edma 11 2>; 883 dma-names = "tx", "rx"; 884 }; 885 }; 886 887 timer2_target: target-module@40000 { /* 0x48040000, ap 18 1e.0 */ 888 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 889 reg = <0x40000 0x4>, 890 <0x40010 0x4>, 891 <0x40014 0x4>; 892 reg-names = "rev", "sysc", "syss"; 893 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 894 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 895 <SYSC_IDLE_NO>, 896 <SYSC_IDLE_SMART>, 897 <SYSC_IDLE_SMART_WKUP>; 898 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 899 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>; 900 clock-names = "fck"; 901 #address-cells = <1>; 902 #size-cells = <1>; 903 ranges = <0x0 0x40000 0x1000>; 904 905 timer2: timer@0 { 906 compatible = "ti,am4372-timer","ti,am335x-timer"; 907 reg = <0x0 0x400>; 908 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 909 clocks = <&timer2_fck>; 910 clock-names = "fck"; 911 }; 912 }; 913 914 target-module@42000 { /* 0x48042000, ap 20 24.0 */ 915 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 916 reg = <0x42000 0x4>, 917 <0x42010 0x4>, 918 <0x42014 0x4>; 919 reg-names = "rev", "sysc", "syss"; 920 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 921 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 922 <SYSC_IDLE_NO>, 923 <SYSC_IDLE_SMART>, 924 <SYSC_IDLE_SMART_WKUP>; 925 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 926 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>; 927 clock-names = "fck"; 928 #address-cells = <1>; 929 #size-cells = <1>; 930 ranges = <0x0 0x42000 0x1000>; 931 932 timer3: timer@0 { 933 compatible = "ti,am4372-timer","ti,am335x-timer"; 934 reg = <0x0 0x400>; 935 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 936 status = "disabled"; 937 }; 938 }; 939 940 target-module@44000 { /* 0x48044000, ap 22 26.0 */ 941 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 942 reg = <0x44000 0x4>, 943 <0x44010 0x4>, 944 <0x44014 0x4>; 945 reg-names = "rev", "sysc", "syss"; 946 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 947 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 948 <SYSC_IDLE_NO>, 949 <SYSC_IDLE_SMART>, 950 <SYSC_IDLE_SMART_WKUP>; 951 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 952 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>; 953 clock-names = "fck"; 954 #address-cells = <1>; 955 #size-cells = <1>; 956 ranges = <0x0 0x44000 0x1000>; 957 958 timer4: timer@0 { 959 compatible = "ti,am4372-timer","ti,am335x-timer"; 960 reg = <0x0 0x400>; 961 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 962 ti,timer-pwm; 963 status = "disabled"; 964 }; 965 }; 966 967 target-module@46000 { /* 0x48046000, ap 24 28.0 */ 968 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 969 reg = <0x46000 0x4>, 970 <0x46010 0x4>, 971 <0x46014 0x4>; 972 reg-names = "rev", "sysc", "syss"; 973 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 974 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 975 <SYSC_IDLE_NO>, 976 <SYSC_IDLE_SMART>, 977 <SYSC_IDLE_SMART_WKUP>; 978 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 979 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>; 980 clock-names = "fck"; 981 #address-cells = <1>; 982 #size-cells = <1>; 983 ranges = <0x0 0x46000 0x1000>; 984 985 timer5: timer@0 { 986 compatible = "ti,am4372-timer","ti,am335x-timer"; 987 reg = <0x0 0x400>; 988 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 989 ti,timer-pwm; 990 status = "disabled"; 991 }; 992 }; 993 994 target-module@48000 { /* 0x48048000, ap 26 1a.0 */ 995 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 996 reg = <0x48000 0x4>, 997 <0x48010 0x4>, 998 <0x48014 0x4>; 999 reg-names = "rev", "sysc", "syss"; 1000 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1001 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1002 <SYSC_IDLE_NO>, 1003 <SYSC_IDLE_SMART>, 1004 <SYSC_IDLE_SMART_WKUP>; 1005 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1006 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>; 1007 clock-names = "fck"; 1008 #address-cells = <1>; 1009 #size-cells = <1>; 1010 ranges = <0x0 0x48000 0x1000>; 1011 1012 timer6: timer@0 { 1013 compatible = "ti,am4372-timer","ti,am335x-timer"; 1014 reg = <0x0 0x400>; 1015 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 1016 ti,timer-pwm; 1017 status = "disabled"; 1018 }; 1019 }; 1020 1021 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */ 1022 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1023 reg = <0x4a000 0x4>, 1024 <0x4a010 0x4>, 1025 <0x4a014 0x4>; 1026 reg-names = "rev", "sysc", "syss"; 1027 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1028 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1029 <SYSC_IDLE_NO>, 1030 <SYSC_IDLE_SMART>, 1031 <SYSC_IDLE_SMART_WKUP>; 1032 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1033 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>; 1034 clock-names = "fck"; 1035 #address-cells = <1>; 1036 #size-cells = <1>; 1037 ranges = <0x0 0x4a000 0x1000>; 1038 1039 timer7: timer@0 { 1040 compatible = "ti,am4372-timer","ti,am335x-timer"; 1041 reg = <0x0 0x400>; 1042 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 1043 ti,timer-pwm; 1044 status = "disabled"; 1045 }; 1046 }; 1047 1048 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */ 1049 compatible = "ti,sysc-omap2", "ti,sysc"; 1050 reg = <0x4c000 0x4>, 1051 <0x4c010 0x4>, 1052 <0x4c114 0x4>; 1053 reg-names = "rev", "sysc", "syss"; 1054 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1055 SYSC_OMAP2_SOFTRESET | 1056 SYSC_OMAP2_AUTOIDLE)>; 1057 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1058 <SYSC_IDLE_NO>, 1059 <SYSC_IDLE_SMART>, 1060 <SYSC_IDLE_SMART_WKUP>; 1061 ti,syss-mask = <1>; 1062 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1063 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>, 1064 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>; 1065 clock-names = "fck", "dbclk"; 1066 #address-cells = <1>; 1067 #size-cells = <1>; 1068 ranges = <0x0 0x4c000 0x1000>; 1069 1070 gpio1: gpio@0 { 1071 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1072 reg = <0x0 0x1000>; 1073 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 1074 gpio-controller; 1075 #gpio-cells = <2>; 1076 interrupt-controller; 1077 #interrupt-cells = <2>; 1078 status = "disabled"; 1079 }; 1080 }; 1081 1082 target-module@60000 { /* 0x48060000, ap 30 14.0 */ 1083 compatible = "ti,sysc-omap2", "ti,sysc"; 1084 reg = <0x602fc 0x4>, 1085 <0x60110 0x4>, 1086 <0x60114 0x4>; 1087 reg-names = "rev", "sysc", "syss"; 1088 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1089 SYSC_OMAP2_ENAWAKEUP | 1090 SYSC_OMAP2_SOFTRESET | 1091 SYSC_OMAP2_AUTOIDLE)>; 1092 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1093 <SYSC_IDLE_NO>, 1094 <SYSC_IDLE_SMART>; 1095 ti,syss-mask = <1>; 1096 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1097 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>; 1098 clock-names = "fck"; 1099 #address-cells = <1>; 1100 #size-cells = <1>; 1101 ranges = <0x0 0x60000 0x1000>; 1102 1103 mmc1: mmc@0 { 1104 compatible = "ti,am437-sdhci"; 1105 reg = <0x0 0x1000>; 1106 ti,needs-special-reset; 1107 dmas = <&edma 24 0>, 1108 <&edma 25 0>; 1109 dma-names = "tx", "rx"; 1110 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 1111 status = "disabled"; 1112 }; 1113 }; 1114 1115 target-module@80000 { /* 0x48080000, ap 32 18.0 */ 1116 compatible = "ti,sysc-omap2", "ti,sysc"; 1117 reg = <0x80000 0x4>, 1118 <0x80010 0x4>, 1119 <0x80014 0x4>; 1120 reg-names = "rev", "sysc", "syss"; 1121 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1122 SYSC_OMAP2_SOFTRESET | 1123 SYSC_OMAP2_AUTOIDLE)>; 1124 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1125 <SYSC_IDLE_NO>, 1126 <SYSC_IDLE_SMART>; 1127 ti,syss-mask = <1>; 1128 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1129 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>; 1130 clock-names = "fck"; 1131 #address-cells = <1>; 1132 #size-cells = <1>; 1133 ranges = <0x0 0x80000 0x10000>; 1134 1135 elm: elm@0 { 1136 compatible = "ti,am3352-elm"; 1137 reg = <0x0 0x2000>; 1138 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1139 clocks = <&l4ls_gclk>; 1140 clock-names = "fck"; 1141 status = "disabled"; 1142 }; 1143 }; 1144 1145 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */ 1146 compatible = "ti,sysc-omap4", "ti,sysc"; 1147 reg = <0xc8000 0x4>, 1148 <0xc8010 0x4>; 1149 reg-names = "rev", "sysc"; 1150 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1151 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1152 <SYSC_IDLE_NO>, 1153 <SYSC_IDLE_SMART>; 1154 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1155 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>; 1156 clock-names = "fck"; 1157 #address-cells = <1>; 1158 #size-cells = <1>; 1159 ranges = <0x0 0xc8000 0x1000>; 1160 1161 mailbox: mailbox@0 { 1162 compatible = "ti,omap4-mailbox"; 1163 reg = <0x0 0x200>; 1164 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 1165 #mbox-cells = <1>; 1166 ti,mbox-num-users = <4>; 1167 ti,mbox-num-fifos = <8>; 1168 mbox_wkupm3: mbox-wkup-m3 { 1169 ti,mbox-send-noirq; 1170 ti,mbox-tx = <0 0 0>; 1171 ti,mbox-rx = <0 0 3>; 1172 }; 1173 }; 1174 }; 1175 1176 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */ 1177 compatible = "ti,sysc-omap2", "ti,sysc"; 1178 reg = <0xca000 0x4>, 1179 <0xca010 0x4>, 1180 <0xca014 0x4>; 1181 reg-names = "rev", "sysc", "syss"; 1182 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1183 SYSC_OMAP2_ENAWAKEUP | 1184 SYSC_OMAP2_SOFTRESET | 1185 SYSC_OMAP2_AUTOIDLE)>; 1186 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1187 <SYSC_IDLE_NO>, 1188 <SYSC_IDLE_SMART>; 1189 ti,syss-mask = <1>; 1190 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1191 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>; 1192 clock-names = "fck"; 1193 #address-cells = <1>; 1194 #size-cells = <1>; 1195 ranges = <0x0 0xca000 0x1000>; 1196 1197 hwspinlock: spinlock@0 { 1198 compatible = "ti,omap4-hwspinlock"; 1199 reg = <0x0 0x1000>; 1200 #hwlock-cells = <1>; 1201 }; 1202 }; 1203 }; 1204 1205 segment@100000 { /* 0x48100000 */ 1206 compatible = "simple-pm-bus"; 1207 #address-cells = <1>; 1208 #size-cells = <1>; 1209 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */ 1210 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */ 1211 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */ 1212 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */ 1213 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */ 1214 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */ 1215 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */ 1216 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */ 1217 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */ 1218 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */ 1219 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */ 1220 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */ 1221 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */ 1222 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */ 1223 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */ 1224 <0x000af000 0x001af000 0x001000>, /* ap 49 */ 1225 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */ 1226 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */ 1227 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */ 1228 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */ 1229 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */ 1230 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */ 1231 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */ 1232 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */ 1233 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */ 1234 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */ 1235 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */ 1236 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */ 1237 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */ 1238 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */ 1239 1240 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */ 1241 compatible = "ti,sysc"; 1242 status = "disabled"; 1243 #address-cells = <1>; 1244 #size-cells = <1>; 1245 ranges = <0x0 0x8c000 0x1000>; 1246 }; 1247 1248 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */ 1249 compatible = "ti,sysc"; 1250 status = "disabled"; 1251 #address-cells = <1>; 1252 #size-cells = <1>; 1253 ranges = <0x0 0x8e000 0x1000>; 1254 }; 1255 1256 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */ 1257 compatible = "ti,sysc-omap2", "ti,sysc"; 1258 reg = <0x9c000 0x8>, 1259 <0x9c010 0x8>, 1260 <0x9c090 0x8>; 1261 reg-names = "rev", "sysc", "syss"; 1262 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1263 SYSC_OMAP2_ENAWAKEUP | 1264 SYSC_OMAP2_SOFTRESET | 1265 SYSC_OMAP2_AUTOIDLE)>; 1266 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1267 <SYSC_IDLE_NO>, 1268 <SYSC_IDLE_SMART>, 1269 <SYSC_IDLE_SMART_WKUP>; 1270 ti,syss-mask = <1>; 1271 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1272 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>; 1273 clock-names = "fck"; 1274 #address-cells = <1>; 1275 #size-cells = <1>; 1276 ranges = <0x0 0x9c000 0x1000>; 1277 1278 i2c2: i2c@0 { 1279 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 1280 reg = <0x0 0x1000>; 1281 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1282 #address-cells = <1>; 1283 #size-cells = <0>; 1284 status = "disabled"; 1285 }; 1286 }; 1287 1288 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */ 1289 compatible = "ti,sysc-omap2", "ti,sysc"; 1290 reg = <0xa0000 0x4>, 1291 <0xa0110 0x4>, 1292 <0xa0114 0x4>; 1293 reg-names = "rev", "sysc", "syss"; 1294 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1295 SYSC_OMAP2_SOFTRESET | 1296 SYSC_OMAP2_AUTOIDLE)>; 1297 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1298 <SYSC_IDLE_NO>, 1299 <SYSC_IDLE_SMART>; 1300 ti,syss-mask = <1>; 1301 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1302 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>; 1303 clock-names = "fck"; 1304 #address-cells = <1>; 1305 #size-cells = <1>; 1306 ranges = <0x0 0xa0000 0x1000>; 1307 1308 spi1: spi@0 { 1309 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1310 reg = <0x0 0x400>; 1311 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1312 #address-cells = <1>; 1313 #size-cells = <0>; 1314 status = "disabled"; 1315 }; 1316 }; 1317 1318 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */ 1319 compatible = "ti,sysc-omap2", "ti,sysc"; 1320 reg = <0xa2000 0x4>, 1321 <0xa2110 0x4>, 1322 <0xa2114 0x4>; 1323 reg-names = "rev", "sysc", "syss"; 1324 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1325 SYSC_OMAP2_SOFTRESET | 1326 SYSC_OMAP2_AUTOIDLE)>; 1327 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1328 <SYSC_IDLE_NO>, 1329 <SYSC_IDLE_SMART>; 1330 ti,syss-mask = <1>; 1331 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1332 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>; 1333 clock-names = "fck"; 1334 #address-cells = <1>; 1335 #size-cells = <1>; 1336 ranges = <0x0 0xa2000 0x1000>; 1337 1338 spi2: spi@0 { 1339 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1340 reg = <0x0 0x400>; 1341 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 1342 #address-cells = <1>; 1343 #size-cells = <0>; 1344 status = "disabled"; 1345 }; 1346 }; 1347 1348 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */ 1349 compatible = "ti,sysc-omap2", "ti,sysc"; 1350 reg = <0xa4000 0x4>, 1351 <0xa4110 0x4>, 1352 <0xa4114 0x4>; 1353 reg-names = "rev", "sysc", "syss"; 1354 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1355 SYSC_OMAP2_SOFTRESET | 1356 SYSC_OMAP2_AUTOIDLE)>; 1357 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1358 <SYSC_IDLE_NO>, 1359 <SYSC_IDLE_SMART>; 1360 ti,syss-mask = <1>; 1361 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1362 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>; 1363 clock-names = "fck"; 1364 #address-cells = <1>; 1365 #size-cells = <1>; 1366 ranges = <0x0 0xa4000 0x1000>; 1367 1368 spi3: spi@0 { 1369 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1370 reg = <0x0 0x400>; 1371 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 1372 #address-cells = <1>; 1373 #size-cells = <0>; 1374 status = "disabled"; 1375 }; 1376 }; 1377 1378 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */ 1379 compatible = "ti,sysc-omap2", "ti,sysc"; 1380 reg = <0xa6050 0x4>, 1381 <0xa6054 0x4>, 1382 <0xa6058 0x4>; 1383 reg-names = "rev", "sysc", "syss"; 1384 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1385 SYSC_OMAP2_SOFTRESET)>; 1386 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1387 <SYSC_IDLE_NO>, 1388 <SYSC_IDLE_SMART>, 1389 <SYSC_IDLE_SMART_WKUP>; 1390 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1391 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>; 1392 clock-names = "fck"; 1393 #address-cells = <1>; 1394 #size-cells = <1>; 1395 ranges = <0x0 0xa6000 0x1000>; 1396 1397 uart3: serial@0 { 1398 compatible = "ti,am4372-uart"; 1399 reg = <0x0 0x2000>; 1400 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 1401 status = "disabled"; 1402 }; 1403 }; 1404 1405 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */ 1406 compatible = "ti,sysc-omap2", "ti,sysc"; 1407 reg = <0xa8050 0x4>, 1408 <0xa8054 0x4>, 1409 <0xa8058 0x4>; 1410 reg-names = "rev", "sysc", "syss"; 1411 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1412 SYSC_OMAP2_SOFTRESET)>; 1413 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1414 <SYSC_IDLE_NO>, 1415 <SYSC_IDLE_SMART>, 1416 <SYSC_IDLE_SMART_WKUP>; 1417 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1418 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>; 1419 clock-names = "fck"; 1420 #address-cells = <1>; 1421 #size-cells = <1>; 1422 ranges = <0x0 0xa8000 0x1000>; 1423 1424 uart4: serial@0 { 1425 compatible = "ti,am4372-uart"; 1426 reg = <0x0 0x2000>; 1427 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1428 status = "disabled"; 1429 }; 1430 }; 1431 1432 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */ 1433 compatible = "ti,sysc-omap2", "ti,sysc"; 1434 reg = <0xaa050 0x4>, 1435 <0xaa054 0x4>, 1436 <0xaa058 0x4>; 1437 reg-names = "rev", "sysc", "syss"; 1438 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1439 SYSC_OMAP2_SOFTRESET)>; 1440 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1441 <SYSC_IDLE_NO>, 1442 <SYSC_IDLE_SMART>, 1443 <SYSC_IDLE_SMART_WKUP>; 1444 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1445 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>; 1446 clock-names = "fck"; 1447 #address-cells = <1>; 1448 #size-cells = <1>; 1449 ranges = <0x0 0xaa000 0x1000>; 1450 1451 uart5: serial@0 { 1452 compatible = "ti,am4372-uart"; 1453 reg = <0x0 0x2000>; 1454 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1455 status = "disabled"; 1456 }; 1457 }; 1458 1459 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */ 1460 compatible = "ti,sysc-omap2", "ti,sysc"; 1461 reg = <0xac000 0x4>, 1462 <0xac010 0x4>, 1463 <0xac114 0x4>; 1464 reg-names = "rev", "sysc", "syss"; 1465 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1466 SYSC_OMAP2_SOFTRESET | 1467 SYSC_OMAP2_AUTOIDLE)>; 1468 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1469 <SYSC_IDLE_NO>, 1470 <SYSC_IDLE_SMART>, 1471 <SYSC_IDLE_SMART_WKUP>; 1472 ti,syss-mask = <1>; 1473 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1474 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>, 1475 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>; 1476 clock-names = "fck", "dbclk"; 1477 #address-cells = <1>; 1478 #size-cells = <1>; 1479 ranges = <0x0 0xac000 0x1000>; 1480 1481 gpio2: gpio@0 { 1482 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1483 reg = <0x0 0x1000>; 1484 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1485 gpio-controller; 1486 #gpio-cells = <2>; 1487 interrupt-controller; 1488 #interrupt-cells = <2>; 1489 status = "disabled"; 1490 }; 1491 }; 1492 1493 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */ 1494 compatible = "ti,sysc-omap2", "ti,sysc"; 1495 reg = <0xae000 0x4>, 1496 <0xae010 0x4>, 1497 <0xae114 0x4>; 1498 reg-names = "rev", "sysc", "syss"; 1499 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1500 SYSC_OMAP2_SOFTRESET | 1501 SYSC_OMAP2_AUTOIDLE)>; 1502 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1503 <SYSC_IDLE_NO>, 1504 <SYSC_IDLE_SMART>, 1505 <SYSC_IDLE_SMART_WKUP>; 1506 ti,syss-mask = <1>; 1507 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1508 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>, 1509 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>; 1510 clock-names = "fck", "dbclk"; 1511 #address-cells = <1>; 1512 #size-cells = <1>; 1513 ranges = <0x0 0xae000 0x1000>; 1514 1515 gpio3: gpio@0 { 1516 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1517 reg = <0x0 0x1000>; 1518 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 1519 gpio-controller; 1520 #gpio-cells = <2>; 1521 interrupt-controller; 1522 #interrupt-cells = <2>; 1523 status = "disabled"; 1524 }; 1525 }; 1526 1527 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */ 1528 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1529 reg = <0xc1000 0x4>, 1530 <0xc1010 0x4>, 1531 <0xc1014 0x4>; 1532 reg-names = "rev", "sysc", "syss"; 1533 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1534 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1535 <SYSC_IDLE_NO>, 1536 <SYSC_IDLE_SMART>, 1537 <SYSC_IDLE_SMART_WKUP>; 1538 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1539 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>; 1540 clock-names = "fck"; 1541 #address-cells = <1>; 1542 #size-cells = <1>; 1543 ranges = <0x0 0xc1000 0x1000>; 1544 1545 timer8: timer@0 { 1546 compatible = "ti,am4372-timer","ti,am335x-timer"; 1547 reg = <0x0 0x400>; 1548 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 1549 status = "disabled"; 1550 }; 1551 }; 1552 1553 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ 1554 compatible = "ti,sysc-omap4", "ti,sysc"; 1555 reg = <0xcc020 0x4>; 1556 reg-names = "rev"; 1557 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1558 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>, 1559 <&dcan0_fck>; 1560 clock-names = "fck", "osc"; 1561 #address-cells = <1>; 1562 #size-cells = <1>; 1563 ranges = <0x0 0xcc000 0x2000>; 1564 1565 dcan0: can@0 { 1566 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1567 reg = <0x0 0x2000>; 1568 clocks = <&dcan0_fck>; 1569 clock-names = "fck"; 1570 syscon-raminit = <&scm_conf 0x644 0>; 1571 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 1572 status = "disabled"; 1573 }; 1574 }; 1575 1576 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ 1577 compatible = "ti,sysc-omap4", "ti,sysc"; 1578 reg = <0xd0020 0x4>; 1579 reg-names = "rev"; 1580 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1581 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>, 1582 <&dcan1_fck>; 1583 clock-names = "fck", "osc"; 1584 #address-cells = <1>; 1585 #size-cells = <1>; 1586 ranges = <0x0 0xd0000 0x2000>; 1587 1588 dcan1: can@0 { 1589 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1590 reg = <0x0 0x2000>; 1591 clocks = <&dcan1_fck>; 1592 clock-names = "fck"; 1593 syscon-raminit = <&scm_conf 0x644 1>; 1594 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1595 status = "disabled"; 1596 }; 1597 }; 1598 1599 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */ 1600 compatible = "ti,sysc-omap2", "ti,sysc"; 1601 reg = <0xd82fc 0x4>, 1602 <0xd8110 0x4>, 1603 <0xd8114 0x4>; 1604 reg-names = "rev", "sysc", "syss"; 1605 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1606 SYSC_OMAP2_ENAWAKEUP | 1607 SYSC_OMAP2_SOFTRESET | 1608 SYSC_OMAP2_AUTOIDLE)>; 1609 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1610 <SYSC_IDLE_NO>, 1611 <SYSC_IDLE_SMART>; 1612 ti,syss-mask = <1>; 1613 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1614 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>; 1615 clock-names = "fck"; 1616 #address-cells = <1>; 1617 #size-cells = <1>; 1618 ranges = <0x0 0xd8000 0x1000>; 1619 1620 mmc2: mmc@0 { 1621 compatible = "ti,am437-sdhci"; 1622 reg = <0x0 0x1000>; 1623 ti,needs-special-reset; 1624 dmas = <&edma 2 0>, 1625 <&edma 3 0>; 1626 dma-names = "tx", "rx"; 1627 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 1628 status = "disabled"; 1629 }; 1630 }; 1631 }; 1632 1633 segment@200000 { /* 0x48200000 */ 1634 compatible = "simple-pm-bus"; 1635 #address-cells = <1>; 1636 #size-cells = <1>; 1637 ranges = <0x00000000 0x00200000 0x010000>; 1638 1639 target-module@0 { 1640 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 1641 power-domains = <&prm_mpu>; 1642 clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>; 1643 clock-names = "fck"; 1644 ti,no-idle; 1645 #address-cells = <1>; 1646 #size-cells = <1>; 1647 ranges = <0 0 0x10000>; 1648 1649 mpu@0 { 1650 compatible = "ti,omap4-mpu"; 1651 pm-sram = <&pm_sram_code 1652 &pm_sram_data>; 1653 }; 1654 }; 1655 }; 1656 1657 segment@300000 { /* 0x48300000 */ 1658 compatible = "simple-pm-bus"; 1659 #address-cells = <1>; 1660 #size-cells = <1>; 1661 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */ 1662 <0x00001000 0x00301000 0x001000>, /* ap 57 */ 1663 <0x00002000 0x00302000 0x001000>, /* ap 58 */ 1664 <0x00003000 0x00303000 0x001000>, /* ap 59 */ 1665 <0x00004000 0x00304000 0x001000>, /* ap 60 */ 1666 <0x00005000 0x00305000 0x001000>, /* ap 61 */ 1667 <0x00018000 0x00318000 0x004000>, /* ap 62 */ 1668 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */ 1669 <0x00010000 0x00310000 0x002000>, /* ap 64 */ 1670 <0x00028000 0x00328000 0x001000>, /* ap 75 */ 1671 <0x00029000 0x00329000 0x001000>, /* ap 76 */ 1672 <0x00012000 0x00312000 0x001000>, /* ap 79 */ 1673 <0x00020000 0x00320000 0x001000>, /* ap 82 */ 1674 <0x00021000 0x00321000 0x001000>, /* ap 83 */ 1675 <0x00026000 0x00326000 0x001000>, /* ap 86 */ 1676 <0x00027000 0x00327000 0x001000>, /* ap 87 */ 1677 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */ 1678 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */ 1679 <0x00013000 0x00313000 0x001000>, /* ap 90 */ 1680 <0x00014000 0x00314000 0x001000>, /* ap 91 */ 1681 <0x00006000 0x00306000 0x001000>, /* ap 96 */ 1682 <0x00007000 0x00307000 0x001000>, /* ap 97 */ 1683 <0x00008000 0x00308000 0x001000>, /* ap 98 */ 1684 <0x00009000 0x00309000 0x001000>, /* ap 99 */ 1685 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */ 1686 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */ 1687 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */ 1688 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */ 1689 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */ 1690 <0x00040000 0x00340000 0x001000>, /* ap 105 */ 1691 <0x00041000 0x00341000 0x001000>, /* ap 106 */ 1692 <0x00042000 0x00342000 0x001000>, /* ap 107 */ 1693 <0x00045000 0x00345000 0x001000>, /* ap 108 */ 1694 <0x00046000 0x00346000 0x001000>, /* ap 109 */ 1695 <0x00047000 0x00347000 0x001000>, /* ap 110 */ 1696 <0x00048000 0x00348000 0x001000>, /* ap 111 */ 1697 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */ 1698 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */ 1699 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */ 1700 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */ 1701 <0x00022000 0x00322000 0x001000>, /* ap 116 */ 1702 <0x00023000 0x00323000 0x001000>, /* ap 117 */ 1703 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */ 1704 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */ 1705 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */ 1706 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */ 1707 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */ 1708 <0x00080000 0x00380000 0x020000>, /* ap 123 */ 1709 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */ 1710 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */ 1711 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */ 1712 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */ 1713 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */ 1714 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */ 1715 1716 target-module@0 { /* 0x48300000, ap 56 40.0 */ 1717 compatible = "ti,sysc-omap4", "ti,sysc"; 1718 reg = <0x0 0x4>, 1719 <0x4 0x4>; 1720 reg-names = "rev", "sysc"; 1721 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1722 <SYSC_IDLE_NO>, 1723 <SYSC_IDLE_SMART>, 1724 <SYSC_IDLE_SMART_WKUP>; 1725 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1726 <SYSC_IDLE_NO>, 1727 <SYSC_IDLE_SMART>, 1728 <SYSC_IDLE_SMART_WKUP>; 1729 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1730 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>; 1731 clock-names = "fck"; 1732 #address-cells = <1>; 1733 #size-cells = <1>; 1734 ranges = <0x0 0x0 0x1000>; 1735 1736 epwmss0: epwmss@0 { 1737 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1738 reg = <0x0 0x10>; 1739 #address-cells = <1>; 1740 #size-cells = <1>; 1741 ranges = <0 0 0x1000>; 1742 status = "disabled"; 1743 1744 ecap0: pwm@100 { 1745 compatible = "ti,am4372-ecap", 1746 "ti,am3352-ecap"; 1747 #pwm-cells = <3>; 1748 reg = <0x100 0x80>; 1749 clocks = <&l4ls_gclk>; 1750 clock-names = "fck"; 1751 status = "disabled"; 1752 }; 1753 1754 ehrpwm0: pwm@200 { 1755 compatible = "ti,am4372-ehrpwm", 1756 "ti,am3352-ehrpwm"; 1757 #pwm-cells = <3>; 1758 reg = <0x200 0x80>; 1759 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 1760 clock-names = "tbclk", "fck"; 1761 status = "disabled"; 1762 }; 1763 }; 1764 }; 1765 1766 target-module@2000 { /* 0x48302000, ap 58 4a.0 */ 1767 compatible = "ti,sysc-omap4", "ti,sysc"; 1768 reg = <0x2000 0x4>, 1769 <0x2004 0x4>; 1770 reg-names = "rev", "sysc"; 1771 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1772 <SYSC_IDLE_NO>, 1773 <SYSC_IDLE_SMART>, 1774 <SYSC_IDLE_SMART_WKUP>; 1775 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1776 <SYSC_IDLE_NO>, 1777 <SYSC_IDLE_SMART>, 1778 <SYSC_IDLE_SMART_WKUP>; 1779 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1780 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>; 1781 clock-names = "fck"; 1782 #address-cells = <1>; 1783 #size-cells = <1>; 1784 ranges = <0x0 0x2000 0x1000>; 1785 1786 epwmss1: epwmss@0 { 1787 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1788 reg = <0x0 0x10>; 1789 #address-cells = <1>; 1790 #size-cells = <1>; 1791 ranges = <0 0 0x1000>; 1792 status = "disabled"; 1793 1794 ecap1: pwm@100 { 1795 compatible = "ti,am4372-ecap", 1796 "ti,am3352-ecap"; 1797 #pwm-cells = <3>; 1798 reg = <0x100 0x80>; 1799 clocks = <&l4ls_gclk>; 1800 clock-names = "fck"; 1801 status = "disabled"; 1802 }; 1803 1804 ehrpwm1: pwm@200 { 1805 compatible = "ti,am4372-ehrpwm", 1806 "ti,am3352-ehrpwm"; 1807 #pwm-cells = <3>; 1808 reg = <0x200 0x80>; 1809 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 1810 clock-names = "tbclk", "fck"; 1811 status = "disabled"; 1812 }; 1813 }; 1814 }; 1815 1816 target-module@4000 { /* 0x48304000, ap 60 44.0 */ 1817 compatible = "ti,sysc-omap4", "ti,sysc"; 1818 reg = <0x4000 0x4>, 1819 <0x4004 0x4>; 1820 reg-names = "rev", "sysc"; 1821 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1822 <SYSC_IDLE_NO>, 1823 <SYSC_IDLE_SMART>, 1824 <SYSC_IDLE_SMART_WKUP>; 1825 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1826 <SYSC_IDLE_NO>, 1827 <SYSC_IDLE_SMART>, 1828 <SYSC_IDLE_SMART_WKUP>; 1829 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1830 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>; 1831 clock-names = "fck"; 1832 #address-cells = <1>; 1833 #size-cells = <1>; 1834 ranges = <0x0 0x4000 0x1000>; 1835 1836 epwmss2: epwmss@0 { 1837 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1838 reg = <0x0 0x10>; 1839 #address-cells = <1>; 1840 #size-cells = <1>; 1841 ranges = <0 0 0x1000>; 1842 status = "disabled"; 1843 1844 ecap2: pwm@100 { 1845 compatible = "ti,am4372-ecap", 1846 "ti,am3352-ecap"; 1847 #pwm-cells = <3>; 1848 reg = <0x100 0x80>; 1849 clocks = <&l4ls_gclk>; 1850 clock-names = "fck"; 1851 status = "disabled"; 1852 }; 1853 1854 ehrpwm2: pwm@200 { 1855 compatible = "ti,am4372-ehrpwm", 1856 "ti,am3352-ehrpwm"; 1857 #pwm-cells = <3>; 1858 reg = <0x200 0x80>; 1859 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 1860 clock-names = "tbclk", "fck"; 1861 status = "disabled"; 1862 }; 1863 }; 1864 }; 1865 1866 target-module@6000 { /* 0x48306000, ap 96 58.0 */ 1867 compatible = "ti,sysc-omap4", "ti,sysc"; 1868 reg = <0x6000 0x4>, 1869 <0x6004 0x4>; 1870 reg-names = "rev", "sysc"; 1871 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1872 <SYSC_IDLE_NO>, 1873 <SYSC_IDLE_SMART>, 1874 <SYSC_IDLE_SMART_WKUP>; 1875 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1876 <SYSC_IDLE_NO>, 1877 <SYSC_IDLE_SMART>, 1878 <SYSC_IDLE_SMART_WKUP>; 1879 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1880 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>; 1881 clock-names = "fck"; 1882 #address-cells = <1>; 1883 #size-cells = <1>; 1884 ranges = <0x0 0x6000 0x1000>; 1885 1886 epwmss3: epwmss@0 { 1887 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1888 reg = <0x0 0x10>; 1889 #address-cells = <1>; 1890 #size-cells = <1>; 1891 ranges = <0 0 0x1000>; 1892 status = "disabled"; 1893 1894 ehrpwm3: pwm@200 { 1895 compatible = "ti,am4372-ehrpwm", 1896 "ti,am3352-ehrpwm"; 1897 #pwm-cells = <3>; 1898 reg = <0x200 0x80>; 1899 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 1900 clock-names = "tbclk", "fck"; 1901 status = "disabled"; 1902 }; 1903 }; 1904 }; 1905 1906 target-module@8000 { /* 0x48308000, ap 98 54.0 */ 1907 compatible = "ti,sysc-omap4", "ti,sysc"; 1908 reg = <0x8000 0x4>, 1909 <0x8004 0x4>; 1910 reg-names = "rev", "sysc"; 1911 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1912 <SYSC_IDLE_NO>, 1913 <SYSC_IDLE_SMART>, 1914 <SYSC_IDLE_SMART_WKUP>; 1915 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1916 <SYSC_IDLE_NO>, 1917 <SYSC_IDLE_SMART>, 1918 <SYSC_IDLE_SMART_WKUP>; 1919 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1920 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>; 1921 clock-names = "fck"; 1922 #address-cells = <1>; 1923 #size-cells = <1>; 1924 ranges = <0x0 0x8000 0x1000>; 1925 1926 epwmss4: epwmss@0 { 1927 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1928 reg = <0x0 0x10>; 1929 #address-cells = <1>; 1930 #size-cells = <1>; 1931 ranges = <0 0 0x1000>; 1932 status = "disabled"; 1933 1934 ehrpwm4: pwm@48308200 { 1935 compatible = "ti,am4372-ehrpwm", 1936 "ti,am3352-ehrpwm"; 1937 #pwm-cells = <3>; 1938 reg = <0x200 0x80>; 1939 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 1940 clock-names = "tbclk", "fck"; 1941 status = "disabled"; 1942 }; 1943 }; 1944 }; 1945 1946 target-module@a000 { /* 0x4830a000, ap 100 60.0 */ 1947 compatible = "ti,sysc-omap4", "ti,sysc"; 1948 reg = <0xa000 0x4>, 1949 <0xa004 0x4>; 1950 reg-names = "rev", "sysc"; 1951 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1952 <SYSC_IDLE_NO>, 1953 <SYSC_IDLE_SMART>, 1954 <SYSC_IDLE_SMART_WKUP>; 1955 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1956 <SYSC_IDLE_NO>, 1957 <SYSC_IDLE_SMART>, 1958 <SYSC_IDLE_SMART_WKUP>; 1959 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1960 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>; 1961 clock-names = "fck"; 1962 #address-cells = <1>; 1963 #size-cells = <1>; 1964 ranges = <0x0 0xa000 0x1000>; 1965 1966 epwmss5: epwmss@0 { 1967 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1968 reg = <0x0 0x10>; 1969 #address-cells = <1>; 1970 #size-cells = <1>; 1971 ranges = <0 0 0x1000>; 1972 status = "disabled"; 1973 1974 ehrpwm5: pwm@200 { 1975 compatible = "ti,am4372-ehrpwm", 1976 "ti,am3352-ehrpwm"; 1977 #pwm-cells = <3>; 1978 reg = <0x200 0x80>; 1979 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 1980 clock-names = "tbclk", "fck"; 1981 status = "disabled"; 1982 }; 1983 }; 1984 }; 1985 1986 target-module@10000 { /* 0x48310000, ap 64 4e.1 */ 1987 compatible = "ti,sysc-omap2", "ti,sysc"; 1988 reg = <0x11fe0 0x4>, 1989 <0x11fe4 0x4>; 1990 reg-names = "rev", "sysc"; 1991 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>; 1992 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1993 <SYSC_IDLE_NO>; 1994 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1995 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>; 1996 clock-names = "fck"; 1997 #address-cells = <1>; 1998 #size-cells = <1>; 1999 ranges = <0x0 0x10000 0x2000>; 2000 2001 rng: rng@0 { 2002 compatible = "ti,omap4-rng"; 2003 reg = <0x0 0x2000>; 2004 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 2005 }; 2006 }; 2007 2008 target-module@13000 { /* 0x48313000, ap 90 50.0 */ 2009 compatible = "ti,sysc"; 2010 status = "disabled"; 2011 #address-cells = <1>; 2012 #size-cells = <1>; 2013 ranges = <0x0 0x13000 0x1000>; 2014 }; 2015 2016 target-module@18000 { /* 0x48318000, ap 62 4c.0 */ 2017 compatible = "ti,sysc"; 2018 status = "disabled"; 2019 #address-cells = <1>; 2020 #size-cells = <1>; 2021 ranges = <0x0 0x18000 0x4000>; 2022 }; 2023 2024 target-module@20000 { /* 0x48320000, ap 82 34.0 */ 2025 compatible = "ti,sysc-omap2", "ti,sysc"; 2026 reg = <0x20000 0x4>, 2027 <0x20010 0x4>, 2028 <0x20114 0x4>; 2029 reg-names = "rev", "sysc", "syss"; 2030 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2031 SYSC_OMAP2_SOFTRESET | 2032 SYSC_OMAP2_AUTOIDLE)>; 2033 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2034 <SYSC_IDLE_NO>, 2035 <SYSC_IDLE_SMART>, 2036 <SYSC_IDLE_SMART_WKUP>; 2037 ti,syss-mask = <1>; 2038 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2039 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>, 2040 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>; 2041 clock-names = "fck", "dbclk"; 2042 #address-cells = <1>; 2043 #size-cells = <1>; 2044 ranges = <0x0 0x20000 0x1000>; 2045 2046 gpio4: gpio@0 { 2047 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2048 reg = <0x0 0x1000>; 2049 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 2050 gpio-controller; 2051 #gpio-cells = <2>; 2052 interrupt-controller; 2053 #interrupt-cells = <2>; 2054 status = "disabled"; 2055 }; 2056 }; 2057 2058 gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */ 2059 compatible = "ti,sysc-omap2", "ti,sysc"; 2060 reg = <0x22000 0x4>, 2061 <0x22010 0x4>, 2062 <0x22114 0x4>; 2063 reg-names = "rev", "sysc", "syss"; 2064 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2065 SYSC_OMAP2_SOFTRESET | 2066 SYSC_OMAP2_AUTOIDLE)>; 2067 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2068 <SYSC_IDLE_NO>, 2069 <SYSC_IDLE_SMART>, 2070 <SYSC_IDLE_SMART_WKUP>; 2071 ti,syss-mask = <1>; 2072 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2073 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>, 2074 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>; 2075 clock-names = "fck", "dbclk"; 2076 #address-cells = <1>; 2077 #size-cells = <1>; 2078 ranges = <0x0 0x22000 0x1000>; 2079 2080 gpio5: gpio@0 { 2081 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2082 reg = <0x0 0x1000>; 2083 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2084 gpio-controller; 2085 #gpio-cells = <2>; 2086 interrupt-controller; 2087 #interrupt-cells = <2>; 2088 status = "disabled"; 2089 }; 2090 }; 2091 2092 target-module@26000 { /* 0x48326000, ap 86 66.0 */ 2093 compatible = "ti,sysc-omap4", "ti,sysc"; 2094 reg = <0x26000 0x4>, 2095 <0x26104 0x4>; 2096 reg-names = "rev", "sysc"; 2097 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2098 <SYSC_IDLE_NO>, 2099 <SYSC_IDLE_SMART>; 2100 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2101 <SYSC_IDLE_NO>, 2102 <SYSC_IDLE_SMART>; 2103 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2104 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>; 2105 clock-names = "fck"; 2106 #address-cells = <1>; 2107 #size-cells = <1>; 2108 ranges = <0x0 0x26000 0x1000>; 2109 2110 vpfe0: vpfe@0 { 2111 compatible = "ti,am437x-vpfe"; 2112 reg = <0x0 0x2000>; 2113 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 2114 status = "disabled"; 2115 }; 2116 }; 2117 2118 target-module@28000 { /* 0x48328000, ap 75 0e.0 */ 2119 compatible = "ti,sysc-omap4", "ti,sysc"; 2120 reg = <0x28000 0x4>, 2121 <0x28104 0x4>; 2122 reg-names = "rev", "sysc"; 2123 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2124 <SYSC_IDLE_NO>, 2125 <SYSC_IDLE_SMART>; 2126 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2127 <SYSC_IDLE_NO>, 2128 <SYSC_IDLE_SMART>; 2129 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2130 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>; 2131 clock-names = "fck"; 2132 #address-cells = <1>; 2133 #size-cells = <1>; 2134 ranges = <0x0 0x28000 0x1000>; 2135 2136 vpfe1: vpfe@0 { 2137 compatible = "ti,am437x-vpfe"; 2138 reg = <0x0 0x2000>; 2139 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 2140 status = "disabled"; 2141 }; 2142 }; 2143 2144 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */ 2145 compatible = "ti,sysc-omap2", "ti,sysc"; 2146 reg = <0x2a000 0x4>, 2147 <0x2a010 0x4>, 2148 <0x2a014 0x4>; 2149 reg-names = "rev", "sysc", "syss"; 2150 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2151 SYSC_OMAP2_AUTOIDLE)>; 2152 ti,syss-mask = <1>; 2153 /* Domains (P, C): per_pwrdm, dss_clkdm */ 2154 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2155 clock-names = "fck"; 2156 #address-cells = <1>; 2157 #size-cells = <1>; 2158 ranges = <0x00000000 0x0002a000 0x00000400>, 2159 <0x00000400 0x0002a400 0x00000400>, 2160 <0x00000800 0x0002a800 0x00000400>, 2161 <0x00000c00 0x0002ac00 0x00000400>, 2162 <0x00001000 0x0002b000 0x00001000>; 2163 2164 dss: dss@0 { 2165 compatible = "ti,omap3-dss"; 2166 reg = <0 0x200>; 2167 status = "disabled"; 2168 clocks = <&disp_clk>; 2169 clock-names = "fck"; 2170 #address-cells = <1>; 2171 #size-cells = <1>; 2172 ranges = <0x00000000 0x00000000 0x00000400>, 2173 <0x00000400 0x00000400 0x00000400>, 2174 <0x00000800 0x00000800 0x00000400>, 2175 <0x00000c00 0x00000c00 0x00000400>, 2176 <0x00001000 0x00001000 0x00001000>; 2177 2178 target-module@400 { 2179 compatible = "ti,sysc-omap2", "ti,sysc"; 2180 reg = <0x400 0x4>, 2181 <0x410 0x4>, 2182 <0x414 0x4>; 2183 reg-names = "rev", "sysc", "syss"; 2184 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2185 <SYSC_IDLE_NO>, 2186 <SYSC_IDLE_SMART>; 2187 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2188 <SYSC_IDLE_NO>, 2189 <SYSC_IDLE_SMART>; 2190 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2191 SYSC_OMAP2_ENAWAKEUP | 2192 SYSC_OMAP2_SOFTRESET | 2193 SYSC_OMAP2_AUTOIDLE)>; 2194 ti,syss-mask = <1>; 2195 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2196 clock-names = "fck"; 2197 #address-cells = <1>; 2198 #size-cells = <1>; 2199 ranges = <0 0x400 0x400>; 2200 2201 dispc: dispc@0 { 2202 compatible = "ti,omap3-dispc"; 2203 reg = <0 0x400>; 2204 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 2205 clocks = <&disp_clk>; 2206 clock-names = "fck"; 2207 2208 max-memory-bandwidth = <230000000>; 2209 }; 2210 }; 2211 2212 target-module@800 { 2213 compatible = "ti,sysc-omap2", "ti,sysc"; 2214 reg = <0x800 0x4>, 2215 <0x810 0x4>, 2216 <0x814 0x4>; 2217 reg-names = "rev", "sysc", "syss"; 2218 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2219 <SYSC_IDLE_NO>, 2220 <SYSC_IDLE_SMART>; 2221 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2222 SYSC_OMAP2_AUTOIDLE)>; 2223 ti,syss-mask = <1>; 2224 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2225 clock-names = "fck"; 2226 #address-cells = <1>; 2227 #size-cells = <1>; 2228 ranges = <0 0x800 0x400>; 2229 2230 rfbi: rfbi@0 { 2231 compatible = "ti,omap3-rfbi"; 2232 reg = <0 0x100>; 2233 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2234 clock-names = "fck"; 2235 status = "disabled"; 2236 }; 2237 }; 2238 }; 2239 }; 2240 2241 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */ 2242 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2243 reg = <0x3d000 0x4>, 2244 <0x3d010 0x4>, 2245 <0x3d014 0x4>; 2246 reg-names = "rev", "sysc", "syss"; 2247 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2248 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2249 <SYSC_IDLE_NO>, 2250 <SYSC_IDLE_SMART>, 2251 <SYSC_IDLE_SMART_WKUP>; 2252 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2253 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>; 2254 clock-names = "fck"; 2255 #address-cells = <1>; 2256 #size-cells = <1>; 2257 ranges = <0x0 0x3d000 0x1000>; 2258 2259 timer9: timer@0 { 2260 compatible = "ti,am4372-timer","ti,am335x-timer"; 2261 reg = <0x0 0x400>; 2262 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 2263 status = "disabled"; 2264 }; 2265 }; 2266 2267 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */ 2268 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2269 reg = <0x3f000 0x4>, 2270 <0x3f010 0x4>, 2271 <0x3f014 0x4>; 2272 reg-names = "rev", "sysc", "syss"; 2273 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2274 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2275 <SYSC_IDLE_NO>, 2276 <SYSC_IDLE_SMART>, 2277 <SYSC_IDLE_SMART_WKUP>; 2278 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2279 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>; 2280 clock-names = "fck"; 2281 #address-cells = <1>; 2282 #size-cells = <1>; 2283 ranges = <0x0 0x3f000 0x1000>; 2284 2285 timer10: timer@0 { 2286 compatible = "ti,am4372-timer","ti,am335x-timer"; 2287 reg = <0x0 0x400>; 2288 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2289 status = "disabled"; 2290 }; 2291 }; 2292 2293 target-module@41000 { /* 0x48341000, ap 106 76.0 */ 2294 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2295 reg = <0x41000 0x4>, 2296 <0x41010 0x4>, 2297 <0x41014 0x4>; 2298 reg-names = "rev", "sysc", "syss"; 2299 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2300 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2301 <SYSC_IDLE_NO>, 2302 <SYSC_IDLE_SMART>, 2303 <SYSC_IDLE_SMART_WKUP>; 2304 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2305 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>; 2306 clock-names = "fck"; 2307 #address-cells = <1>; 2308 #size-cells = <1>; 2309 ranges = <0x0 0x41000 0x1000>; 2310 2311 timer11: timer@0 { 2312 compatible = "ti,am4372-timer","ti,am335x-timer"; 2313 reg = <0x0 0x400>; 2314 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 2315 status = "disabled"; 2316 }; 2317 }; 2318 2319 target-module@45000 { /* 0x48345000, ap 108 6a.0 */ 2320 compatible = "ti,sysc-omap2", "ti,sysc"; 2321 reg = <0x45000 0x4>, 2322 <0x45110 0x4>, 2323 <0x45114 0x4>; 2324 reg-names = "rev", "sysc", "syss"; 2325 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2326 SYSC_OMAP2_SOFTRESET | 2327 SYSC_OMAP2_AUTOIDLE)>; 2328 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2329 <SYSC_IDLE_NO>, 2330 <SYSC_IDLE_SMART>; 2331 ti,syss-mask = <1>; 2332 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2333 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>; 2334 clock-names = "fck"; 2335 #address-cells = <1>; 2336 #size-cells = <1>; 2337 ranges = <0x0 0x45000 0x1000>; 2338 2339 spi4: spi@0 { 2340 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 2341 reg = <0x0 0x400>; 2342 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 2343 #address-cells = <1>; 2344 #size-cells = <0>; 2345 status = "disabled"; 2346 }; 2347 }; 2348 2349 target-module@47000 { /* 0x48347000, ap 110 70.0 */ 2350 compatible = "ti,sysc-omap2", "ti,sysc"; 2351 reg = <0x47000 0x4>, 2352 <0x47014 0x4>, 2353 <0x47018 0x4>; 2354 reg-names = "rev", "sysc", "syss"; 2355 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2356 SYSC_OMAP2_AUTOIDLE)>; 2357 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2358 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>; 2359 clock-names = "fck"; 2360 #address-cells = <1>; 2361 #size-cells = <1>; 2362 ranges = <0x0 0x47000 0x1000>; 2363 2364 hdq: hdq@0 { 2365 compatible = "ti,am4372-hdq"; 2366 reg = <0x0 0x1000>; 2367 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 2368 clocks = <&func_12m_clk>; 2369 clock-names = "fck"; 2370 status = "disabled"; 2371 }; 2372 }; 2373 2374 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */ 2375 compatible = "ti,sysc-omap4", "ti,sysc"; 2376 reg = <0x4c000 0x4>, 2377 <0x4c010 0x4>; 2378 reg-names = "rev", "sysc"; 2379 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2380 <SYSC_IDLE_NO>, 2381 <SYSC_IDLE_SMART>; 2382 clocks = <&l3s_clkctrl AM4_L3S_ADC1_CLKCTRL 0>; 2383 clock-names = "fck"; 2384 #address-cells = <1>; 2385 #size-cells = <1>; 2386 ranges = <0x0 0x4c000 0x2000>; 2387 2388 magadc: magadc@0 { 2389 compatible = "ti,am4372-magadc"; 2390 reg = <0x0 0x2000>; 2391 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 2392 clocks = <&adc_mag_fck>; 2393 clock-names = "fck"; 2394 dmas = <&edma 54 0>, <&edma 55 0>; 2395 dma-names = "fifo0", "fifo1"; 2396 status = "disabled"; 2397 2398 mag { 2399 compatible = "ti,am4372-mag"; 2400 }; 2401 2402 adc { 2403 #io-channel-cells = <1>; 2404 compatible = "ti,am4372-adc"; 2405 }; 2406 }; 2407 }; 2408 2409 target-module@80000 { /* 0x48380000, ap 123 42.0 */ 2410 compatible = "ti,sysc-omap4", "ti,sysc"; 2411 reg = <0x80000 0x4>, 2412 <0x80010 0x4>; 2413 reg-names = "rev", "sysc"; 2414 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2415 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2416 <SYSC_IDLE_NO>, 2417 <SYSC_IDLE_SMART>, 2418 <SYSC_IDLE_SMART_WKUP>; 2419 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2420 <SYSC_IDLE_NO>, 2421 <SYSC_IDLE_SMART>, 2422 <SYSC_IDLE_SMART_WKUP>; 2423 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2424 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>; 2425 clock-names = "fck"; 2426 #address-cells = <1>; 2427 #size-cells = <1>; 2428 ranges = <0x0 0x80000 0x20000>; 2429 2430 dwc3_1: omap_dwc3@0 { 2431 compatible = "ti,am437x-dwc3"; 2432 reg = <0x0 0x10000>; 2433 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2434 #address-cells = <1>; 2435 #size-cells = <1>; 2436 utmi-mode = <1>; 2437 ranges = <0 0 0x20000>; 2438 2439 usb1: usb@10000 { 2440 compatible = "snps,dwc3"; 2441 reg = <0x10000 0x10000>; 2442 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2443 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2444 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2445 interrupt-names = "peripheral", 2446 "host", 2447 "otg"; 2448 phys = <&usb2_phy1>; 2449 phy-names = "usb2-phy"; 2450 maximum-speed = "high-speed"; 2451 dr_mode = "otg"; 2452 status = "disabled"; 2453 snps,dis_u3_susphy_quirk; 2454 snps,dis_u2_susphy_quirk; 2455 }; 2456 }; 2457 }; 2458 2459 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */ 2460 compatible = "ti,sysc-omap4", "ti,sysc"; 2461 reg = <0xa8000 0x4>; 2462 reg-names = "rev"; 2463 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2464 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>; 2465 clock-names = "fck"; 2466 #address-cells = <1>; 2467 #size-cells = <1>; 2468 ranges = <0x0 0xa8000 0x8000>; 2469 2470 ocp2scp0: ocp2scp@0 { 2471 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2472 #address-cells = <1>; 2473 #size-cells = <1>; 2474 ranges = <0 0 0x8000>; 2475 2476 usb2_phy1: phy@8000 { 2477 compatible = "ti,am437x-usb2"; 2478 reg = <0x0 0x8000>; 2479 syscon-phy-power = <&scm_conf 0x620>; 2480 clocks = <&usb_phy0_always_on_clk32k>, 2481 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>; 2482 clock-names = "wkupclk", "refclk"; 2483 #phy-cells = <0>; 2484 status = "disabled"; 2485 }; 2486 }; 2487 }; 2488 2489 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */ 2490 compatible = "ti,sysc-omap4", "ti,sysc"; 2491 reg = <0xc0000 0x4>, 2492 <0xc0010 0x4>; 2493 reg-names = "rev", "sysc"; 2494 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2495 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2496 <SYSC_IDLE_NO>, 2497 <SYSC_IDLE_SMART>, 2498 <SYSC_IDLE_SMART_WKUP>; 2499 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2500 <SYSC_IDLE_NO>, 2501 <SYSC_IDLE_SMART>, 2502 <SYSC_IDLE_SMART_WKUP>; 2503 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2504 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>; 2505 clock-names = "fck"; 2506 #address-cells = <1>; 2507 #size-cells = <1>; 2508 ranges = <0x0 0xc0000 0x20000>; 2509 2510 dwc3_2: omap_dwc3@0 { 2511 compatible = "ti,am437x-dwc3"; 2512 reg = <0x0 0x10000>; 2513 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2514 #address-cells = <1>; 2515 #size-cells = <1>; 2516 utmi-mode = <1>; 2517 ranges = <0 0 0x20000>; 2518 2519 usb2: usb@10000 { 2520 compatible = "snps,dwc3"; 2521 reg = <0x10000 0x10000>; 2522 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2523 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2524 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2525 interrupt-names = "peripheral", 2526 "host", 2527 "otg"; 2528 phys = <&usb2_phy2>; 2529 phy-names = "usb2-phy"; 2530 maximum-speed = "high-speed"; 2531 dr_mode = "otg"; 2532 status = "disabled"; 2533 snps,dis_u3_susphy_quirk; 2534 snps,dis_u2_susphy_quirk; 2535 }; 2536 }; 2537 }; 2538 2539 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */ 2540 compatible = "ti,sysc-omap4", "ti,sysc"; 2541 reg = <0xe8000 0x4>; 2542 reg-names = "rev"; 2543 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2544 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>; 2545 clock-names = "fck"; 2546 #address-cells = <1>; 2547 #size-cells = <1>; 2548 ranges = <0x0 0xe8000 0x8000>; 2549 2550 ocp2scp1: ocp2scp@0 { 2551 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2552 #address-cells = <1>; 2553 #size-cells = <1>; 2554 ranges = <0 0 0x8000>; 2555 2556 usb2_phy2: phy@8000 { 2557 compatible = "ti,am437x-usb2"; 2558 reg = <0x0 0x8000>; 2559 syscon-phy-power = <&scm_conf 0x628>; 2560 clocks = <&usb_phy1_always_on_clk32k>, 2561 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>; 2562 clock-names = "wkupclk", "refclk"; 2563 #phy-cells = <0>; 2564 status = "disabled"; 2565 }; 2566 }; 2567 }; 2568 2569 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */ 2570 compatible = "ti,sysc"; 2571 status = "disabled"; 2572 #address-cells = <1>; 2573 #size-cells = <1>; 2574 ranges = <0x0 0xf2000 0x2000>; 2575 }; 2576 }; 2577}; 2578 2579