1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2006 Intel Corp.
4  *     Tom Long Nguyen ([email protected])
5  *     Zhang Yanmin ([email protected])
6  */
7 
8 #ifndef _AER_H_
9 #define _AER_H_
10 
11 #include <linux/errno.h>
12 #include <linux/types.h>
13 
14 #define AER_NONFATAL			0
15 #define AER_FATAL			1
16 #define AER_CORRECTABLE			2
17 #define DPC_FATAL			3
18 
19 /*
20  * AER and DPC capabilities TLP Logging register sizes (PCIe r6.2, sec 7.8.4
21  * & 7.9.14).
22  */
23 #define PCIE_STD_NUM_TLP_HEADERLOG     4
24 #define PCIE_STD_MAX_TLP_PREFIXLOG     4
25 
26 struct pci_dev;
27 
28 struct pcie_tlp_log {
29 	u32 dw[PCIE_STD_NUM_TLP_HEADERLOG];
30 	u32 prefix[PCIE_STD_MAX_TLP_PREFIXLOG];
31 };
32 
33 struct aer_capability_regs {
34 	u32 header;
35 	u32 uncor_status;
36 	u32 uncor_mask;
37 	u32 uncor_severity;
38 	u32 cor_status;
39 	u32 cor_mask;
40 	u32 cap_control;
41 	struct pcie_tlp_log header_log;
42 	u32 root_command;
43 	u32 root_status;
44 	u16 cor_err_source;
45 	u16 uncor_err_source;
46 };
47 
48 #if defined(CONFIG_PCIEAER)
49 int pci_aer_clear_nonfatal_status(struct pci_dev *dev);
50 int pcie_aer_is_native(struct pci_dev *dev);
51 #else
pci_aer_clear_nonfatal_status(struct pci_dev * dev)52 static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
53 {
54 	return -EINVAL;
55 }
pcie_aer_is_native(struct pci_dev * dev)56 static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
57 #endif
58 
59 void pci_print_aer(struct pci_dev *dev, int aer_severity,
60 		    struct aer_capability_regs *aer);
61 int cper_severity_to_aer(int cper_severity);
62 void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
63 		       int severity, struct aer_capability_regs *aer_regs);
64 #endif //_AER_H_
65 
66