1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Type definitions for the Microsoft Hypervisor.
4  */
5 #ifndef _HV_HVHDK_MINI_H
6 #define _HV_HVHDK_MINI_H
7 
8 #include "hvgdk_mini.h"
9 
10 /*
11  * Doorbell connection_info flags.
12  */
13 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_MASK  0x00000007
14 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_ANY   0x00000000
15 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_BYTE  0x00000001
16 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_WORD  0x00000002
17 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_DWORD 0x00000003
18 #define HV_DOORBELL_FLAG_TRIGGER_SIZE_QWORD 0x00000004
19 #define HV_DOORBELL_FLAG_TRIGGER_ANY_VALUE  0x80000000
20 
21 /* Each generic set contains 64 elements */
22 #define HV_GENERIC_SET_SHIFT		(6)
23 #define HV_GENERIC_SET_MASK		(63)
24 
25 enum hv_generic_set_format {
26 	HV_GENERIC_SET_SPARSE_4K,
27 	HV_GENERIC_SET_ALL,
28 };
29 #define HV_GENERIC_SET_FORMAT hv_generic_set_format
30 
31 enum hv_scheduler_type {
32 	HV_SCHEDULER_TYPE_LP		= 1, /* Classic scheduler w/o SMT */
33 	HV_SCHEDULER_TYPE_LP_SMT	= 2, /* Classic scheduler w/ SMT */
34 	HV_SCHEDULER_TYPE_CORE_SMT	= 3, /* Core scheduler */
35 	HV_SCHEDULER_TYPE_ROOT		= 4, /* Root / integrated scheduler */
36 	HV_SCHEDULER_TYPE_MAX
37 };
38 
39 enum hv_partition_property_code {
40 	/* Privilege properties */
41 	HV_PARTITION_PROPERTY_PRIVILEGE_FLAGS			= 0x00010000,
42 	HV_PARTITION_PROPERTY_SYNTHETIC_PROC_FEATURES		= 0x00010001,
43 
44 	/* Resource properties */
45 	HV_PARTITION_PROPERTY_GPA_PAGE_ACCESS_TRACKING		= 0x00050005,
46 	HV_PARTITION_PROPERTY_UNIMPLEMENTED_MSR_ACTION		= 0x00050017,
47 
48 	/* Compatibility properties */
49 	HV_PARTITION_PROPERTY_PROCESSOR_XSAVE_FEATURES		= 0x00060002,
50 	HV_PARTITION_PROPERTY_MAX_XSAVE_DATA_SIZE		= 0x00060008,
51 	HV_PARTITION_PROPERTY_PROCESSOR_CLOCK_FREQUENCY		= 0x00060009,
52 };
53 
54 enum hv_system_property {
55 	/* Add more values when needed */
56 	HV_SYSTEM_PROPERTY_SCHEDULER_TYPE = 15,
57 };
58 
59 struct hv_input_get_system_property {
60 	u32 property_id; /* enum hv_system_property */
61 	union {
62 		u32 as_uint32;
63 		/* More fields to be filled in when needed */
64 	};
65 } __packed;
66 
67 struct hv_output_get_system_property {
68 	union {
69 		u32 scheduler_type; /* enum hv_scheduler_type */
70 	};
71 } __packed;
72 
73 struct hv_proximity_domain_flags {
74 	u32 proximity_preferred : 1;
75 	u32 reserved : 30;
76 	u32 proximity_info_valid : 1;
77 } __packed;
78 
79 struct hv_proximity_domain_info {
80 	u32 domain_id;
81 	struct hv_proximity_domain_flags flags;
82 } __packed;
83 
84 /* HvDepositMemory hypercall */
85 struct hv_deposit_memory {	/* HV_INPUT_DEPOSIT_MEMORY */
86 	u64 partition_id;
87 	u64 gpa_page_list[];
88 } __packed;
89 
90 struct hv_input_withdraw_memory {
91 	u64 partition_id;
92 	struct hv_proximity_domain_info proximity_domain_info;
93 } __packed;
94 
95 struct hv_output_withdraw_memory {
96 	DECLARE_FLEX_ARRAY(u64, gpa_page_list);
97 } __packed;
98 
99 /* HV Map GPA (Guest Physical Address) Flags */
100 #define HV_MAP_GPA_PERMISSIONS_NONE	       0x0
101 #define HV_MAP_GPA_READABLE		       0x1
102 #define HV_MAP_GPA_WRITABLE		       0x2
103 #define HV_MAP_GPA_KERNEL_EXECUTABLE	       0x4
104 #define HV_MAP_GPA_USER_EXECUTABLE	       0x8
105 #define HV_MAP_GPA_EXECUTABLE		       0xC
106 #define HV_MAP_GPA_PERMISSIONS_MASK	       0xF
107 #define HV_MAP_GPA_ADJUSTABLE		    0x8000
108 #define HV_MAP_GPA_NO_ACCESS		   0x10000
109 #define HV_MAP_GPA_NOT_CACHED		  0x200000
110 #define HV_MAP_GPA_LARGE_PAGE		0x80000000
111 
112 struct hv_input_map_gpa_pages {
113 	u64 target_partition_id;
114 	u64 target_gpa_base;
115 	u32 map_flags;
116 	u32 padding;
117 	u64 source_gpa_page_list[];
118 } __packed;
119 
120 union hv_gpa_page_access_state_flags {
121 	struct {
122 		u64 clear_accessed : 1;
123 		u64 set_accessed : 1;
124 		u64 clear_dirty : 1;
125 		u64 set_dirty : 1;
126 		u64 reserved : 60;
127 	} __packed;
128 	u64 as_uint64;
129 };
130 
131 struct hv_input_get_gpa_pages_access_state {
132 	u64  partition_id;
133 	union hv_gpa_page_access_state_flags flags;
134 	u64 hv_gpa_page_number;
135 } __packed;
136 
137 union hv_gpa_page_access_state {
138 	struct {
139 		u8 accessed : 1;
140 		u8 dirty : 1;
141 		u8 reserved: 6;
142 	};
143 	u8 as_uint8;
144 } __packed;
145 
146 struct hv_lp_startup_status {
147 	u64 hv_status;
148 	u64 substatus1;
149 	u64 substatus2;
150 	u64 substatus3;
151 	u64 substatus4;
152 	u64 substatus5;
153 	u64 substatus6;
154 } __packed;
155 
156 struct hv_input_add_logical_processor {
157 	u32 lp_index;
158 	u32 apic_id;
159 	struct hv_proximity_domain_info proximity_domain_info;
160 } __packed;
161 
162 struct hv_output_add_logical_processor {
163 	struct hv_lp_startup_status startup_status;
164 } __packed;
165 
166 enum {	/* HV_SUBNODE_TYPE */
167 	HV_SUBNODE_ANY		= 0,
168 	HV_SUBNODE_SOCKET,
169 	HV_SUBNODE_CLUSTER,
170 	HV_SUBNODE_L3,
171 	HV_SUBNODE_COUNT,
172 	HV_SUBNODE_INVALID	= -1
173 };
174 
175 struct hv_create_vp {	/* HV_INPUT_CREATE_VP */
176 	u64 partition_id;
177 	u32 vp_index;
178 	u8 padding[3];
179 	u8 subnode_type;
180 	u64 subnode_id;
181 	struct hv_proximity_domain_info proximity_domain_info;
182 	u64 flags;
183 } __packed;
184 
185 /* HV_INTERRUPT_TRIGGER_MODE */
186 enum hv_interrupt_trigger_mode {
187 	HV_INTERRUPT_TRIGGER_MODE_EDGE	= 0,
188 	HV_INTERRUPT_TRIGGER_MODE_LEVEL	= 1,
189 };
190 
191 /* HV_DEVICE_INTERRUPT_DESCRIPTOR */
192 struct hv_device_interrupt_descriptor {
193 	u32 interrupt_type;
194 	u32 trigger_mode;
195 	u32 vector_count;
196 	u32 reserved;
197 	struct hv_device_interrupt_target target;
198 } __packed;
199 
200 /* HV_INPUT_MAP_DEVICE_INTERRUPT */
201 struct hv_input_map_device_interrupt {
202 	u64 partition_id;
203 	u64 device_id;
204 	u32 flags;
205 	u32 base_irt_idx;
206 	struct hv_interrupt_entry logical_interrupt_entry;
207 	struct hv_device_interrupt_descriptor interrupt_descriptor;
208 } __packed;
209 
210 /* HV_OUTPUT_MAP_DEVICE_INTERRUPT */
211 struct hv_output_map_device_interrupt {
212 	struct hv_interrupt_entry interrupt_entry;
213 } __packed;
214 
215 /* HV_INPUT_UNMAP_DEVICE_INTERRUPT */
216 struct hv_input_unmap_device_interrupt {
217 	u64 partition_id;
218 	u64 device_id;
219 	struct hv_interrupt_entry interrupt_entry;
220 	u32 flags;
221 } __packed;
222 
223 #define HV_SOURCE_SHADOW_NONE		    0x0
224 #define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE   0x1
225 
226 struct hv_send_ipi_ex { /* HV_INPUT_SEND_SYNTHETIC_CLUSTER_IPI_EX */
227 	u32 vector;
228 	u32 reserved;
229 	struct hv_vpset vp_set;
230 } __packed;
231 
232 typedef u16 hv_pci_rid;		/* HV_PCI_RID */
233 typedef u16 hv_pci_segment;	/* HV_PCI_SEGMENT */
234 typedef u64 hv_logical_device_id;
235 union hv_pci_bdf {	/* HV_PCI_BDF */
236 	u16 as_uint16;
237 
238 	struct {
239 		u8 function : 3;
240 		u8 device : 5;
241 		u8 bus;
242 	};
243 } __packed;
244 
245 union hv_pci_bus_range {
246 	u16 as_uint16;
247 
248 	struct {
249 		u8 subordinate_bus;
250 		u8 secondary_bus;
251 	};
252 } __packed;
253 
254 enum hv_device_type {		/* HV_DEVICE_TYPE */
255 	HV_DEVICE_TYPE_LOGICAL	= 0,
256 	HV_DEVICE_TYPE_PCI	= 1,
257 	HV_DEVICE_TYPE_IOAPIC	= 2,
258 	HV_DEVICE_TYPE_ACPI	= 3,
259 };
260 
261 union hv_device_id {		/* HV_DEVICE_ID */
262 	u64 as_uint64;
263 
264 	struct {
265 		u64 reserved0 : 62;
266 		u64 device_type : 2;
267 	};
268 
269 	/* HV_DEVICE_TYPE_LOGICAL */
270 	struct {
271 		u64 id : 62;
272 		u64 device_type : 2;
273 	} logical;
274 
275 	/* HV_DEVICE_TYPE_PCI */
276 	struct {
277 		union {
278 			hv_pci_rid rid;
279 			union hv_pci_bdf bdf;
280 		};
281 
282 		hv_pci_segment segment;
283 		union hv_pci_bus_range shadow_bus_range;
284 
285 		u16 phantom_function_bits : 2;
286 		u16 source_shadow : 1;
287 
288 		u16 rsvdz0 : 11;
289 		u16 device_type : 2;
290 	} pci;
291 
292 	/* HV_DEVICE_TYPE_IOAPIC */
293 	struct {
294 		u8 ioapic_id;
295 		u8 rsvdz0;
296 		u16 rsvdz1;
297 		u16 rsvdz2;
298 
299 		u16 rsvdz3 : 14;
300 		u16 device_type : 2;
301 	} ioapic;
302 
303 	/* HV_DEVICE_TYPE_ACPI */
304 	struct {
305 		u32 input_mapping_base;
306 		u32 input_mapping_count : 30;
307 		u32 device_type : 2;
308 	} acpi;
309 } __packed;
310 
311 #endif /* _HV_HVHDK_MINI_H */
312