1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
4 * Author: Chao Xie <[email protected]>
5 * Neil Zhang <[email protected]>
6 */
7
8 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/io.h>
11 #include <linux/iopoll.h>
12 #include <linux/uaccess.h>
13 #include <linux/device.h>
14 #include <linux/proc_fs.h>
15 #include <linux/clk.h>
16 #include <linux/workqueue.h>
17 #include <linux/platform_device.h>
18 #include <linux/string_choices.h>
19
20 #include <linux/usb.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/otg.h>
23 #include <linux/usb/gadget.h>
24 #include <linux/usb/hcd.h>
25 #include <linux/platform_data/mv_usb.h>
26
27 #include "phy-mv-usb.h"
28
29 #define DRIVER_DESC "Marvell USB OTG transceiver driver"
30
31 MODULE_DESCRIPTION(DRIVER_DESC);
32 MODULE_LICENSE("GPL");
33
34 static const char driver_name[] = "mv-otg";
35
36 static char *state_string[] = {
37 "undefined",
38 "b_idle",
39 "b_srp_init",
40 "b_peripheral",
41 "b_wait_acon",
42 "b_host",
43 "a_idle",
44 "a_wait_vrise",
45 "a_wait_bcon",
46 "a_host",
47 "a_suspend",
48 "a_peripheral",
49 "a_wait_vfall",
50 "a_vbus_err"
51 };
52
mv_otg_set_vbus(struct usb_otg * otg,bool on)53 static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
54 {
55 struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy);
56 if (mvotg->pdata->set_vbus == NULL)
57 return -ENODEV;
58
59 return mvotg->pdata->set_vbus(on);
60 }
61
mv_otg_set_host(struct usb_otg * otg,struct usb_bus * host)62 static int mv_otg_set_host(struct usb_otg *otg,
63 struct usb_bus *host)
64 {
65 otg->host = host;
66
67 return 0;
68 }
69
mv_otg_set_peripheral(struct usb_otg * otg,struct usb_gadget * gadget)70 static int mv_otg_set_peripheral(struct usb_otg *otg,
71 struct usb_gadget *gadget)
72 {
73 otg->gadget = gadget;
74
75 return 0;
76 }
77
mv_otg_run_state_machine(struct mv_otg * mvotg,unsigned long delay)78 static void mv_otg_run_state_machine(struct mv_otg *mvotg,
79 unsigned long delay)
80 {
81 dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
82 if (!mvotg->qwork)
83 return;
84
85 queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
86 }
87
mv_otg_timer_await_bcon(struct timer_list * t)88 static void mv_otg_timer_await_bcon(struct timer_list *t)
89 {
90 struct mv_otg *mvotg = from_timer(mvotg, t,
91 otg_ctrl.timer[A_WAIT_BCON_TIMER]);
92
93 mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
94
95 dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
96
97 if (spin_trylock(&mvotg->wq_lock)) {
98 mv_otg_run_state_machine(mvotg, 0);
99 spin_unlock(&mvotg->wq_lock);
100 }
101 }
102
mv_otg_cancel_timer(struct mv_otg * mvotg,unsigned int id)103 static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
104 {
105 struct timer_list *timer;
106
107 if (id >= OTG_TIMER_NUM)
108 return -EINVAL;
109
110 timer = &mvotg->otg_ctrl.timer[id];
111
112 if (timer_pending(timer))
113 del_timer(timer);
114
115 return 0;
116 }
117
mv_otg_set_timer(struct mv_otg * mvotg,unsigned int id,unsigned long interval)118 static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
119 unsigned long interval)
120 {
121 struct timer_list *timer;
122
123 if (id >= OTG_TIMER_NUM)
124 return -EINVAL;
125
126 timer = &mvotg->otg_ctrl.timer[id];
127 if (timer_pending(timer)) {
128 dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
129 return -EBUSY;
130 }
131
132 timer->expires = jiffies + interval;
133 add_timer(timer);
134
135 return 0;
136 }
137
mv_otg_reset(struct mv_otg * mvotg)138 static int mv_otg_reset(struct mv_otg *mvotg)
139 {
140 u32 tmp;
141 int ret;
142
143 /* Stop the controller */
144 tmp = readl(&mvotg->op_regs->usbcmd);
145 tmp &= ~USBCMD_RUN_STOP;
146 writel(tmp, &mvotg->op_regs->usbcmd);
147
148 /* Reset the controller to get default values */
149 writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
150
151 ret = readl_poll_timeout_atomic(&mvotg->op_regs->usbcmd, tmp,
152 (tmp & USBCMD_CTRL_RESET), 10, 10000);
153 if (ret < 0) {
154 dev_err(&mvotg->pdev->dev,
155 "Wait for RESET completed TIMEOUT\n");
156 return ret;
157 }
158
159 writel(0x0, &mvotg->op_regs->usbintr);
160 tmp = readl(&mvotg->op_regs->usbsts);
161 writel(tmp, &mvotg->op_regs->usbsts);
162
163 return 0;
164 }
165
mv_otg_init_irq(struct mv_otg * mvotg)166 static void mv_otg_init_irq(struct mv_otg *mvotg)
167 {
168 u32 otgsc;
169
170 mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
171 | OTGSC_INTR_A_VBUS_VALID;
172 mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
173 | OTGSC_INTSTS_A_VBUS_VALID;
174
175 if (mvotg->pdata->vbus == NULL) {
176 mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
177 | OTGSC_INTR_B_SESSION_END;
178 mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
179 | OTGSC_INTSTS_B_SESSION_END;
180 }
181
182 if (mvotg->pdata->id == NULL) {
183 mvotg->irq_en |= OTGSC_INTR_USB_ID;
184 mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
185 }
186
187 otgsc = readl(&mvotg->op_regs->otgsc);
188 otgsc |= mvotg->irq_en;
189 writel(otgsc, &mvotg->op_regs->otgsc);
190 }
191
mv_otg_start_host(struct mv_otg * mvotg,int on)192 static void mv_otg_start_host(struct mv_otg *mvotg, int on)
193 {
194 #ifdef CONFIG_USB
195 struct usb_otg *otg = mvotg->phy.otg;
196 struct usb_hcd *hcd;
197
198 if (!otg->host)
199 return;
200
201 dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
202
203 hcd = bus_to_hcd(otg->host);
204
205 if (on) {
206 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
207 device_wakeup_enable(hcd->self.controller);
208 } else {
209 usb_remove_hcd(hcd);
210 }
211 #endif /* CONFIG_USB */
212 }
213
mv_otg_start_periphrals(struct mv_otg * mvotg,int on)214 static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
215 {
216 struct usb_otg *otg = mvotg->phy.otg;
217
218 if (!otg->gadget)
219 return;
220
221 dev_info(mvotg->phy.dev, "gadget %s\n", str_on_off(on));
222
223 if (on)
224 usb_gadget_vbus_connect(otg->gadget);
225 else
226 usb_gadget_vbus_disconnect(otg->gadget);
227 }
228
otg_clock_enable(struct mv_otg * mvotg)229 static void otg_clock_enable(struct mv_otg *mvotg)
230 {
231 clk_prepare_enable(mvotg->clk);
232 }
233
otg_clock_disable(struct mv_otg * mvotg)234 static void otg_clock_disable(struct mv_otg *mvotg)
235 {
236 clk_disable_unprepare(mvotg->clk);
237 }
238
mv_otg_enable_internal(struct mv_otg * mvotg)239 static int mv_otg_enable_internal(struct mv_otg *mvotg)
240 {
241 int retval = 0;
242
243 if (mvotg->active)
244 return 0;
245
246 dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
247
248 otg_clock_enable(mvotg);
249 if (mvotg->pdata->phy_init) {
250 retval = mvotg->pdata->phy_init(mvotg->phy_regs);
251 if (retval) {
252 dev_err(&mvotg->pdev->dev,
253 "init phy error %d\n", retval);
254 otg_clock_disable(mvotg);
255 return retval;
256 }
257 }
258 mvotg->active = 1;
259
260 return 0;
261
262 }
263
mv_otg_enable(struct mv_otg * mvotg)264 static int mv_otg_enable(struct mv_otg *mvotg)
265 {
266 if (mvotg->clock_gating)
267 return mv_otg_enable_internal(mvotg);
268
269 return 0;
270 }
271
mv_otg_disable_internal(struct mv_otg * mvotg)272 static void mv_otg_disable_internal(struct mv_otg *mvotg)
273 {
274 if (mvotg->active) {
275 dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
276 if (mvotg->pdata->phy_deinit)
277 mvotg->pdata->phy_deinit(mvotg->phy_regs);
278 otg_clock_disable(mvotg);
279 mvotg->active = 0;
280 }
281 }
282
mv_otg_disable(struct mv_otg * mvotg)283 static void mv_otg_disable(struct mv_otg *mvotg)
284 {
285 if (mvotg->clock_gating)
286 mv_otg_disable_internal(mvotg);
287 }
288
mv_otg_update_inputs(struct mv_otg * mvotg)289 static void mv_otg_update_inputs(struct mv_otg *mvotg)
290 {
291 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
292 u32 otgsc;
293
294 otgsc = readl(&mvotg->op_regs->otgsc);
295
296 if (mvotg->pdata->vbus) {
297 if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
298 otg_ctrl->b_sess_vld = 1;
299 otg_ctrl->b_sess_end = 0;
300 } else {
301 otg_ctrl->b_sess_vld = 0;
302 otg_ctrl->b_sess_end = 1;
303 }
304 } else {
305 otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
306 otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
307 }
308
309 if (mvotg->pdata->id)
310 otg_ctrl->id = !!mvotg->pdata->id->poll();
311 else
312 otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
313
314 if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
315 otg_ctrl->a_bus_req = 1;
316
317 otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
318 otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
319
320 dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
321 dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
322 dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
323 dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
324 dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
325 dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
326 }
327
mv_otg_update_state(struct mv_otg * mvotg)328 static void mv_otg_update_state(struct mv_otg *mvotg)
329 {
330 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
331 int old_state = mvotg->phy.otg->state;
332
333 switch (old_state) {
334 case OTG_STATE_UNDEFINED:
335 mvotg->phy.otg->state = OTG_STATE_B_IDLE;
336 fallthrough;
337 case OTG_STATE_B_IDLE:
338 if (otg_ctrl->id == 0)
339 mvotg->phy.otg->state = OTG_STATE_A_IDLE;
340 else if (otg_ctrl->b_sess_vld)
341 mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL;
342 break;
343 case OTG_STATE_B_PERIPHERAL:
344 if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
345 mvotg->phy.otg->state = OTG_STATE_B_IDLE;
346 break;
347 case OTG_STATE_A_IDLE:
348 if (otg_ctrl->id)
349 mvotg->phy.otg->state = OTG_STATE_B_IDLE;
350 else if (!(otg_ctrl->a_bus_drop) &&
351 (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
352 mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
353 break;
354 case OTG_STATE_A_WAIT_VRISE:
355 if (otg_ctrl->a_vbus_vld)
356 mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
357 break;
358 case OTG_STATE_A_WAIT_BCON:
359 if (otg_ctrl->id || otg_ctrl->a_bus_drop
360 || otg_ctrl->a_wait_bcon_timeout) {
361 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
362 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
363 mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
364 otg_ctrl->a_bus_req = 0;
365 } else if (!otg_ctrl->a_vbus_vld) {
366 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
367 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
368 mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
369 } else if (otg_ctrl->b_conn) {
370 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
371 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
372 mvotg->phy.otg->state = OTG_STATE_A_HOST;
373 }
374 break;
375 case OTG_STATE_A_HOST:
376 if (otg_ctrl->id || !otg_ctrl->b_conn
377 || otg_ctrl->a_bus_drop)
378 mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
379 else if (!otg_ctrl->a_vbus_vld)
380 mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
381 break;
382 case OTG_STATE_A_WAIT_VFALL:
383 if (otg_ctrl->id
384 || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
385 || otg_ctrl->a_bus_req)
386 mvotg->phy.otg->state = OTG_STATE_A_IDLE;
387 break;
388 case OTG_STATE_A_VBUS_ERR:
389 if (otg_ctrl->id || otg_ctrl->a_clr_err
390 || otg_ctrl->a_bus_drop) {
391 otg_ctrl->a_clr_err = 0;
392 mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
393 }
394 break;
395 default:
396 break;
397 }
398 }
399
mv_otg_work(struct work_struct * work)400 static void mv_otg_work(struct work_struct *work)
401 {
402 struct mv_otg *mvotg;
403 struct usb_otg *otg;
404 int old_state;
405
406 mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
407
408 run:
409 /* work queue is single thread, or we need spin_lock to protect */
410 otg = mvotg->phy.otg;
411 old_state = otg->state;
412
413 if (!mvotg->active)
414 return;
415
416 mv_otg_update_inputs(mvotg);
417 mv_otg_update_state(mvotg);
418
419 if (old_state != mvotg->phy.otg->state) {
420 dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
421 state_string[old_state],
422 state_string[mvotg->phy.otg->state]);
423
424 switch (mvotg->phy.otg->state) {
425 case OTG_STATE_B_IDLE:
426 otg->default_a = 0;
427 if (old_state == OTG_STATE_B_PERIPHERAL)
428 mv_otg_start_periphrals(mvotg, 0);
429 mv_otg_reset(mvotg);
430 mv_otg_disable(mvotg);
431 usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE);
432 break;
433 case OTG_STATE_B_PERIPHERAL:
434 mv_otg_enable(mvotg);
435 mv_otg_start_periphrals(mvotg, 1);
436 usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED);
437 break;
438 case OTG_STATE_A_IDLE:
439 otg->default_a = 1;
440 mv_otg_enable(mvotg);
441 if (old_state == OTG_STATE_A_WAIT_VFALL)
442 mv_otg_start_host(mvotg, 0);
443 mv_otg_reset(mvotg);
444 break;
445 case OTG_STATE_A_WAIT_VRISE:
446 mv_otg_set_vbus(otg, 1);
447 break;
448 case OTG_STATE_A_WAIT_BCON:
449 if (old_state != OTG_STATE_A_HOST)
450 mv_otg_start_host(mvotg, 1);
451 mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
452 T_A_WAIT_BCON);
453 /*
454 * Now, we directly enter A_HOST. So set b_conn = 1
455 * here. In fact, it need host driver to notify us.
456 */
457 mvotg->otg_ctrl.b_conn = 1;
458 break;
459 case OTG_STATE_A_HOST:
460 break;
461 case OTG_STATE_A_WAIT_VFALL:
462 /*
463 * Now, we has exited A_HOST. So set b_conn = 0
464 * here. In fact, it need host driver to notify us.
465 */
466 mvotg->otg_ctrl.b_conn = 0;
467 mv_otg_set_vbus(otg, 0);
468 break;
469 case OTG_STATE_A_VBUS_ERR:
470 break;
471 default:
472 break;
473 }
474 goto run;
475 }
476 }
477
mv_otg_irq(int irq,void * dev)478 static irqreturn_t mv_otg_irq(int irq, void *dev)
479 {
480 struct mv_otg *mvotg = dev;
481 u32 otgsc;
482
483 otgsc = readl(&mvotg->op_regs->otgsc);
484 writel(otgsc, &mvotg->op_regs->otgsc);
485
486 /*
487 * if we have vbus, then the vbus detection for B-device
488 * will be done by mv_otg_inputs_irq().
489 */
490 if (mvotg->pdata->vbus)
491 if ((otgsc & OTGSC_STS_USB_ID) &&
492 !(otgsc & OTGSC_INTSTS_USB_ID))
493 return IRQ_NONE;
494
495 if ((otgsc & mvotg->irq_status) == 0)
496 return IRQ_NONE;
497
498 mv_otg_run_state_machine(mvotg, 0);
499
500 return IRQ_HANDLED;
501 }
502
mv_otg_inputs_irq(int irq,void * dev)503 static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
504 {
505 struct mv_otg *mvotg = dev;
506
507 /* The clock may disabled at this time */
508 if (!mvotg->active) {
509 mv_otg_enable(mvotg);
510 mv_otg_init_irq(mvotg);
511 }
512
513 mv_otg_run_state_machine(mvotg, 0);
514
515 return IRQ_HANDLED;
516 }
517
518 static ssize_t
a_bus_req_show(struct device * dev,struct device_attribute * attr,char * buf)519 a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf)
520 {
521 struct mv_otg *mvotg = dev_get_drvdata(dev);
522 return scnprintf(buf, PAGE_SIZE, "%d\n",
523 mvotg->otg_ctrl.a_bus_req);
524 }
525
526 static ssize_t
a_bus_req_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)527 a_bus_req_store(struct device *dev, struct device_attribute *attr,
528 const char *buf, size_t count)
529 {
530 struct mv_otg *mvotg = dev_get_drvdata(dev);
531
532 if (count > 2)
533 return -1;
534
535 /* We will use this interface to change to A device */
536 if (mvotg->phy.otg->state != OTG_STATE_B_IDLE
537 && mvotg->phy.otg->state != OTG_STATE_A_IDLE)
538 return -1;
539
540 /* The clock may disabled and we need to set irq for ID detected */
541 mv_otg_enable(mvotg);
542 mv_otg_init_irq(mvotg);
543
544 if (buf[0] == '1') {
545 mvotg->otg_ctrl.a_bus_req = 1;
546 mvotg->otg_ctrl.a_bus_drop = 0;
547 dev_dbg(&mvotg->pdev->dev,
548 "User request: a_bus_req = 1\n");
549
550 if (spin_trylock(&mvotg->wq_lock)) {
551 mv_otg_run_state_machine(mvotg, 0);
552 spin_unlock(&mvotg->wq_lock);
553 }
554 }
555
556 return count;
557 }
558
559 static DEVICE_ATTR_RW(a_bus_req);
560
561 static ssize_t
a_clr_err_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)562 a_clr_err_store(struct device *dev, struct device_attribute *attr,
563 const char *buf, size_t count)
564 {
565 struct mv_otg *mvotg = dev_get_drvdata(dev);
566 if (!mvotg->phy.otg->default_a)
567 return -1;
568
569 if (count > 2)
570 return -1;
571
572 if (buf[0] == '1') {
573 mvotg->otg_ctrl.a_clr_err = 1;
574 dev_dbg(&mvotg->pdev->dev,
575 "User request: a_clr_err = 1\n");
576 }
577
578 if (spin_trylock(&mvotg->wq_lock)) {
579 mv_otg_run_state_machine(mvotg, 0);
580 spin_unlock(&mvotg->wq_lock);
581 }
582
583 return count;
584 }
585
586 static DEVICE_ATTR_WO(a_clr_err);
587
588 static ssize_t
a_bus_drop_show(struct device * dev,struct device_attribute * attr,char * buf)589 a_bus_drop_show(struct device *dev, struct device_attribute *attr,
590 char *buf)
591 {
592 struct mv_otg *mvotg = dev_get_drvdata(dev);
593 return scnprintf(buf, PAGE_SIZE, "%d\n",
594 mvotg->otg_ctrl.a_bus_drop);
595 }
596
597 static ssize_t
a_bus_drop_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)598 a_bus_drop_store(struct device *dev, struct device_attribute *attr,
599 const char *buf, size_t count)
600 {
601 struct mv_otg *mvotg = dev_get_drvdata(dev);
602 if (!mvotg->phy.otg->default_a)
603 return -1;
604
605 if (count > 2)
606 return -1;
607
608 if (buf[0] == '0') {
609 mvotg->otg_ctrl.a_bus_drop = 0;
610 dev_dbg(&mvotg->pdev->dev,
611 "User request: a_bus_drop = 0\n");
612 } else if (buf[0] == '1') {
613 mvotg->otg_ctrl.a_bus_drop = 1;
614 mvotg->otg_ctrl.a_bus_req = 0;
615 dev_dbg(&mvotg->pdev->dev,
616 "User request: a_bus_drop = 1\n");
617 dev_dbg(&mvotg->pdev->dev,
618 "User request: and a_bus_req = 0\n");
619 }
620
621 if (spin_trylock(&mvotg->wq_lock)) {
622 mv_otg_run_state_machine(mvotg, 0);
623 spin_unlock(&mvotg->wq_lock);
624 }
625
626 return count;
627 }
628
629 static DEVICE_ATTR_RW(a_bus_drop);
630
631 static struct attribute *inputs_attrs[] = {
632 &dev_attr_a_bus_req.attr,
633 &dev_attr_a_clr_err.attr,
634 &dev_attr_a_bus_drop.attr,
635 NULL,
636 };
637
638 static const struct attribute_group inputs_attr_group = {
639 .name = "inputs",
640 .attrs = inputs_attrs,
641 };
642
643 static const struct attribute_group *mv_otg_groups[] = {
644 &inputs_attr_group,
645 NULL,
646 };
647
mv_otg_remove(struct platform_device * pdev)648 static void mv_otg_remove(struct platform_device *pdev)
649 {
650 struct mv_otg *mvotg = platform_get_drvdata(pdev);
651
652 if (mvotg->qwork)
653 destroy_workqueue(mvotg->qwork);
654
655 mv_otg_disable(mvotg);
656
657 usb_remove_phy(&mvotg->phy);
658 }
659
mv_otg_probe(struct platform_device * pdev)660 static int mv_otg_probe(struct platform_device *pdev)
661 {
662 struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
663 struct mv_otg *mvotg;
664 struct usb_otg *otg;
665 struct resource *r;
666 int retval = 0, i;
667
668 if (pdata == NULL) {
669 dev_err(&pdev->dev, "failed to get platform data\n");
670 return -ENODEV;
671 }
672
673 mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
674 if (!mvotg)
675 return -ENOMEM;
676
677 otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
678 if (!otg)
679 return -ENOMEM;
680
681 platform_set_drvdata(pdev, mvotg);
682
683 mvotg->pdev = pdev;
684 mvotg->pdata = pdata;
685
686 mvotg->clk = devm_clk_get(&pdev->dev, NULL);
687 if (IS_ERR(mvotg->clk))
688 return PTR_ERR(mvotg->clk);
689
690 mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
691 if (!mvotg->qwork) {
692 dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
693 return -ENOMEM;
694 }
695
696 INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
697
698 /* OTG common part */
699 mvotg->pdev = pdev;
700 mvotg->phy.dev = &pdev->dev;
701 mvotg->phy.otg = otg;
702 mvotg->phy.label = driver_name;
703
704 otg->state = OTG_STATE_UNDEFINED;
705 otg->usb_phy = &mvotg->phy;
706 otg->set_host = mv_otg_set_host;
707 otg->set_peripheral = mv_otg_set_peripheral;
708 otg->set_vbus = mv_otg_set_vbus;
709
710 for (i = 0; i < OTG_TIMER_NUM; i++)
711 timer_setup(&mvotg->otg_ctrl.timer[i],
712 mv_otg_timer_await_bcon, 0);
713
714 r = platform_get_resource_byname(mvotg->pdev,
715 IORESOURCE_MEM, "phyregs");
716 if (r == NULL) {
717 dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
718 retval = -ENODEV;
719 goto err_destroy_workqueue;
720 }
721
722 mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
723 if (mvotg->phy_regs == NULL) {
724 dev_err(&pdev->dev, "failed to map phy I/O memory\n");
725 retval = -EFAULT;
726 goto err_destroy_workqueue;
727 }
728
729 r = platform_get_resource_byname(mvotg->pdev,
730 IORESOURCE_MEM, "capregs");
731 if (r == NULL) {
732 dev_err(&pdev->dev, "no I/O memory resource defined\n");
733 retval = -ENODEV;
734 goto err_destroy_workqueue;
735 }
736
737 mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
738 if (mvotg->cap_regs == NULL) {
739 dev_err(&pdev->dev, "failed to map I/O memory\n");
740 retval = -EFAULT;
741 goto err_destroy_workqueue;
742 }
743
744 /* we will acces controller register, so enable the udc controller */
745 retval = mv_otg_enable_internal(mvotg);
746 if (retval) {
747 dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
748 goto err_destroy_workqueue;
749 }
750
751 mvotg->op_regs =
752 (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
753 + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
754
755 if (pdata->id) {
756 retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
757 NULL, mv_otg_inputs_irq,
758 IRQF_ONESHOT, "id", mvotg);
759 if (retval) {
760 dev_info(&pdev->dev,
761 "Failed to request irq for ID\n");
762 pdata->id = NULL;
763 }
764 }
765
766 if (pdata->vbus) {
767 mvotg->clock_gating = 1;
768 retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
769 NULL, mv_otg_inputs_irq,
770 IRQF_ONESHOT, "vbus", mvotg);
771 if (retval) {
772 dev_info(&pdev->dev,
773 "Failed to request irq for VBUS, "
774 "disable clock gating\n");
775 mvotg->clock_gating = 0;
776 pdata->vbus = NULL;
777 }
778 }
779
780 if (pdata->disable_otg_clock_gating)
781 mvotg->clock_gating = 0;
782
783 mv_otg_reset(mvotg);
784 mv_otg_init_irq(mvotg);
785
786 r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
787 if (r == NULL) {
788 dev_err(&pdev->dev, "no IRQ resource defined\n");
789 retval = -ENODEV;
790 goto err_disable_clk;
791 }
792
793 mvotg->irq = r->start;
794 if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
795 driver_name, mvotg)) {
796 dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
797 mvotg->irq);
798 mvotg->irq = 0;
799 retval = -ENODEV;
800 goto err_disable_clk;
801 }
802
803 retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
804 if (retval < 0) {
805 dev_err(&pdev->dev, "can't register transceiver, %d\n",
806 retval);
807 goto err_disable_clk;
808 }
809
810 spin_lock_init(&mvotg->wq_lock);
811 if (spin_trylock(&mvotg->wq_lock)) {
812 mv_otg_run_state_machine(mvotg, 2 * HZ);
813 spin_unlock(&mvotg->wq_lock);
814 }
815
816 dev_info(&pdev->dev,
817 "successful probe OTG device %s clock gating.\n",
818 mvotg->clock_gating ? "with" : "without");
819
820 return 0;
821
822 err_disable_clk:
823 mv_otg_disable_internal(mvotg);
824 err_destroy_workqueue:
825 destroy_workqueue(mvotg->qwork);
826
827 return retval;
828 }
829
830 #ifdef CONFIG_PM
mv_otg_suspend(struct platform_device * pdev,pm_message_t state)831 static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
832 {
833 struct mv_otg *mvotg = platform_get_drvdata(pdev);
834
835 if (mvotg->phy.otg->state != OTG_STATE_B_IDLE) {
836 dev_info(&pdev->dev,
837 "OTG state is not B_IDLE, it is %d!\n",
838 mvotg->phy.otg->state);
839 return -EAGAIN;
840 }
841
842 if (!mvotg->clock_gating)
843 mv_otg_disable_internal(mvotg);
844
845 return 0;
846 }
847
mv_otg_resume(struct platform_device * pdev)848 static int mv_otg_resume(struct platform_device *pdev)
849 {
850 struct mv_otg *mvotg = platform_get_drvdata(pdev);
851 u32 otgsc;
852
853 if (!mvotg->clock_gating) {
854 mv_otg_enable_internal(mvotg);
855
856 otgsc = readl(&mvotg->op_regs->otgsc);
857 otgsc |= mvotg->irq_en;
858 writel(otgsc, &mvotg->op_regs->otgsc);
859
860 if (spin_trylock(&mvotg->wq_lock)) {
861 mv_otg_run_state_machine(mvotg, 0);
862 spin_unlock(&mvotg->wq_lock);
863 }
864 }
865 return 0;
866 }
867 #endif
868
869 static struct platform_driver mv_otg_driver = {
870 .probe = mv_otg_probe,
871 .remove = mv_otg_remove,
872 .driver = {
873 .name = driver_name,
874 .dev_groups = mv_otg_groups,
875 },
876 #ifdef CONFIG_PM
877 .suspend = mv_otg_suspend,
878 .resume = mv_otg_resume,
879 #endif
880 };
881 module_platform_driver(mv_otg_driver);
882