1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 *
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/bitmap.h>
9 #include <linux/bitops.h>
10 #include <linux/cleanup.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/mutex.h>
16 #include <linux/nvmem-consumer.h>
17 #include <linux/of.h>
18 #include <linux/regmap.h>
19 #include <linux/sizes.h>
20 #include <linux/slab.h>
21 #include <linux/soc/qcom/llcc-qcom.h>
22
23 #define ACTIVATE BIT(0)
24 #define DEACTIVATE BIT(1)
25 #define ACT_CLEAR BIT(0)
26 #define ACT_COMPLETE BIT(4)
27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
29 #define ACT_CTRL_ACT_TRIG BIT(0)
30 #define ACT_CTRL_OPCODE_SHIFT 1
31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2
32 #define ATTR1_FIXED_SIZE_SHIFT 3
33 #define ATTR1_PRIORITY_SHIFT 4
34 #define ATTR1_MAX_CAP_SHIFT 16
35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0)
36 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16)
37 #define ATTR0_BONUS_WAYS_SHIFT 16
38 #define LLCC_STATUS_READ_DELAY 100
39
40 #define CACHE_LINE_SIZE_SHIFT 6
41
42 #define LLCC_LB_CNT_MASK GENMASK(31, 28)
43 #define LLCC_LB_CNT_SHIFT 28
44
45 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K)
46 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K)
47 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K)
48 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K)
49 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
50 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
51 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
52
53 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
54 #define LLCC_TRP_PCB_ACT 0x21f04
55 #define LLCC_TRP_ALGO_CFG1 0x21f0c
56 #define LLCC_TRP_ALGO_CFG2 0x21f10
57 #define LLCC_TRP_ALGO_CFG3 0x21f14
58 #define LLCC_TRP_ALGO_CFG4 0x21f18
59 #define LLCC_TRP_ALGO_CFG5 0x21f1c
60 #define LLCC_TRP_WRSC_EN 0x21f20
61 #define LLCC_TRP_ALGO_CFG6 0x21f24
62 #define LLCC_TRP_ALGO_CFG7 0x21f28
63 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c
64 #define LLCC_TRP_ALGO_CFG8 0x21f30
65
66 #define LLCC_VERSION_2_0_0_0 0x02000000
67 #define LLCC_VERSION_2_1_0_0 0x02010000
68 #define LLCC_VERSION_4_1_0_0 0x04010000
69
70 /**
71 * struct llcc_slice_config - Data associated with the llcc slice
72 * @usecase_id: Unique id for the client's use case
73 * @slice_id: llcc slice id for each client
74 * @max_cap: The maximum capacity of the cache slice provided in KB
75 * @priority: Priority of the client used to select victim line for replacement
76 * @fixed_size: Boolean indicating if the slice has a fixed capacity
77 * @bonus_ways: Bonus ways are additional ways to be used for any slice,
78 * if client ends up using more than reserved cache ways. Bonus
79 * ways are allocated only if they are not reserved for some
80 * other client.
81 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot
82 * be used by any other client than the one its assigned to.
83 * @cache_mode: Each slice operates as a cache, this controls the mode of the
84 * slice: normal or TCM(Tightly Coupled Memory)
85 * @probe_target_ways: Determines what ways to probe for access hit. When
86 * configured to 1 only bonus and reserved ways are probed.
87 * When configured to 0 all ways in llcc are probed.
88 * @dis_cap_alloc: Disable capacity based allocation for a client
89 * @retain_on_pc: If this bit is set and client has maintained active vote
90 * then the ways assigned to this client are not flushed on power
91 * collapse.
92 * @activate_on_init: Activate the slice immediately after it is programmed
93 * @write_scid_en: Bit enables write cache support for a given scid.
94 * @write_scid_cacheable_en: Enables write cache cacheable support for a
95 * given scid (not supported on v2 or older hardware).
96 * @stale_en: Bit enables stale.
97 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
98 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
99 * under-cap.
100 * @mru_rollover: Roll-over on reserved cache ways.
101 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
102 * same-scid lines for replacement.
103 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
104 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
105 * over-cap scid. Depends on corresponding bit being set in
106 * ovcap_en.
107 * @vict_prio: When current scid is under-capacity, allocate over other
108 * lower-than victim priority-line threshold scid.
109 */
110 struct llcc_slice_config {
111 u32 usecase_id;
112 u32 slice_id;
113 u32 max_cap;
114 u32 priority;
115 bool fixed_size;
116 u32 bonus_ways;
117 u32 res_ways;
118 u32 cache_mode;
119 u32 probe_target_ways;
120 bool dis_cap_alloc;
121 bool retain_on_pc;
122 bool activate_on_init;
123 bool write_scid_en;
124 bool write_scid_cacheable_en;
125 bool stale_en;
126 bool stale_cap_en;
127 bool mru_uncap_en;
128 bool mru_rollover;
129 bool alloc_oneway_en;
130 bool ovcap_en;
131 bool ovcap_prio;
132 bool vict_prio;
133 };
134
135 struct qcom_llcc_config {
136 const struct llcc_slice_config *sct_data;
137 const u32 *reg_offset;
138 const struct llcc_edac_reg_offset *edac_reg_offset;
139 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */
140 u32 num_banks;
141 int size;
142 bool skip_llcc_cfg;
143 bool no_edac;
144 bool irq_configured;
145 bool no_broadcast_register;
146 };
147
148 struct qcom_sct_config {
149 const struct qcom_llcc_config *llcc_config;
150 int num_config;
151 };
152
153 enum llcc_reg_offset {
154 LLCC_COMMON_HW_INFO,
155 LLCC_COMMON_STATUS0,
156 };
157
158 static const struct llcc_slice_config ipq5424_data[] = {
159 {
160 .usecase_id = LLCC_CPUSS,
161 .slice_id = 1,
162 .max_cap = 768,
163 .priority = 1,
164 .bonus_ways = 0xFFFF,
165 .retain_on_pc = true,
166 .activate_on_init = true,
167 .write_scid_cacheable_en = true,
168 .stale_en = true,
169 .stale_cap_en = true,
170 .alloc_oneway_en = true,
171 .ovcap_en = true,
172 .ovcap_prio = true,
173 .vict_prio = true,
174 },
175 {
176 .usecase_id = LLCC_VIDSC0,
177 .slice_id = 2,
178 .max_cap = 256,
179 .priority = 2,
180 .fixed_size = true,
181 .bonus_ways = 0xF000,
182 .retain_on_pc = true,
183 .activate_on_init = true,
184 .write_scid_cacheable_en = true,
185 .stale_en = true,
186 .stale_cap_en = true,
187 },
188 };
189
190 static const struct llcc_slice_config sa8775p_data[] = {
191 {
192 .usecase_id = LLCC_CPUSS,
193 .slice_id = 1,
194 .max_cap = 2048,
195 .priority = 1,
196 .bonus_ways = 0xff,
197 .cache_mode = 0,
198 .retain_on_pc = true,
199 .activate_on_init = true,
200 }, {
201 .usecase_id = LLCC_VIDSC0,
202 .slice_id = 2,
203 .max_cap = 512,
204 .priority = 3,
205 .fixed_size = true,
206 .bonus_ways = 0xff,
207 .cache_mode = 0,
208 .retain_on_pc = true,
209 }, {
210 .usecase_id = LLCC_CPUSS1,
211 .slice_id = 3,
212 .max_cap = 1024,
213 .priority = 1,
214 .fixed_size = true,
215 .bonus_ways = 0xff,
216 .cache_mode = 0,
217 .retain_on_pc = true,
218 }, {
219 .usecase_id = LLCC_CPUHWT,
220 .slice_id = 5,
221 .max_cap = 512,
222 .priority = 1,
223 .fixed_size = true,
224 .bonus_ways = 0xff,
225 .cache_mode = 0,
226 .retain_on_pc = true,
227 }, {
228 .usecase_id = LLCC_AUDIO,
229 .slice_id = 6,
230 .max_cap = 1024,
231 .priority = 1,
232 .fixed_size = true,
233 .bonus_ways = 0xff,
234 .cache_mode = 0,
235 }, {
236 .usecase_id = LLCC_CMPT,
237 .slice_id = 10,
238 .max_cap = 4096,
239 .priority = 1,
240 .fixed_size = true,
241 .bonus_ways = 0xff,
242 .cache_mode = 0,
243 .retain_on_pc = true,
244 }, {
245 .usecase_id = LLCC_GPUHTW,
246 .slice_id = 11,
247 .max_cap = 1024,
248 .priority = 1,
249 .fixed_size = true,
250 .bonus_ways = 0xff,
251 .cache_mode = 0,
252 .retain_on_pc = true,
253 }, {
254 .usecase_id = LLCC_GPU,
255 .slice_id = 12,
256 .max_cap = 1024,
257 .priority = 1,
258 .fixed_size = true,
259 .bonus_ways = 0xff,
260 .cache_mode = 0,
261 .retain_on_pc = true,
262 .write_scid_en = true,
263 }, {
264 .usecase_id = LLCC_MMUHWT,
265 .slice_id = 13,
266 .max_cap = 1024,
267 .priority = 1,
268 .fixed_size = true,
269 .bonus_ways = 0xff,
270 .cache_mode = 0,
271 .activate_on_init = true,
272 }, {
273 .usecase_id = LLCC_CMPTDMA,
274 .slice_id = 15,
275 .max_cap = 1024,
276 .priority = 1,
277 .fixed_size = true,
278 .bonus_ways = 0xff,
279 .cache_mode = 0,
280 .retain_on_pc = true,
281 }, {
282 .usecase_id = LLCC_DISP,
283 .slice_id = 16,
284 .max_cap = 4096,
285 .priority = 2,
286 .fixed_size = true,
287 .bonus_ways = 0xff,
288 .cache_mode = 0,
289 .retain_on_pc = true,
290 }, {
291 .usecase_id = LLCC_VIDFW,
292 .slice_id = 17,
293 .max_cap = 3072,
294 .priority = 1,
295 .bonus_ways = 0xff,
296 .cache_mode = 0,
297 .retain_on_pc = true,
298 }, {
299 .usecase_id = LLCC_AUDHW,
300 .slice_id = 22,
301 .max_cap = 1024,
302 .priority = 1,
303 .fixed_size = true,
304 .bonus_ways = 0xff,
305 .cache_mode = 0,
306 }, {
307 .usecase_id = LLCC_CVP,
308 .slice_id = 28,
309 .max_cap = 256,
310 .priority = 3,
311 .fixed_size = true,
312 .bonus_ways = 0xff,
313 .cache_mode = 0,
314 .retain_on_pc = true,
315 }, {
316 .usecase_id = LLCC_APTCM,
317 .slice_id = 30,
318 .max_cap = 1024,
319 .priority = 3,
320 .fixed_size = true,
321 .res_ways = 0xf0,
322 .cache_mode = 1,
323 .retain_on_pc = true,
324 }, {
325 .usecase_id = LLCC_WRCACHE,
326 .slice_id = 31,
327 .max_cap = 512,
328 .priority = 1,
329 .fixed_size = true,
330 .bonus_ways = 0xff,
331 .cache_mode = 0,
332 .activate_on_init = true,
333 },
334 };
335
336 static const struct llcc_slice_config sar1130p_data[] = {
337 {
338 .usecase_id = LLCC_CPUSS,
339 .slice_id = 1,
340 .max_cap = 4096,
341 .priority = 1,
342 .bonus_ways = 0x1fff,
343 .res_ways = 0x0,
344 .cache_mode = 0,
345 .retain_on_pc = true,
346 .activate_on_init = true,
347 }, {
348 .usecase_id = LLCC_VIDSC0,
349 .slice_id = 2,
350 .max_cap = 512,
351 .priority = 3,
352 .fixed_size = true,
353 .bonus_ways = 0x1fff,
354 .res_ways = 0x0,
355 .cache_mode = 0,
356 .retain_on_pc = true,
357 }, {
358 .usecase_id = LLCC_AUDIO,
359 .slice_id = 6,
360 .max_cap = 1024,
361 .priority = 3,
362 .fixed_size = true,
363 .bonus_ways = 0x1fff,
364 .res_ways = 0x0,
365 .cache_mode = 0,
366 .retain_on_pc = true,
367 }, {
368 .usecase_id = LLCC_CMPT,
369 .slice_id = 10,
370 .max_cap = 1024,
371 .priority = 1,
372 .fixed_size = true,
373 .bonus_ways = 0x1fff,
374 .res_ways = 0x0,
375 .cache_mode = 0,
376 .retain_on_pc = true,
377 }, {
378 .usecase_id = LLCC_GPUHTW,
379 .slice_id = 11,
380 .max_cap = 0,
381 .priority = 1,
382 .fixed_size = true,
383 .bonus_ways = 0x1fff,
384 .res_ways = 0x0,
385 .cache_mode = 0,
386 .retain_on_pc = true,
387 }, {
388 .usecase_id = LLCC_GPU,
389 .slice_id = 12,
390 .max_cap = 3072,
391 .priority = 3,
392 .fixed_size = true,
393 .bonus_ways = 0x1fff,
394 .res_ways = 0x0,
395 .cache_mode = 0,
396 .retain_on_pc = true,
397 .write_scid_en = true,
398 }, {
399 .usecase_id = LLCC_MMUHWT,
400 .slice_id = 13,
401 .max_cap = 512,
402 .priority = 1,
403 .fixed_size = true,
404 .bonus_ways = 0x1fff,
405 .res_ways = 0x0,
406 .cache_mode = 0,
407 }, {
408 .usecase_id = LLCC_DISP,
409 .slice_id = 16,
410 .max_cap = 12800,
411 .priority = 1,
412 .fixed_size = true,
413 .bonus_ways = 0x1fff,
414 .res_ways = 0x0,
415 .cache_mode = 0,
416 .retain_on_pc = true,
417 }, {
418 .usecase_id = LLCC_CVP,
419 .slice_id = 28,
420 .max_cap = 256,
421 .priority = 3,
422 .fixed_size = true,
423 .bonus_ways = 0x1fff,
424 .res_ways = 0x0,
425 .cache_mode = 0,
426 .retain_on_pc = true,
427 }, {
428 .usecase_id = LLCC_APTCM,
429 .slice_id = 26,
430 .max_cap = 2048,
431 .priority = 3,
432 .fixed_size = true,
433 .bonus_ways = 0x0,
434 .res_ways = 0x3,
435 .cache_mode = true,
436 .dis_cap_alloc = true,
437 .retain_on_pc = true,
438 }, {
439 .usecase_id = LLCC_WRCACHE,
440 .slice_id = 31,
441 .max_cap = 256,
442 .priority = 1,
443 .fixed_size = true,
444 .bonus_ways = 0x1fff,
445 .res_ways = 0x0,
446 .cache_mode = 0,
447 .activate_on_init = true,
448 }, {
449 .usecase_id = LLCC_AENPU,
450 .slice_id = 30,
451 .max_cap = 3072,
452 .priority = 3,
453 .fixed_size = true,
454 .bonus_ways = 0x1fff,
455 .res_ways = 0x0,
456 .cache_mode = 0,
457 .retain_on_pc = true,
458 }, {
459 .usecase_id = LLCC_DISP_LEFT,
460 .slice_id = 17,
461 .max_cap = 0,
462 .priority = 1,
463 .fixed_size = true,
464 .bonus_ways = 0x0,
465 .res_ways = 0x0,
466 .cache_mode = 0,
467 .retain_on_pc = true,
468 }, {
469 .usecase_id = LLCC_DISP_RIGHT,
470 .slice_id = 18,
471 .max_cap = 0,
472 .priority = 1,
473 .fixed_size = true,
474 .bonus_ways = 0x0,
475 .res_ways = 0x0,
476 .cache_mode = 0,
477 .retain_on_pc = true,
478 }, {
479 .usecase_id = LLCC_EVCS_LEFT,
480 .slice_id = 22,
481 .max_cap = 0,
482 .priority = 1,
483 .fixed_size = true,
484 .bonus_ways = 0x0,
485 .res_ways = 0x0,
486 .cache_mode = 0,
487 .retain_on_pc = true,
488 }, {
489 .usecase_id = LLCC_EVCS_RIGHT,
490 .slice_id = 23,
491 .max_cap = 0,
492 .priority = 1,
493 .fixed_size = true,
494 .bonus_ways = 0x0,
495 .res_ways = 0x0,
496 .cache_mode = 0,
497 .retain_on_pc = true,
498 },
499 };
500
501 static const struct llcc_slice_config sar2130p_data[] = {
502 {
503 .usecase_id = LLCC_CPUSS,
504 .slice_id = 1,
505 .max_cap = 6144,
506 .priority = 1,
507 .fixed_size = 0,
508 .bonus_ways = 0x3fffffff,
509 .res_ways = 0x0,
510 .cache_mode = 0,
511 .retain_on_pc = true,
512 .activate_on_init = true,
513 }, {
514 .usecase_id = LLCC_VIDSC0,
515 .slice_id = 2,
516 .max_cap = 128,
517 .priority = 2,
518 .fixed_size = true,
519 .bonus_ways = 0x3fffffff,
520 .res_ways = 0x0,
521 .cache_mode = 0,
522 .retain_on_pc = true,
523 }, {
524 .usecase_id = LLCC_AUDIO,
525 .slice_id = 6,
526 .max_cap = 1024,
527 .priority = 3,
528 .fixed_size = true,
529 .bonus_ways = 0x3fffffff,
530 .res_ways = 0x0,
531 .cache_mode = 0,
532 .retain_on_pc = true,
533 }, {
534 .usecase_id = LLCC_CMPT,
535 .slice_id = 10,
536 .max_cap = 1024,
537 .priority = 1,
538 .fixed_size = true,
539 .bonus_ways = 0x3fffffff,
540 .res_ways = 0x0,
541 .cache_mode = 0,
542 .retain_on_pc = true,
543 }, {
544 .usecase_id = LLCC_GPUHTW,
545 .slice_id = 11,
546 .max_cap = 0,
547 .priority = 1,
548 .fixed_size = true,
549 .bonus_ways = 0x3fffffff,
550 .res_ways = 0x0,
551 .cache_mode = 0,
552 .retain_on_pc = true,
553 }, {
554 .usecase_id = LLCC_GPU,
555 .slice_id = 12,
556 .max_cap = 1536,
557 .priority = 2,
558 .fixed_size = true,
559 .bonus_ways = 0x3fffffff,
560 .res_ways = 0x0,
561 .cache_mode = 0,
562 .retain_on_pc = true,
563 .write_scid_en = true,
564 }, {
565 .usecase_id = LLCC_MMUHWT,
566 .slice_id = 13,
567 .max_cap = 1024,
568 .priority = 1,
569 .fixed_size = true,
570 .bonus_ways = 0x3fffffff,
571 .res_ways = 0x0,
572 .cache_mode = 0,
573 .activate_on_init = true,
574 }, {
575 .usecase_id = LLCC_DISP,
576 .slice_id = 16,
577 .max_cap = 0,
578 .priority = 1,
579 .fixed_size = true,
580 .bonus_ways = 0x3fffffff,
581 .res_ways = 0x0,
582 .cache_mode = 0,
583 .retain_on_pc = true,
584 }, {
585 .usecase_id = LLCC_APTCM,
586 .slice_id = 26,
587 .max_cap = 2048,
588 .priority = 3,
589 .fixed_size = true,
590 .bonus_ways = 0x0,
591 .res_ways = 0x3,
592 .cache_mode = true,
593 .dis_cap_alloc = true,
594 .retain_on_pc = true,
595 }, {
596 .usecase_id = LLCC_WRCACHE,
597 .slice_id = 31,
598 .max_cap = 256,
599 .priority = 1,
600 .fixed_size = true,
601 .bonus_ways = 0x3fffffff,
602 .res_ways = 0x0,
603 .cache_mode = 0,
604 .activate_on_init = true,
605 }, {
606 .usecase_id = LLCC_VIEYE,
607 .slice_id = 7,
608 .max_cap = 7168,
609 .priority = 4,
610 .fixed_size = true,
611 .bonus_ways = 0x3fffffff,
612 .res_ways = 0x0,
613 .cache_mode = 0,
614 .retain_on_pc = true,
615 }, {
616 .usecase_id = LLCC_VIDPTH,
617 .slice_id = 8,
618 .max_cap = 7168,
619 .priority = 4,
620 .fixed_size = true,
621 .bonus_ways = 0x3fffffff,
622 .res_ways = 0x0,
623 .cache_mode = 0,
624 .retain_on_pc = true,
625 }, {
626 .usecase_id = LLCC_GPUMV,
627 .slice_id = 9,
628 .max_cap = 2048,
629 .priority = 2,
630 .fixed_size = true,
631 .bonus_ways = 0x3fffffff,
632 .res_ways = 0x0,
633 .cache_mode = 0,
634 .retain_on_pc = true,
635 }, {
636 .usecase_id = LLCC_EVA_LEFT,
637 .slice_id = 20,
638 .max_cap = 7168,
639 .priority = 5,
640 .fixed_size = true,
641 .bonus_ways = 0x3ffffffc,
642 .res_ways = 0x0,
643 .cache_mode = 0,
644 .retain_on_pc = true,
645 }, {
646 .usecase_id = LLCC_EVA_RIGHT,
647 .slice_id = 21,
648 .max_cap = 7168,
649 .priority = 5,
650 .fixed_size = true,
651 .bonus_ways = 0x3ffffffc,
652 .res_ways = 0x0,
653 .cache_mode = 0,
654 .retain_on_pc = true,
655 }, {
656 .usecase_id = LLCC_EVAGAIN,
657 .slice_id = 25,
658 .max_cap = 1024,
659 .priority = 2,
660 .fixed_size = true,
661 .bonus_ways = 0x3fffffff,
662 .res_ways = 0x0,
663 .cache_mode = 0,
664 .retain_on_pc = true,
665 }, {
666 .usecase_id = LLCC_AENPU,
667 .slice_id = 30,
668 .max_cap = 3072,
669 .priority = 3,
670 .fixed_size = true,
671 .bonus_ways = 0x3fffffff,
672 .res_ways = 0x0,
673 .cache_mode = 0,
674 .retain_on_pc = true,
675 }, {
676 .usecase_id = LLCC_VIPTH,
677 .slice_id = 29,
678 .max_cap = 1024,
679 .priority = 4,
680 .fixed_size = true,
681 .bonus_ways = 0x3fffffff,
682 .res_ways = 0x0,
683 .cache_mode = 0,
684 .retain_on_pc = true,
685 }, {
686 .usecase_id = LLCC_DISP_LEFT,
687 .slice_id = 17,
688 .max_cap = 0,
689 .priority = 1,
690 .fixed_size = true,
691 .bonus_ways = 0x0,
692 .res_ways = 0x0,
693 .cache_mode = 0,
694 .retain_on_pc = true,
695 }, {
696 .usecase_id = LLCC_DISP_RIGHT,
697 .slice_id = 18,
698 .max_cap = 0,
699 .priority = 1,
700 .fixed_size = true,
701 .bonus_ways = 0x0,
702 .res_ways = 0x0,
703 .cache_mode = 0,
704 .retain_on_pc = true,
705 }, {
706 .usecase_id = LLCC_EVCS_LEFT,
707 .slice_id = 22,
708 .max_cap = 0,
709 .priority = 1,
710 .fixed_size = true,
711 .bonus_ways = 0x0,
712 .res_ways = 0x0,
713 .cache_mode = 0,
714 .retain_on_pc = true,
715 }, {
716 .usecase_id = LLCC_EVCS_RIGHT,
717 .slice_id = 23,
718 .max_cap = 0,
719 .priority = 1,
720 .fixed_size = true,
721 .bonus_ways = 0x0,
722 .res_ways = 0x0,
723 .cache_mode = 0,
724 .retain_on_pc = true,
725 }, {
726 .usecase_id = LLCC_SPAD,
727 .slice_id = 24,
728 .max_cap = 7168,
729 .priority = 1,
730 .fixed_size = true,
731 .bonus_ways = 0x0,
732 .res_ways = 0x0,
733 .cache_mode = 0,
734 .retain_on_pc = true,
735 },
736 };
737
738 static const struct llcc_slice_config sc7180_data[] = {
739 {
740 .usecase_id = LLCC_CPUSS,
741 .slice_id = 1,
742 .max_cap = 256,
743 .priority = 1,
744 .bonus_ways = 0xf,
745 .cache_mode = 0,
746 .retain_on_pc = true,
747 .activate_on_init = true,
748 }, {
749 .usecase_id = LLCC_MDM,
750 .slice_id = 8,
751 .max_cap = 128,
752 .priority = 1,
753 .bonus_ways = 0xf,
754 .cache_mode = 0,
755 .retain_on_pc = true,
756 }, {
757 .usecase_id = LLCC_GPUHTW,
758 .slice_id = 11,
759 .max_cap = 128,
760 .priority = 1,
761 .bonus_ways = 0xf,
762 .cache_mode = 0,
763 .retain_on_pc = true,
764 }, {
765 .usecase_id = LLCC_GPU,
766 .slice_id = 12,
767 .max_cap = 128,
768 .priority = 1,
769 .bonus_ways = 0xf,
770 .cache_mode = 0,
771 .retain_on_pc = true,
772 },
773 };
774
775 static const struct llcc_slice_config sc7280_data[] = {
776 {
777 .usecase_id = LLCC_CPUSS,
778 .slice_id = 1,
779 .max_cap = 768,
780 .priority = 1,
781 .bonus_ways = 0x3f,
782 .cache_mode = 0,
783 .retain_on_pc = true,
784 .activate_on_init = true,
785 }, {
786 .usecase_id = LLCC_MDMHPGRW,
787 .slice_id = 7,
788 .max_cap = 512,
789 .priority = 2,
790 .fixed_size = true,
791 .bonus_ways = 0x3f,
792 .cache_mode = 0,
793 .retain_on_pc = true,
794 }, {
795 .usecase_id = LLCC_CMPT,
796 .slice_id = 10,
797 .max_cap = 768,
798 .priority = 1,
799 .fixed_size = true,
800 .bonus_ways = 0x3f,
801 .cache_mode = 0,
802 .retain_on_pc = true,
803 }, {
804 .usecase_id = LLCC_GPUHTW,
805 .slice_id = 11,
806 .max_cap = 256,
807 .priority = 1,
808 .fixed_size = true,
809 .bonus_ways = 0x3f,
810 .cache_mode = 0,
811 .retain_on_pc = true,
812 }, {
813 .usecase_id = LLCC_GPU,
814 .slice_id = 12,
815 .max_cap = 512,
816 .priority = 1,
817 .bonus_ways = 0x3f,
818 .cache_mode = 0,
819 .retain_on_pc = true,
820 }, {
821 .usecase_id = LLCC_MMUHWT,
822 .slice_id = 13,
823 .max_cap = 256,
824 .priority = 1,
825 .fixed_size = true,
826 .bonus_ways = 0x3f,
827 .cache_mode = 0,
828 .activate_on_init = true,
829 }, {
830 .usecase_id = LLCC_MDMPNG,
831 .slice_id = 21,
832 .max_cap = 768,
833 .priority = 0,
834 .fixed_size = true,
835 .bonus_ways = 0x3f,
836 .cache_mode = 0,
837 .retain_on_pc = true,
838 }, {
839 .usecase_id = LLCC_WLHW,
840 .slice_id = 24,
841 .max_cap = 256,
842 .priority = 1,
843 .fixed_size = true,
844 .bonus_ways = 0x3f,
845 .cache_mode = 0,
846 .retain_on_pc = true,
847 }, {
848 .usecase_id = LLCC_MODPE,
849 .slice_id = 29,
850 .max_cap = 64,
851 .priority = 1,
852 .fixed_size = true,
853 .bonus_ways = 0x3f,
854 .cache_mode = 0,
855 .retain_on_pc = true,
856 },
857 };
858
859 static const struct llcc_slice_config sc8180x_data[] = {
860 {
861 .usecase_id = LLCC_CPUSS,
862 .slice_id = 1,
863 .max_cap = 6144,
864 .priority = 1,
865 .fixed_size = true,
866 .bonus_ways = 0xfff,
867 .cache_mode = 0,
868 .retain_on_pc = true,
869 .activate_on_init = true,
870 }, {
871 .usecase_id = LLCC_VIDSC0,
872 .slice_id = 2,
873 .max_cap = 512,
874 .priority = 2,
875 .fixed_size = true,
876 .bonus_ways = 0xfff,
877 .cache_mode = 0,
878 .retain_on_pc = true,
879 }, {
880 .usecase_id = LLCC_VIDSC1,
881 .slice_id = 3,
882 .max_cap = 512,
883 .priority = 2,
884 .fixed_size = true,
885 .bonus_ways = 0xfff,
886 .cache_mode = 0,
887 .retain_on_pc = true,
888 }, {
889 .usecase_id = LLCC_AUDIO,
890 .slice_id = 6,
891 .max_cap = 1024,
892 .priority = 1,
893 .fixed_size = true,
894 .bonus_ways = 0xfff,
895 .cache_mode = 0,
896 .retain_on_pc = true,
897 }, {
898 .usecase_id = LLCC_MDMHPGRW,
899 .slice_id = 7,
900 .max_cap = 3072,
901 .priority = 1,
902 .fixed_size = true,
903 .bonus_ways = 0x3ff,
904 .res_ways = 0xc00,
905 .cache_mode = 0,
906 .retain_on_pc = true,
907 }, {
908 .usecase_id = LLCC_MDM,
909 .slice_id = 8,
910 .max_cap = 3072,
911 .priority = 1,
912 .fixed_size = true,
913 .bonus_ways = 0xfff,
914 .cache_mode = 0,
915 .retain_on_pc = true,
916 }, {
917 .usecase_id = LLCC_MODHW,
918 .slice_id = 9,
919 .max_cap = 1024,
920 .priority = 1,
921 .fixed_size = true,
922 .bonus_ways = 0xfff,
923 .cache_mode = 0,
924 .retain_on_pc = true,
925 }, {
926 .usecase_id = LLCC_CMPT,
927 .slice_id = 10,
928 .max_cap = 6144,
929 .priority = 1,
930 .fixed_size = true,
931 .bonus_ways = 0xfff,
932 .cache_mode = 0,
933 .retain_on_pc = true,
934 }, {
935 .usecase_id = LLCC_GPUHTW,
936 .slice_id = 11,
937 .max_cap = 1024,
938 .priority = 1,
939 .fixed_size = true,
940 .bonus_ways = 0xfff,
941 .cache_mode = 0,
942 .retain_on_pc = true,
943 }, {
944 .usecase_id = LLCC_GPU,
945 .slice_id = 12,
946 .max_cap = 5120,
947 .priority = 1,
948 .fixed_size = true,
949 .bonus_ways = 0xfff,
950 .cache_mode = 0,
951 .retain_on_pc = true,
952 }, {
953 .usecase_id = LLCC_MMUHWT,
954 .slice_id = 13,
955 .max_cap = 1024,
956 .priority = 1,
957 .fixed_size = true,
958 .bonus_ways = 0xfff,
959 .cache_mode = 0,
960 .activate_on_init = true,
961 }, {
962 .usecase_id = LLCC_CMPTDMA,
963 .slice_id = 15,
964 .max_cap = 6144,
965 .priority = 1,
966 .fixed_size = true,
967 .bonus_ways = 0xfff,
968 .cache_mode = 0,
969 .retain_on_pc = true,
970 }, {
971 .usecase_id = LLCC_DISP,
972 .slice_id = 16,
973 .max_cap = 6144,
974 .priority = 1,
975 .fixed_size = true,
976 .bonus_ways = 0xfff,
977 .cache_mode = 0,
978 .retain_on_pc = true,
979 }, {
980 .usecase_id = LLCC_VIDFW,
981 .slice_id = 17,
982 .max_cap = 1024,
983 .priority = 1,
984 .fixed_size = true,
985 .bonus_ways = 0xfff,
986 .cache_mode = 0,
987 .retain_on_pc = true,
988 }, {
989 .usecase_id = LLCC_MDMHPFX,
990 .slice_id = 20,
991 .max_cap = 1024,
992 .priority = 2,
993 .fixed_size = true,
994 .bonus_ways = 0xfff,
995 .cache_mode = 0,
996 .retain_on_pc = true,
997 }, {
998 .usecase_id = LLCC_MDMPNG,
999 .slice_id = 21,
1000 .max_cap = 1024,
1001 .priority = 0,
1002 .fixed_size = true,
1003 .bonus_ways = 0xc,
1004 .cache_mode = 0,
1005 .retain_on_pc = true,
1006 }, {
1007 .usecase_id = LLCC_AUDHW,
1008 .slice_id = 22,
1009 .max_cap = 1024,
1010 .priority = 1,
1011 .fixed_size = true,
1012 .bonus_ways = 0xfff,
1013 .cache_mode = 0,
1014 .retain_on_pc = true,
1015 }, {
1016 .usecase_id = LLCC_NPU,
1017 .slice_id = 23,
1018 .max_cap = 6144,
1019 .priority = 1,
1020 .fixed_size = true,
1021 .bonus_ways = 0xfff,
1022 .cache_mode = 0,
1023 .retain_on_pc = true,
1024 }, {
1025 .usecase_id = LLCC_WLHW,
1026 .slice_id = 24,
1027 .max_cap = 6144,
1028 .priority = 1,
1029 .fixed_size = true,
1030 .bonus_ways = 0xfff,
1031 .cache_mode = 0,
1032 .retain_on_pc = true,
1033 }, {
1034 .usecase_id = LLCC_MODPE,
1035 .slice_id = 29,
1036 .max_cap = 512,
1037 .priority = 1,
1038 .fixed_size = true,
1039 .bonus_ways = 0xc,
1040 .cache_mode = 0,
1041 .retain_on_pc = true,
1042 }, {
1043 .usecase_id = LLCC_APTCM,
1044 .slice_id = 30,
1045 .max_cap = 512,
1046 .priority = 3,
1047 .fixed_size = true,
1048 .res_ways = 0x1,
1049 .cache_mode = 1,
1050 .retain_on_pc = true,
1051 }, {
1052 .usecase_id = LLCC_WRCACHE,
1053 .slice_id = 31,
1054 .max_cap = 128,
1055 .priority = 1,
1056 .fixed_size = true,
1057 .bonus_ways = 0xfff,
1058 .cache_mode = 0,
1059 },
1060 };
1061
1062 static const struct llcc_slice_config sc8280xp_data[] = {
1063 {
1064 .usecase_id = LLCC_CPUSS,
1065 .slice_id = 1,
1066 .max_cap = 6144,
1067 .priority = 1,
1068 .fixed_size = true,
1069 .bonus_ways = 0xfff,
1070 .cache_mode = 0,
1071 .retain_on_pc = true,
1072 .activate_on_init = true,
1073 }, {
1074 .usecase_id = LLCC_VIDSC0,
1075 .slice_id = 2,
1076 .max_cap = 512,
1077 .priority = 3,
1078 .fixed_size = true,
1079 .bonus_ways = 0xfff,
1080 .cache_mode = 0,
1081 .retain_on_pc = true,
1082 }, {
1083 .usecase_id = LLCC_AUDIO,
1084 .slice_id = 6,
1085 .max_cap = 1024,
1086 .priority = 1,
1087 .fixed_size = true,
1088 .bonus_ways = 0xfff,
1089 .cache_mode = 0,
1090 }, {
1091 .usecase_id = LLCC_CMPT,
1092 .slice_id = 10,
1093 .max_cap = 6144,
1094 .priority = 1,
1095 .fixed_size = true,
1096 .bonus_ways = 0xfff,
1097 .cache_mode = 0,
1098 }, {
1099 .usecase_id = LLCC_GPUHTW,
1100 .slice_id = 11,
1101 .max_cap = 1024,
1102 .priority = 1,
1103 .fixed_size = true,
1104 .bonus_ways = 0xfff,
1105 .cache_mode = 0,
1106 .retain_on_pc = true,
1107 }, {
1108 .usecase_id = LLCC_GPU,
1109 .slice_id = 12,
1110 .max_cap = 4096,
1111 .priority = 1,
1112 .fixed_size = true,
1113 .bonus_ways = 0xfff,
1114 .cache_mode = 0,
1115 .retain_on_pc = true,
1116 .write_scid_en = true,
1117 }, {
1118 .usecase_id = LLCC_MMUHWT,
1119 .slice_id = 13,
1120 .max_cap = 1024,
1121 .priority = 1,
1122 .fixed_size = true,
1123 .bonus_ways = 0xfff,
1124 .cache_mode = 0,
1125 .activate_on_init = true,
1126 }, {
1127 .usecase_id = LLCC_DISP,
1128 .slice_id = 16,
1129 .max_cap = 6144,
1130 .priority = 1,
1131 .fixed_size = true,
1132 .bonus_ways = 0xfff,
1133 .cache_mode = 0,
1134 .retain_on_pc = true,
1135 }, {
1136 .usecase_id = LLCC_AUDHW,
1137 .slice_id = 22,
1138 .max_cap = 2048,
1139 .priority = 1,
1140 .fixed_size = true,
1141 .bonus_ways = 0xfff,
1142 .cache_mode = 0,
1143 .retain_on_pc = true,
1144 }, {
1145 .usecase_id = LLCC_ECC,
1146 .slice_id = 26,
1147 .max_cap = 1024,
1148 .priority = 1,
1149 .fixed_size = true,
1150 .bonus_ways = 0xfff,
1151 .cache_mode = 0,
1152 .retain_on_pc = true,
1153 }, {
1154 .usecase_id = LLCC_CVP,
1155 .slice_id = 28,
1156 .max_cap = 512,
1157 .priority = 3,
1158 .fixed_size = true,
1159 .bonus_ways = 0xfff,
1160 .cache_mode = 0,
1161 .retain_on_pc = true,
1162 }, {
1163 .usecase_id = LLCC_APTCM,
1164 .slice_id = 30,
1165 .max_cap = 1024,
1166 .priority = 3,
1167 .fixed_size = true,
1168 .res_ways = 0x1,
1169 .cache_mode = 1,
1170 .retain_on_pc = true,
1171 }, {
1172 .usecase_id = LLCC_WRCACHE,
1173 .slice_id = 31,
1174 .max_cap = 1024,
1175 .priority = 1,
1176 .fixed_size = true,
1177 .bonus_ways = 0xfff,
1178 .cache_mode = 0,
1179 .activate_on_init = true,
1180 }, {
1181 .usecase_id = LLCC_CVPFW,
1182 .slice_id = 17,
1183 .max_cap = 512,
1184 .priority = 1,
1185 .bonus_ways = 0xfff,
1186 .cache_mode = 0,
1187 .retain_on_pc = true,
1188 }, {
1189 .usecase_id = LLCC_CPUSS1,
1190 .slice_id = 3,
1191 .max_cap = 2048,
1192 .priority = 1,
1193 .fixed_size = true,
1194 .bonus_ways = 0xfff,
1195 .cache_mode = 0,
1196 .retain_on_pc = true,
1197 }, {
1198 .usecase_id = LLCC_CPUHWT,
1199 .slice_id = 5,
1200 .max_cap = 512,
1201 .priority = 1,
1202 .fixed_size = true,
1203 .bonus_ways = 0xfff,
1204 .cache_mode = 0,
1205 .activate_on_init = true,
1206 },
1207 };
1208
1209 static const struct llcc_slice_config sdm845_data[] = {{
1210 .usecase_id = LLCC_CPUSS,
1211 .slice_id = 1,
1212 .max_cap = 2816,
1213 .priority = 1,
1214 .bonus_ways = 0xffc,
1215 .res_ways = 0x2,
1216 .cache_mode = 0,
1217 .dis_cap_alloc = true,
1218 .retain_on_pc = true,
1219 .activate_on_init = true,
1220 }, {
1221 .usecase_id = LLCC_VIDSC0,
1222 .slice_id = 2,
1223 .max_cap = 512,
1224 .priority = 2,
1225 .fixed_size = true,
1226 .res_ways = 0xf0,
1227 .cache_mode = 0,
1228 .dis_cap_alloc = true,
1229 .retain_on_pc = true,
1230 }, {
1231 .usecase_id = LLCC_VIDSC1,
1232 .slice_id = 3,
1233 .max_cap = 512,
1234 .priority = 2,
1235 .fixed_size = true,
1236 .res_ways = 0xf0,
1237 .cache_mode = 0,
1238 .dis_cap_alloc = true,
1239 .retain_on_pc = true,
1240 }, {
1241 .usecase_id = LLCC_ROTATOR,
1242 .slice_id = 4,
1243 .max_cap = 563,
1244 .priority = 2,
1245 .fixed_size = true,
1246 .res_ways = 0xe,
1247 .cache_mode = 2,
1248 .dis_cap_alloc = true,
1249 .retain_on_pc = true,
1250 }, {
1251 .usecase_id = LLCC_VOICE,
1252 .slice_id = 5,
1253 .max_cap = 2816,
1254 .priority = 1,
1255 .bonus_ways = 0xffc,
1256 .res_ways = 0x2,
1257 .cache_mode = 0,
1258 .dis_cap_alloc = true,
1259 .retain_on_pc = true,
1260 }, {
1261 .usecase_id = LLCC_AUDIO,
1262 .slice_id = 6,
1263 .max_cap = 2816,
1264 .priority = 1,
1265 .bonus_ways = 0xffc,
1266 .res_ways = 0x2,
1267 .cache_mode = 0,
1268 .dis_cap_alloc = true,
1269 .retain_on_pc = true,
1270 }, {
1271 .usecase_id = LLCC_MDMHPGRW,
1272 .slice_id = 7,
1273 .max_cap = 1024,
1274 .priority = 2,
1275 .bonus_ways = 0xfc,
1276 .res_ways = 0xf00,
1277 .cache_mode = 0,
1278 .dis_cap_alloc = true,
1279 .retain_on_pc = true,
1280 }, {
1281 .usecase_id = LLCC_MDM,
1282 .slice_id = 8,
1283 .max_cap = 2816,
1284 .priority = 1,
1285 .bonus_ways = 0xffc,
1286 .res_ways = 0x2,
1287 .cache_mode = 0,
1288 .dis_cap_alloc = true,
1289 .retain_on_pc = true,
1290 }, {
1291 .usecase_id = LLCC_CMPT,
1292 .slice_id = 10,
1293 .max_cap = 2816,
1294 .priority = 1,
1295 .bonus_ways = 0xffc,
1296 .res_ways = 0x2,
1297 .cache_mode = 0,
1298 .dis_cap_alloc = true,
1299 .retain_on_pc = true,
1300 }, {
1301 .usecase_id = LLCC_GPUHTW,
1302 .slice_id = 11,
1303 .max_cap = 512,
1304 .priority = 1,
1305 .fixed_size = true,
1306 .bonus_ways = 0xc,
1307 .cache_mode = 0,
1308 .dis_cap_alloc = true,
1309 .retain_on_pc = true,
1310 }, {
1311 .usecase_id = LLCC_GPU,
1312 .slice_id = 12,
1313 .max_cap = 2304,
1314 .priority = 1,
1315 .bonus_ways = 0xff0,
1316 .res_ways = 0x2,
1317 .cache_mode = 0,
1318 .dis_cap_alloc = true,
1319 .retain_on_pc = true,
1320 }, {
1321 .usecase_id = LLCC_MMUHWT,
1322 .slice_id = 13,
1323 .max_cap = 256,
1324 .priority = 2,
1325 .res_ways = 0x1,
1326 .cache_mode = 0,
1327 .dis_cap_alloc = true,
1328 .activate_on_init = true,
1329 }, {
1330 .usecase_id = LLCC_CMPTDMA,
1331 .slice_id = 15,
1332 .max_cap = 2816,
1333 .priority = 1,
1334 .bonus_ways = 0xffc,
1335 .res_ways = 0x2,
1336 .cache_mode = 0,
1337 .dis_cap_alloc = true,
1338 .retain_on_pc = true,
1339 }, {
1340 .usecase_id = LLCC_DISP,
1341 .slice_id = 16,
1342 .max_cap = 2816,
1343 .priority = 1,
1344 .bonus_ways = 0xffc,
1345 .res_ways = 0x2,
1346 .cache_mode = 0,
1347 .dis_cap_alloc = true,
1348 .retain_on_pc = true,
1349 }, {
1350 .usecase_id = LLCC_VIDFW,
1351 .slice_id = 17,
1352 .max_cap = 2816,
1353 .priority = 1,
1354 .bonus_ways = 0xffc,
1355 .res_ways = 0x2,
1356 .cache_mode = 0,
1357 .dis_cap_alloc = true,
1358 .retain_on_pc = true,
1359 }, {
1360 .usecase_id = LLCC_MDMHPFX,
1361 .slice_id = 20,
1362 .max_cap = 1024,
1363 .priority = 2,
1364 .fixed_size = true,
1365 .res_ways = 0xf00,
1366 .cache_mode = 0,
1367 .dis_cap_alloc = true,
1368 .retain_on_pc = true,
1369 }, {
1370 .usecase_id = LLCC_MDMPNG,
1371 .slice_id = 21,
1372 .max_cap = 1024,
1373 .priority = 0,
1374 .fixed_size = true,
1375 .bonus_ways = 0x1e,
1376 .cache_mode = 0,
1377 .dis_cap_alloc = true,
1378 .retain_on_pc = true,
1379 }, {
1380 .usecase_id = LLCC_AUDHW,
1381 .slice_id = 22,
1382 .max_cap = 1024,
1383 .priority = 1,
1384 .fixed_size = true,
1385 .bonus_ways = 0xffc,
1386 .res_ways = 0x2,
1387 .cache_mode = 0,
1388 .dis_cap_alloc = true,
1389 .retain_on_pc = true,
1390 },
1391 };
1392
1393 static const struct llcc_slice_config sm6350_data[] = {
1394 {
1395 .usecase_id = LLCC_CPUSS,
1396 .slice_id = 1,
1397 .max_cap = 768,
1398 .priority = 1,
1399 .bonus_ways = 0xfff,
1400 .cache_mode = 0,
1401 .activate_on_init = true,
1402 .write_scid_en = true,
1403 }, {
1404 .usecase_id = LLCC_MDM,
1405 .slice_id = 8,
1406 .max_cap = 512,
1407 .priority = 2,
1408 .bonus_ways = 0xfff,
1409 .cache_mode = 0,
1410 .activate_on_init = true,
1411 }, {
1412 .usecase_id = LLCC_GPUHTW,
1413 .slice_id = 11,
1414 .max_cap = 256,
1415 .priority = 1,
1416 .bonus_ways = 0xfff,
1417 .cache_mode = 0,
1418 .activate_on_init = true,
1419 }, {
1420 .usecase_id = LLCC_GPU,
1421 .slice_id = 12,
1422 .max_cap = 512,
1423 .priority = 1,
1424 .bonus_ways = 0xfff,
1425 .cache_mode = 0,
1426 .activate_on_init = true,
1427 }, {
1428 .usecase_id = LLCC_MDMPNG,
1429 .slice_id = 21,
1430 .max_cap = 768,
1431 .priority = 0,
1432 .fixed_size = true,
1433 .bonus_ways = 0xfff,
1434 .cache_mode = 0,
1435 .activate_on_init = true,
1436 }, {
1437 .usecase_id = LLCC_NPU,
1438 .slice_id = 23,
1439 .max_cap = 768,
1440 .priority = 1,
1441 .bonus_ways = 0xfff,
1442 .cache_mode = 0,
1443 .activate_on_init = true,
1444 }, {
1445 .usecase_id = LLCC_MODPE,
1446 .slice_id = 29,
1447 .max_cap = 64,
1448 .priority = 1,
1449 .fixed_size = true,
1450 .bonus_ways = 0xfff,
1451 .cache_mode = 0,
1452 .activate_on_init = true,
1453 },
1454 };
1455
1456 static const struct llcc_slice_config sm7150_data[] = {
1457 {
1458 .usecase_id = LLCC_CPUSS,
1459 .slice_id = 1,
1460 .max_cap = 512,
1461 .priority = 1,
1462 .bonus_ways = 0xf,
1463 .cache_mode = 0,
1464 .retain_on_pc = true,
1465 .activate_on_init = true,
1466 }, {
1467 .usecase_id = LLCC_MDM,
1468 .slice_id = 8,
1469 .max_cap = 128,
1470 .priority = 2,
1471 .bonus_ways = 0xf,
1472 .cache_mode = 0,
1473 .retain_on_pc = true,
1474 }, {
1475 .usecase_id = LLCC_GPUHTW,
1476 .slice_id = 11,
1477 .max_cap = 256,
1478 .priority = 1,
1479 .fixed_size = true,
1480 .bonus_ways = 0xf,
1481 .cache_mode = 0,
1482 .retain_on_pc = true,
1483 }, {
1484 .usecase_id = LLCC_GPU,
1485 .slice_id = 12,
1486 .max_cap = 256,
1487 .priority = 1,
1488 .fixed_size = true,
1489 .bonus_ways = 0xf,
1490 .cache_mode = 0,
1491 .retain_on_pc = true,
1492 }, {
1493 .usecase_id = LLCC_NPU,
1494 .slice_id = 23,
1495 .max_cap = 512,
1496 .priority = 1,
1497 .bonus_ways = 0xf,
1498 .cache_mode = 0,
1499 .retain_on_pc = true,
1500 },
1501 };
1502
1503 static const struct llcc_slice_config sm8150_data[] = {
1504 {
1505 .usecase_id = LLCC_CPUSS,
1506 .slice_id = 1,
1507 .max_cap = 3072,
1508 .priority = 1,
1509 .fixed_size = true,
1510 .bonus_ways = 0xfff,
1511 .cache_mode = 0,
1512 .retain_on_pc = true,
1513 .activate_on_init = true,
1514 }, {
1515 .usecase_id = LLCC_VIDSC0,
1516 .slice_id = 2,
1517 .max_cap = 512,
1518 .priority = 2,
1519 .fixed_size = true,
1520 .bonus_ways = 0xfff,
1521 .cache_mode = 0,
1522 .retain_on_pc = true,
1523 }, {
1524 .usecase_id = LLCC_VIDSC1,
1525 .slice_id = 3,
1526 .max_cap = 512,
1527 .priority = 2,
1528 .fixed_size = true,
1529 .bonus_ways = 0xfff,
1530 .cache_mode = 0,
1531 .retain_on_pc = true,
1532 }, {
1533 .usecase_id = LLCC_AUDIO,
1534 .slice_id = 6,
1535 .max_cap = 1024,
1536 .priority = 1,
1537 .fixed_size = true,
1538 .bonus_ways = 0xfff,
1539 .cache_mode = 0,
1540 .retain_on_pc = true,
1541 }, {
1542 .usecase_id = LLCC_MDMHPGRW,
1543 .slice_id = 7,
1544 .max_cap = 3072,
1545 .priority = 1,
1546 .bonus_ways = 0xff,
1547 .res_ways = 0xf00,
1548 .cache_mode = 0,
1549 .retain_on_pc = true,
1550 }, {
1551 .usecase_id = LLCC_MDM,
1552 .slice_id = 8,
1553 .max_cap = 3072,
1554 .priority = 1,
1555 .fixed_size = true,
1556 .bonus_ways = 0xfff,
1557 .cache_mode = 0,
1558 .retain_on_pc = true,
1559 }, {
1560 .usecase_id = LLCC_MODHW,
1561 .slice_id = 9,
1562 .max_cap = 1024,
1563 .priority = 1,
1564 .fixed_size = true,
1565 .bonus_ways = 0xfff,
1566 .cache_mode = 0,
1567 .retain_on_pc = true,
1568 }, {
1569 .usecase_id = LLCC_CMPT,
1570 .slice_id = 10,
1571 .max_cap = 3072,
1572 .priority = 1,
1573 .fixed_size = true,
1574 .bonus_ways = 0xfff,
1575 .cache_mode = 0,
1576 .retain_on_pc = true,
1577 }, {
1578 .usecase_id = LLCC_GPUHTW,
1579 .slice_id = 11,
1580 .max_cap = 512,
1581 .priority = 1,
1582 .fixed_size = true,
1583 .bonus_ways = 0xfff,
1584 .cache_mode = 0,
1585 .retain_on_pc = true,
1586 }, {
1587 .usecase_id = LLCC_GPU,
1588 .slice_id = 12,
1589 .max_cap = 2560,
1590 .priority = 1,
1591 .fixed_size = true,
1592 .bonus_ways = 0xfff,
1593 .cache_mode = 0,
1594 .retain_on_pc = true,
1595 }, {
1596 .usecase_id = LLCC_MMUHWT,
1597 .slice_id = 13,
1598 .max_cap = 1024,
1599 .priority = 1,
1600 .fixed_size = true,
1601 .bonus_ways = 0xfff,
1602 .cache_mode = 0,
1603 .activate_on_init = true,
1604 }, {
1605 .usecase_id = LLCC_CMPTDMA,
1606 .slice_id = 15,
1607 .max_cap = 3072,
1608 .priority = 1,
1609 .fixed_size = true,
1610 .bonus_ways = 0xfff,
1611 .cache_mode = 0,
1612 .retain_on_pc = true,
1613 }, {
1614 .usecase_id = LLCC_DISP,
1615 .slice_id = 16,
1616 .max_cap = 3072,
1617 .priority = 1,
1618 .fixed_size = true,
1619 .bonus_ways = 0xfff,
1620 .cache_mode = 0,
1621 .retain_on_pc = true,
1622 }, {
1623 .usecase_id = LLCC_MDMHPFX,
1624 .slice_id = 20,
1625 .max_cap = 1024,
1626 .priority = 2,
1627 .fixed_size = true,
1628 .bonus_ways = 0xfff,
1629 .cache_mode = 0,
1630 .retain_on_pc = true,
1631 }, {
1632 .usecase_id = LLCC_MDMHPFX,
1633 .slice_id = 21,
1634 .max_cap = 1024,
1635 .priority = 0,
1636 .fixed_size = true,
1637 .bonus_ways = 0xf,
1638 .cache_mode = 0,
1639 .retain_on_pc = true,
1640 }, {
1641 .usecase_id = LLCC_AUDHW,
1642 .slice_id = 22,
1643 .max_cap = 1024,
1644 .priority = 1,
1645 .fixed_size = true,
1646 .bonus_ways = 0xfff,
1647 .cache_mode = 0,
1648 .retain_on_pc = true,
1649 }, {
1650 .usecase_id = LLCC_NPU,
1651 .slice_id = 23,
1652 .max_cap = 3072,
1653 .priority = 1,
1654 .fixed_size = true,
1655 .bonus_ways = 0xfff,
1656 .cache_mode = 0,
1657 .retain_on_pc = true,
1658 }, {
1659 .usecase_id = LLCC_WLHW,
1660 .slice_id = 24,
1661 .max_cap = 3072,
1662 .priority = 1,
1663 .fixed_size = true,
1664 .bonus_ways = 0xfff,
1665 .cache_mode = 0,
1666 .retain_on_pc = true,
1667 }, {
1668 .usecase_id = LLCC_MODPE,
1669 .slice_id = 29,
1670 .max_cap = 256,
1671 .priority = 1,
1672 .fixed_size = true,
1673 .bonus_ways = 0xf,
1674 .cache_mode = 0,
1675 .retain_on_pc = true,
1676 }, {
1677 .usecase_id = LLCC_APTCM,
1678 .slice_id = 30,
1679 .max_cap = 256,
1680 .priority = 3,
1681 .fixed_size = true,
1682 .res_ways = 0x1,
1683 .cache_mode = 1,
1684 .retain_on_pc = true,
1685 }, {
1686 .usecase_id = LLCC_WRCACHE,
1687 .slice_id = 31,
1688 .max_cap = 128,
1689 .priority = 1,
1690 .fixed_size = true,
1691 .bonus_ways = 0xfff,
1692 .cache_mode = 0,
1693 },
1694 };
1695
1696 static const struct llcc_slice_config sm8250_data[] = {
1697 {
1698 .usecase_id = LLCC_CPUSS,
1699 .slice_id = 1,
1700 .max_cap = 3072,
1701 .priority = 1,
1702 .fixed_size = true,
1703 .bonus_ways = 0xfff,
1704 .cache_mode = 0,
1705 .retain_on_pc = true,
1706 .activate_on_init = true,
1707 }, {
1708 .usecase_id = LLCC_VIDSC0,
1709 .slice_id = 2,
1710 .max_cap = 512,
1711 .priority = 3,
1712 .fixed_size = true,
1713 .bonus_ways = 0xfff,
1714 .cache_mode = 0,
1715 .retain_on_pc = true,
1716 }, {
1717 .usecase_id = LLCC_AUDIO,
1718 .slice_id = 6,
1719 .max_cap = 1024,
1720 .priority = 1,
1721 .bonus_ways = 0xfff,
1722 .cache_mode = 0,
1723 }, {
1724 .usecase_id = LLCC_CMPT,
1725 .slice_id = 10,
1726 .max_cap = 1024,
1727 .priority = 1,
1728 .bonus_ways = 0xfff,
1729 .cache_mode = 0,
1730 }, {
1731 .usecase_id = LLCC_GPUHTW,
1732 .slice_id = 11,
1733 .max_cap = 1024,
1734 .priority = 1,
1735 .fixed_size = true,
1736 .bonus_ways = 0xfff,
1737 .cache_mode = 0,
1738 .retain_on_pc = true,
1739 }, {
1740 .usecase_id = LLCC_GPU,
1741 .slice_id = 12,
1742 .max_cap = 1024,
1743 .priority = 1,
1744 .bonus_ways = 0xfff,
1745 .cache_mode = 0,
1746 .retain_on_pc = true,
1747 .write_scid_en = true,
1748 }, {
1749 .usecase_id = LLCC_MMUHWT,
1750 .slice_id = 13,
1751 .max_cap = 1024,
1752 .priority = 1,
1753 .fixed_size = true,
1754 .bonus_ways = 0xfff,
1755 .cache_mode = 0,
1756 .activate_on_init = true,
1757 }, {
1758 .usecase_id = LLCC_CMPTDMA,
1759 .slice_id = 15,
1760 .max_cap = 1024,
1761 .priority = 1,
1762 .bonus_ways = 0xfff,
1763 .cache_mode = 0,
1764 .retain_on_pc = true,
1765 }, {
1766 .usecase_id = LLCC_DISP,
1767 .slice_id = 16,
1768 .max_cap = 3072,
1769 .priority = 1,
1770 .fixed_size = true,
1771 .bonus_ways = 0xfff,
1772 .cache_mode = 0,
1773 .retain_on_pc = true,
1774 }, {
1775 .usecase_id = LLCC_VIDFW,
1776 .slice_id = 17,
1777 .max_cap = 512,
1778 .priority = 1,
1779 .bonus_ways = 0xfff,
1780 .cache_mode = 0,
1781 .retain_on_pc = true,
1782 }, {
1783 .usecase_id = LLCC_AUDHW,
1784 .slice_id = 22,
1785 .max_cap = 1024,
1786 .priority = 1,
1787 .fixed_size = true,
1788 .bonus_ways = 0xfff,
1789 .cache_mode = 0,
1790 .retain_on_pc = true,
1791 }, {
1792 .usecase_id = LLCC_NPU,
1793 .slice_id = 23,
1794 .max_cap = 3072,
1795 .priority = 1,
1796 .fixed_size = true,
1797 .bonus_ways = 0xfff,
1798 .cache_mode = 0,
1799 .retain_on_pc = true,
1800 }, {
1801 .usecase_id = LLCC_WLHW,
1802 .slice_id = 24,
1803 .max_cap = 1024,
1804 .priority = 1,
1805 .bonus_ways = 0xfff,
1806 .cache_mode = 0,
1807 .retain_on_pc = true,
1808 }, {
1809 .usecase_id = LLCC_CVP,
1810 .slice_id = 28,
1811 .max_cap = 256,
1812 .priority = 3,
1813 .fixed_size = true,
1814 .bonus_ways = 0xfff,
1815 .cache_mode = 0,
1816 .retain_on_pc = true,
1817 }, {
1818 .usecase_id = LLCC_APTCM,
1819 .slice_id = 30,
1820 .max_cap = 128,
1821 .priority = 3,
1822 .res_ways = 0x3,
1823 .cache_mode = 1,
1824 .retain_on_pc = true,
1825 }, {
1826 .usecase_id = LLCC_WRCACHE,
1827 .slice_id = 31,
1828 .max_cap = 256,
1829 .priority = 1,
1830 .fixed_size = true,
1831 .bonus_ways = 0xfff,
1832 .cache_mode = 0,
1833 .activate_on_init = true,
1834 },
1835 };
1836
1837 static const struct llcc_slice_config sm8350_data[] = {
1838 {
1839 .usecase_id = LLCC_CPUSS,
1840 .slice_id = 1,
1841 .max_cap = 3072,
1842 .priority = 1,
1843 .fixed_size = true,
1844 .bonus_ways = 0xfff,
1845 .cache_mode = 0,
1846 .activate_on_init = true,
1847 .write_scid_en = true,
1848 }, {
1849 .usecase_id = LLCC_VIDSC0,
1850 .slice_id = 2,
1851 .max_cap = 512,
1852 .priority = 3,
1853 .fixed_size = true,
1854 .bonus_ways = 0xfff,
1855 .cache_mode = 0,
1856 .activate_on_init = true,
1857 }, {
1858 .usecase_id = LLCC_AUDIO,
1859 .slice_id = 6,
1860 .max_cap = 1024,
1861 .priority = 1,
1862 .fixed_size = true,
1863 .bonus_ways = 0xfff,
1864 .cache_mode = 0,
1865 }, {
1866 .usecase_id = LLCC_MDMHPGRW,
1867 .slice_id = 7,
1868 .max_cap = 1024,
1869 .priority = 3,
1870 .bonus_ways = 0xfff,
1871 .cache_mode = 0,
1872 .activate_on_init = true,
1873 }, {
1874 .usecase_id = LLCC_MODHW,
1875 .slice_id = 9,
1876 .max_cap = 1024,
1877 .priority = 1,
1878 .fixed_size = true,
1879 .bonus_ways = 0xfff,
1880 .cache_mode = 0,
1881 .activate_on_init = true,
1882 }, {
1883 .usecase_id = LLCC_CMPT,
1884 .slice_id = 10,
1885 .max_cap = 3072,
1886 .priority = 1,
1887 .fixed_size = true,
1888 .bonus_ways = 0xfff,
1889 .cache_mode = 0,
1890 .activate_on_init = true,
1891 }, {
1892 .usecase_id = LLCC_GPUHTW,
1893 .slice_id = 11,
1894 .max_cap = 1024,
1895 .priority = 1,
1896 .fixed_size = true,
1897 .bonus_ways = 0xfff,
1898 .cache_mode = 0,
1899 .activate_on_init = true,
1900 }, {
1901 .usecase_id = LLCC_GPU,
1902 .slice_id = 12,
1903 .max_cap = 1024,
1904 .priority = 1,
1905 .bonus_ways = 0xfff,
1906 .cache_mode = 0,
1907 .retain_on_pc = true,
1908 .activate_on_init = true,
1909 }, {
1910 .usecase_id = LLCC_MMUHWT,
1911 .slice_id = 13,
1912 .max_cap = 1024,
1913 .priority = 1,
1914 .fixed_size = true,
1915 .bonus_ways = 0xfff,
1916 .cache_mode = 0,
1917 .write_scid_en = true,
1918 }, {
1919 .usecase_id = LLCC_DISP,
1920 .slice_id = 16,
1921 .max_cap = 3072,
1922 .priority = 2,
1923 .fixed_size = true,
1924 .bonus_ways = 0xfff,
1925 .cache_mode = 0,
1926 .activate_on_init = true,
1927 }, {
1928 .usecase_id = LLCC_MDMPNG,
1929 .slice_id = 21,
1930 .max_cap = 1024,
1931 .priority = 0,
1932 .fixed_size = true,
1933 .bonus_ways = 0xf,
1934 .cache_mode = 0,
1935 .activate_on_init = true,
1936 }, {
1937 .usecase_id = LLCC_AUDHW,
1938 .slice_id = 22,
1939 .max_cap = 1024,
1940 .priority = 1,
1941 .fixed_size = true,
1942 .bonus_ways = 0xfff,
1943 .cache_mode = 0,
1944 .activate_on_init = true,
1945 }, {
1946 .usecase_id = LLCC_CVP,
1947 .slice_id = 28,
1948 .max_cap = 512,
1949 .priority = 3,
1950 .fixed_size = true,
1951 .bonus_ways = 0xfff,
1952 .cache_mode = 0,
1953 .activate_on_init = true,
1954 }, {
1955 .usecase_id = LLCC_MODPE,
1956 .slice_id = 29,
1957 .max_cap = 256,
1958 .priority = 1,
1959 .fixed_size = true,
1960 .bonus_ways = 0xf,
1961 .cache_mode = 0,
1962 .activate_on_init = true,
1963 }, {
1964 .usecase_id = LLCC_APTCM,
1965 .slice_id = 30,
1966 .max_cap = 1024,
1967 .priority = 3,
1968 .fixed_size = true,
1969 .res_ways = 0x1,
1970 .cache_mode = 1,
1971 .activate_on_init = true,
1972 }, {
1973 .usecase_id = LLCC_WRCACHE,
1974 .slice_id = 31,
1975 .max_cap = 512,
1976 .priority = 1,
1977 .fixed_size = true,
1978 .bonus_ways = 0xfff,
1979 .cache_mode = 0,
1980 .write_scid_en = true,
1981 }, {
1982 .usecase_id = LLCC_CVPFW,
1983 .slice_id = 17,
1984 .max_cap = 512,
1985 .priority = 1,
1986 .bonus_ways = 0xfff,
1987 .cache_mode = 0,
1988 .activate_on_init = true,
1989 }, {
1990 .usecase_id = LLCC_CPUSS1,
1991 .slice_id = 3,
1992 .max_cap = 1024,
1993 .priority = 1,
1994 .fixed_size = true,
1995 .bonus_ways = 0xfff,
1996 .cache_mode = 0,
1997 .activate_on_init = true,
1998 }, {
1999 .usecase_id = LLCC_CPUHWT,
2000 .slice_id = 5,
2001 .max_cap = 512,
2002 .priority = 1,
2003 .fixed_size = true,
2004 .bonus_ways = 0xfff,
2005 .cache_mode = 0,
2006 .write_scid_en = true,
2007 },
2008 };
2009
2010 static const struct llcc_slice_config sm8450_data[] = {
2011 {
2012 .usecase_id = LLCC_CPUSS,
2013 .slice_id = 1,
2014 .max_cap = 3072,
2015 .priority = 1,
2016 .bonus_ways = 0xffff,
2017 .cache_mode = 0,
2018 .retain_on_pc = true,
2019 .activate_on_init = true,
2020 }, {
2021 .usecase_id = LLCC_VIDSC0,
2022 .slice_id = 2,
2023 .max_cap = 512,
2024 .priority = 3,
2025 .fixed_size = true,
2026 .bonus_ways = 0xffff,
2027 .cache_mode = 0,
2028 .retain_on_pc = true,
2029 }, {
2030 .usecase_id = LLCC_AUDIO,
2031 .slice_id = 6,
2032 .max_cap = 1024,
2033 .priority = 1,
2034 .fixed_size = true,
2035 .bonus_ways = 0xffff,
2036 .cache_mode = 0,
2037 }, {
2038 .usecase_id = LLCC_MDMHPGRW,
2039 .slice_id = 7,
2040 .max_cap = 1024,
2041 .priority = 3,
2042 .bonus_ways = 0xffff,
2043 .cache_mode = 0,
2044 .retain_on_pc = true,
2045 }, {
2046 .usecase_id = LLCC_MODHW,
2047 .slice_id = 9,
2048 .max_cap = 1024,
2049 .priority = 1,
2050 .fixed_size = true,
2051 .bonus_ways = 0xffff,
2052 .cache_mode = 0,
2053 .retain_on_pc = true,
2054 }, {
2055 .usecase_id = LLCC_CMPT,
2056 .slice_id = 10,
2057 .max_cap = 4096,
2058 .priority = 1,
2059 .fixed_size = true,
2060 .bonus_ways = 0xffff,
2061 .cache_mode = 0,
2062 .retain_on_pc = true,
2063 }, {
2064 .usecase_id = LLCC_GPUHTW,
2065 .slice_id = 11,
2066 .max_cap = 512,
2067 .priority = 1,
2068 .fixed_size = true,
2069 .bonus_ways = 0xffff,
2070 .cache_mode = 0,
2071 .retain_on_pc = true,
2072 }, {
2073 .usecase_id = LLCC_GPU,
2074 .slice_id = 12,
2075 .max_cap = 2048,
2076 .priority = 1,
2077 .fixed_size = true,
2078 .bonus_ways = 0xffff,
2079 .cache_mode = 0,
2080 .retain_on_pc = true,
2081 .write_scid_en = true,
2082 }, {
2083 .usecase_id = LLCC_MMUHWT,
2084 .slice_id = 13,
2085 .max_cap = 768,
2086 .priority = 1,
2087 .fixed_size = true,
2088 .bonus_ways = 0xffff,
2089 .cache_mode = 0,
2090 .activate_on_init = true,
2091 }, {
2092 .usecase_id = LLCC_DISP,
2093 .slice_id = 16,
2094 .max_cap = 4096,
2095 .priority = 2,
2096 .fixed_size = true,
2097 .bonus_ways = 0xffff,
2098 .cache_mode = 0,
2099 .retain_on_pc = true,
2100 }, {
2101 .usecase_id = LLCC_MDMPNG,
2102 .slice_id = 21,
2103 .max_cap = 1024,
2104 .priority = 1,
2105 .fixed_size = true,
2106 .bonus_ways = 0xf000,
2107 .cache_mode = 0,
2108 .retain_on_pc = true,
2109 }, {
2110 .usecase_id = LLCC_AUDHW,
2111 .slice_id = 22,
2112 .max_cap = 1024,
2113 .priority = 1,
2114 .fixed_size = true,
2115 .bonus_ways = 0xffff,
2116 .cache_mode = 0,
2117 }, {
2118 .usecase_id = LLCC_CVP,
2119 .slice_id = 28,
2120 .max_cap = 256,
2121 .priority = 3,
2122 .fixed_size = true,
2123 .bonus_ways = 0xffff,
2124 .cache_mode = 0,
2125 .retain_on_pc = true,
2126 }, {
2127 .usecase_id = LLCC_MODPE,
2128 .slice_id = 29,
2129 .max_cap = 64,
2130 .priority = 1,
2131 .fixed_size = true,
2132 .bonus_ways = 0xf000,
2133 .cache_mode = 0,
2134 .retain_on_pc = true,
2135 }, {
2136 .usecase_id = LLCC_APTCM,
2137 .slice_id = 30,
2138 .max_cap = 1024,
2139 .priority = 3,
2140 .fixed_size = true,
2141 .res_ways = 0xf0,
2142 .cache_mode = 1,
2143 .retain_on_pc = true,
2144 }, {
2145 .usecase_id = LLCC_WRCACHE,
2146 .slice_id = 31,
2147 .max_cap = 512,
2148 .priority = 1,
2149 .fixed_size = true,
2150 .bonus_ways = 0xffff,
2151 .cache_mode = 0,
2152 .activate_on_init = true,
2153 }, {
2154 .usecase_id = LLCC_CVPFW,
2155 .slice_id = 17,
2156 .max_cap = 512,
2157 .priority = 1,
2158 .fixed_size = true,
2159 .bonus_ways = 0xffff,
2160 .cache_mode = 0,
2161 .retain_on_pc = true,
2162 }, {
2163 .usecase_id = LLCC_CPUSS1,
2164 .slice_id = 3,
2165 .max_cap = 1024,
2166 .priority = 1,
2167 .fixed_size = true,
2168 .bonus_ways = 0xffff,
2169 .cache_mode = 0,
2170 .retain_on_pc = true,
2171 }, {
2172 .usecase_id = LLCC_CAMEXP0,
2173 .slice_id = 4,
2174 .max_cap = 256,
2175 .priority = 3,
2176 .fixed_size = true,
2177 .bonus_ways = 0xffff,
2178 .cache_mode = 0,
2179 .retain_on_pc = true,
2180 }, {
2181 .usecase_id = LLCC_CPUMTE,
2182 .slice_id = 23,
2183 .max_cap = 256,
2184 .priority = 1,
2185 .fixed_size = true,
2186 .bonus_ways = 0xfff,
2187 .cache_mode = 0,
2188 .activate_on_init = true,
2189 }, {
2190 .usecase_id = LLCC_CPUHWT,
2191 .slice_id = 5,
2192 .max_cap = 512,
2193 .priority = 1,
2194 .fixed_size = true,
2195 .bonus_ways = 0xffff,
2196 .cache_mode = 0,
2197 .retain_on_pc = true,
2198 .activate_on_init = true,
2199 }, {
2200 .usecase_id = LLCC_CAMEXP1,
2201 .slice_id = 27,
2202 .max_cap = 256,
2203 .priority = 3,
2204 .fixed_size = true,
2205 .bonus_ways = 0xffff,
2206 .cache_mode = 0,
2207 .retain_on_pc = true,
2208 }, {
2209 .usecase_id = LLCC_AENPU,
2210 .slice_id = 8,
2211 .max_cap = 2048,
2212 .priority = 1,
2213 .fixed_size = true,
2214 .bonus_ways = 0xffff,
2215 .cache_mode = 0,
2216 },
2217 };
2218
2219 static const struct llcc_slice_config sm8550_data[] = {
2220 {
2221 .usecase_id = LLCC_CPUSS,
2222 .slice_id = 1,
2223 .max_cap = 5120,
2224 .priority = 1,
2225 .bonus_ways = 0xffffff,
2226 .cache_mode = 0,
2227 .activate_on_init = true,
2228 .write_scid_en = true,
2229 }, {
2230 .usecase_id = LLCC_VIDSC0,
2231 .slice_id = 2,
2232 .max_cap = 512,
2233 .priority = 4,
2234 .fixed_size = true,
2235 .bonus_ways = 0xffffff,
2236 .cache_mode = 0,
2237 }, {
2238 .usecase_id = LLCC_AUDIO,
2239 .slice_id = 6,
2240 .max_cap = 1024,
2241 .priority = 1,
2242 .fixed_size = true,
2243 .bonus_ways = 0xffffff,
2244 .cache_mode = 0,
2245 }, {
2246 .usecase_id = LLCC_MDMHPGRW,
2247 .slice_id = 25,
2248 .max_cap = 1024,
2249 .priority = 4,
2250 .bonus_ways = 0xffffff,
2251 .cache_mode = 0,
2252 }, {
2253 .usecase_id = LLCC_MODHW,
2254 .slice_id = 26,
2255 .max_cap = 1024,
2256 .priority = 1,
2257 .fixed_size = true,
2258 .bonus_ways = 0xffffff,
2259 .cache_mode = 0,
2260 }, {
2261 .usecase_id = LLCC_CMPT,
2262 .slice_id = 10,
2263 .max_cap = 4096,
2264 .priority = 1,
2265 .fixed_size = true,
2266 .bonus_ways = 0xffffff,
2267 .cache_mode = 0,
2268 }, {
2269 .usecase_id = LLCC_GPUHTW,
2270 .slice_id = 11,
2271 .max_cap = 512,
2272 .priority = 1,
2273 .fixed_size = true,
2274 .bonus_ways = 0xffffff,
2275 .cache_mode = 0,
2276 }, {
2277 .usecase_id = LLCC_GPU,
2278 .slice_id = 9,
2279 .max_cap = 3096,
2280 .priority = 1,
2281 .bonus_ways = 0xffffff,
2282 .cache_mode = 0,
2283 .write_scid_en = true,
2284 .write_scid_cacheable_en = true,
2285 }, {
2286 .usecase_id = LLCC_MMUHWT,
2287 .slice_id = 18,
2288 .max_cap = 768,
2289 .priority = 1,
2290 .fixed_size = true,
2291 .bonus_ways = 0xffffff,
2292 .cache_mode = 0,
2293 .activate_on_init = true,
2294 }, {
2295 .usecase_id = LLCC_DISP,
2296 .slice_id = 16,
2297 .max_cap = 6144,
2298 .priority = 1,
2299 .fixed_size = true,
2300 .bonus_ways = 0xffffff,
2301 .cache_mode = 2,
2302 }, {
2303 .usecase_id = LLCC_MDMPNG,
2304 .slice_id = 27,
2305 .max_cap = 1024,
2306 .priority = 0,
2307 .fixed_size = true,
2308 .bonus_ways = 0xf00000,
2309 .cache_mode = 0,
2310 }, {
2311 .usecase_id = LLCC_AUDHW,
2312 .slice_id = 22,
2313 .max_cap = 1024,
2314 .priority = 1,
2315 .fixed_size = true,
2316 .bonus_ways = 0xffffff,
2317 .cache_mode = 0,
2318 }, {
2319 .usecase_id = LLCC_CVP,
2320 .slice_id = 8,
2321 .max_cap = 256,
2322 .priority = 4,
2323 .fixed_size = true,
2324 .bonus_ways = 0xffffff,
2325 .cache_mode = 0,
2326 }, {
2327 .usecase_id = LLCC_MODPE,
2328 .slice_id = 29,
2329 .max_cap = 64,
2330 .priority = 1,
2331 .fixed_size = true,
2332 .bonus_ways = 0xf00000,
2333 .cache_mode = 0,
2334 .alloc_oneway_en = true,
2335 .vict_prio = true,
2336 }, {
2337 .usecase_id = LLCC_WRCACHE,
2338 .slice_id = 31,
2339 .max_cap = 512,
2340 .priority = 1,
2341 .fixed_size = true,
2342 .bonus_ways = 0xffffff,
2343 .cache_mode = 0,
2344 .activate_on_init = true,
2345 }, {
2346 .usecase_id = LLCC_CAMEXP0,
2347 .slice_id = 4,
2348 .max_cap = 256,
2349 .priority = 4,
2350 .fixed_size = true,
2351 .bonus_ways = 0xf,
2352 .cache_mode = 0,
2353 }, {
2354 .usecase_id = LLCC_CPUHWT,
2355 .slice_id = 5,
2356 .max_cap = 512,
2357 .priority = 1,
2358 .fixed_size = true,
2359 .bonus_ways = 0xffffff,
2360 .cache_mode = 0,
2361 .activate_on_init = true,
2362 }, {
2363 .usecase_id = LLCC_CAMEXP1,
2364 .slice_id = 7,
2365 .max_cap = 3200,
2366 .priority = 3,
2367 .fixed_size = true,
2368 .bonus_ways = 0xfffff0,
2369 .cache_mode = 2,
2370 }, {
2371 .usecase_id = LLCC_CMPTHCP,
2372 .slice_id = 17,
2373 .max_cap = 256,
2374 .priority = 4,
2375 .fixed_size = true,
2376 .bonus_ways = 0xffffff,
2377 .cache_mode = 0,
2378 }, {
2379 .usecase_id = LLCC_LCPDARE,
2380 .slice_id = 30,
2381 .max_cap = 128,
2382 .priority = 4,
2383 .fixed_size = true,
2384 .bonus_ways = 0xffffff,
2385 .cache_mode = 0,
2386 .activate_on_init = true,
2387 .alloc_oneway_en = true,
2388 .vict_prio = true,
2389 }, {
2390 .usecase_id = LLCC_AENPU,
2391 .slice_id = 3,
2392 .max_cap = 3072,
2393 .priority = 1,
2394 .fixed_size = true,
2395 .bonus_ways = 0xfe01ff,
2396 .cache_mode = 2,
2397 }, {
2398 .usecase_id = LLCC_ISLAND1,
2399 .slice_id = 12,
2400 .max_cap = 1792,
2401 .priority = 7,
2402 .fixed_size = true,
2403 .bonus_ways = 0xfe00,
2404 .cache_mode = 0,
2405 }, {
2406 .usecase_id = LLCC_ISLAND4,
2407 .slice_id = 15,
2408 .max_cap = 256,
2409 .priority = 7,
2410 .fixed_size = true,
2411 .bonus_ways = 0x10000,
2412 .cache_mode = 0,
2413 }, {
2414 .usecase_id = LLCC_CAMEXP2,
2415 .slice_id = 19,
2416 .max_cap = 3200,
2417 .priority = 3,
2418 .fixed_size = true,
2419 .bonus_ways = 0xfffff0,
2420 .cache_mode = 2,
2421 }, {
2422 .usecase_id = LLCC_CAMEXP3,
2423 .slice_id = 20,
2424 .max_cap = 3200,
2425 .priority = 2,
2426 .fixed_size = true,
2427 .bonus_ways = 0xfffff0,
2428 .cache_mode = 2,
2429 }, {
2430 .usecase_id = LLCC_CAMEXP4,
2431 .slice_id = 21,
2432 .max_cap = 3200,
2433 .priority = 2,
2434 .fixed_size = true,
2435 .bonus_ways = 0xfffff0,
2436 .cache_mode = 2,
2437 }, {
2438 .usecase_id = LLCC_DISP_WB,
2439 .slice_id = 23,
2440 .max_cap = 1024,
2441 .priority = 4,
2442 .fixed_size = true,
2443 .bonus_ways = 0xffffff,
2444 .cache_mode = 0,
2445 }, {
2446 .usecase_id = LLCC_DISP_1,
2447 .slice_id = 24,
2448 .max_cap = 6144,
2449 .priority = 1,
2450 .fixed_size = true,
2451 .bonus_ways = 0xffffff,
2452 .cache_mode = 2,
2453 }, {
2454 .usecase_id = LLCC_VIDVSP,
2455 .slice_id = 28,
2456 .max_cap = 256,
2457 .priority = 4,
2458 .fixed_size = true,
2459 .bonus_ways = 0xffffff,
2460 .cache_mode = 0,
2461 },
2462 };
2463
2464 static const struct llcc_slice_config sm8650_data[] = {
2465 {
2466 .usecase_id = LLCC_CPUSS,
2467 .slice_id = 1,
2468 .max_cap = 5120,
2469 .priority = 1,
2470 .bonus_ways = 0xffffff,
2471 .cache_mode = 0,
2472 .activate_on_init = true,
2473 .stale_en = true,
2474 }, {
2475 .usecase_id = LLCC_VIDSC0,
2476 .slice_id = 2,
2477 .max_cap = 512,
2478 .priority = 3,
2479 .fixed_size = true,
2480 .bonus_ways = 0xffffff,
2481 .cache_mode = 0,
2482 }, {
2483 .usecase_id = LLCC_AUDIO,
2484 .slice_id = 6,
2485 .max_cap = 512,
2486 .priority = 1,
2487 .fixed_size = true,
2488 .bonus_ways = 0xffffff,
2489 .cache_mode = 0,
2490 }, {
2491 .usecase_id = LLCC_MDMHPGRW,
2492 .slice_id = 25,
2493 .max_cap = 1024,
2494 .priority = 3,
2495 .bonus_ways = 0xffffff,
2496 .cache_mode = 0,
2497 }, {
2498 .usecase_id = LLCC_MODHW,
2499 .slice_id = 26,
2500 .max_cap = 1024,
2501 .priority = 1,
2502 .fixed_size = true,
2503 .bonus_ways = 0xffffff,
2504 .cache_mode = 0,
2505 }, {
2506 .usecase_id = LLCC_CMPT,
2507 .slice_id = 10,
2508 .max_cap = 4096,
2509 .priority = 1,
2510 .fixed_size = true,
2511 .bonus_ways = 0xffffff,
2512 .cache_mode = 0,
2513 }, {
2514 .usecase_id = LLCC_GPUHTW,
2515 .slice_id = 11,
2516 .max_cap = 512,
2517 .priority = 1,
2518 .fixed_size = true,
2519 .bonus_ways = 0xffffff,
2520 .cache_mode = 0,
2521 }, {
2522 .usecase_id = LLCC_GPU,
2523 .slice_id = 9,
2524 .max_cap = 3096,
2525 .priority = 1,
2526 .bonus_ways = 0xffffff,
2527 .cache_mode = 0,
2528 .write_scid_en = true,
2529 .write_scid_cacheable_en = true,
2530 }, {
2531 .usecase_id = LLCC_MMUHWT,
2532 .slice_id = 18,
2533 .max_cap = 768,
2534 .priority = 1,
2535 .fixed_size = true,
2536 .bonus_ways = 0xffffff,
2537 .cache_mode = 0,
2538 .activate_on_init = true,
2539 }, {
2540 .usecase_id = LLCC_DISP,
2541 .slice_id = 16,
2542 .max_cap = 6144,
2543 .priority = 1,
2544 .fixed_size = true,
2545 .bonus_ways = 0xffffff,
2546 .cache_mode = 2,
2547 }, {
2548 .usecase_id = LLCC_MDMHPFX,
2549 .slice_id = 24,
2550 .max_cap = 1024,
2551 .priority = 3,
2552 .fixed_size = true,
2553 .bonus_ways = 0xffffff,
2554 .cache_mode = 0,
2555 }, {
2556 .usecase_id = LLCC_MDMPNG,
2557 .slice_id = 27,
2558 .max_cap = 1024,
2559 .priority = 0,
2560 .fixed_size = true,
2561 .cache_mode = 0,
2562 }, {
2563 .usecase_id = LLCC_AUDHW,
2564 .slice_id = 22,
2565 .max_cap = 1024,
2566 .priority = 1,
2567 .fixed_size = true,
2568 .bonus_ways = 0xffffff,
2569 .cache_mode = 0,
2570 }, {
2571 .usecase_id = LLCC_CVP,
2572 .slice_id = 8,
2573 .max_cap = 256,
2574 .priority = 3,
2575 .fixed_size = true,
2576 .bonus_ways = 0xffffff,
2577 .cache_mode = 0,
2578 }, {
2579 .usecase_id = LLCC_MODPE,
2580 .slice_id = 29,
2581 .max_cap = 128,
2582 .priority = 1,
2583 .fixed_size = true,
2584 .bonus_ways = 0xf00000,
2585 .cache_mode = 0,
2586 .alloc_oneway_en = true,
2587 }, {
2588 .usecase_id = LLCC_WRCACHE,
2589 .slice_id = 31,
2590 .max_cap = 512,
2591 .priority = 1,
2592 .fixed_size = true,
2593 .bonus_ways = 0xffffff,
2594 .cache_mode = 0,
2595 .activate_on_init = true,
2596 }, {
2597 .usecase_id = LLCC_CAMEXP0,
2598 .slice_id = 4,
2599 .max_cap = 256,
2600 .priority = 3,
2601 .fixed_size = true,
2602 .bonus_ways = 0xf,
2603 .cache_mode = 0,
2604 }, {
2605 .usecase_id = LLCC_CAMEXP1,
2606 .slice_id = 7,
2607 .max_cap = 3200,
2608 .priority = 3,
2609 .fixed_size = true,
2610 .bonus_ways = 0xfffff0,
2611 .cache_mode = 2,
2612 }, {
2613 .usecase_id = LLCC_CMPTHCP,
2614 .slice_id = 17,
2615 .max_cap = 256,
2616 .priority = 3,
2617 .fixed_size = true,
2618 .bonus_ways = 0xffffff,
2619 .cache_mode = 0,
2620 }, {
2621 .usecase_id = LLCC_LCPDARE,
2622 .slice_id = 30,
2623 .max_cap = 128,
2624 .priority = 3,
2625 .fixed_size = true,
2626 .bonus_ways = 0xffffff,
2627 .cache_mode = 0,
2628 .activate_on_init = true,
2629 .alloc_oneway_en = true,
2630 }, {
2631 .usecase_id = LLCC_AENPU,
2632 .slice_id = 3,
2633 .max_cap = 3072,
2634 .priority = 1,
2635 .fixed_size = true,
2636 .bonus_ways = 0xffffff,
2637 .cache_mode = 2,
2638 }, {
2639 .usecase_id = LLCC_ISLAND1,
2640 .slice_id = 12,
2641 .max_cap = 5888,
2642 .priority = 7,
2643 .fixed_size = true,
2644 .res_ways = 0x7fffff,
2645 .cache_mode = 0,
2646 }, {
2647 .usecase_id = LLCC_DISP_WB,
2648 .slice_id = 23,
2649 .max_cap = 1024,
2650 .priority = 3,
2651 .fixed_size = true,
2652 .bonus_ways = 0xffffff,
2653 .cache_mode = 0,
2654 }, {
2655 .usecase_id = LLCC_VIDVSP,
2656 .slice_id = 28,
2657 .max_cap = 256,
2658 .priority = 3,
2659 .fixed_size = true,
2660 .bonus_ways = 0xffffff,
2661 .cache_mode = 0,
2662 },
2663 };
2664
2665 static const struct llcc_slice_config qcs615_data[] = {
2666 {
2667 .usecase_id = LLCC_CPUSS,
2668 .slice_id = 1,
2669 .max_cap = 128,
2670 .priority = 1,
2671 .bonus_ways = 0xf,
2672 .cache_mode = 0,
2673 .activate_on_init = true,
2674 .write_scid_en = true,
2675 }, {
2676 .usecase_id = LLCC_MDM,
2677 .slice_id = 8,
2678 .max_cap = 256,
2679 .priority = 0,
2680 .fixed_size = true,
2681 .bonus_ways = 0xf,
2682 .cache_mode = 0,
2683 .activate_on_init = true,
2684 }, {
2685 .usecase_id = LLCC_GPUHTW,
2686 .slice_id = 11,
2687 .max_cap = 128,
2688 .priority = 1,
2689 .fixed_size = true,
2690 .bonus_ways = 0xf,
2691 .cache_mode = 0,
2692 .activate_on_init = true,
2693 }, {
2694 .usecase_id = LLCC_GPU,
2695 .slice_id = 12,
2696 .max_cap = 128,
2697 .priority = 1,
2698 .bonus_ways = 0xf,
2699 .cache_mode = 0,
2700 .activate_on_init = true,
2701 },
2702 };
2703
2704 static const struct llcc_slice_config qcs8300_data[] = {
2705 {
2706 .usecase_id = LLCC_GPUHTW,
2707 .slice_id = 11,
2708 .max_cap = 128,
2709 .priority = 1,
2710 .fixed_size = true,
2711 .bonus_ways = 0xf,
2712 .cache_mode = 0,
2713 .retain_on_pc = true,
2714 }, {
2715 .usecase_id = LLCC_GPU,
2716 .slice_id = 12,
2717 .max_cap = 512,
2718 .priority = 1,
2719 .fixed_size = true,
2720 .bonus_ways = 0xf,
2721 .cache_mode = 0,
2722 .retain_on_pc = true,
2723 .write_scid_en = true,
2724 }, {
2725 .usecase_id = LLCC_MMUHWT,
2726 .slice_id = 13,
2727 .max_cap = 128,
2728 .priority = 1,
2729 .fixed_size = true,
2730 .bonus_ways = 0xf,
2731 .cache_mode = 0,
2732 .activate_on_init = true,
2733 }, {
2734 .usecase_id = LLCC_ECC,
2735 .slice_id = 26,
2736 .max_cap = 256,
2737 .priority = 3,
2738 .fixed_size = true,
2739 .bonus_ways = 0xf,
2740 .cache_mode = 0,
2741 .activate_on_init = true,
2742 }, {
2743 .usecase_id = LLCC_WRCACHE,
2744 .slice_id = 31,
2745 .max_cap = 128,
2746 .priority = 1,
2747 .fixed_size = true,
2748 .bonus_ways = 0xf,
2749 .cache_mode = 0,
2750 .activate_on_init = true,
2751 },
2752 };
2753
2754 static const struct llcc_slice_config qdu1000_data_2ch[] = {
2755 {
2756 .usecase_id = LLCC_MDMHPGRW,
2757 .slice_id = 7,
2758 .max_cap = 512,
2759 .priority = 1,
2760 .fixed_size = true,
2761 .bonus_ways = 0xfff,
2762 .cache_mode = 0,
2763 .retain_on_pc = true,
2764 }, {
2765 .usecase_id = LLCC_MODHW,
2766 .slice_id = 9,
2767 .max_cap = 256,
2768 .priority = 1,
2769 .fixed_size = true,
2770 .bonus_ways = 0xfff,
2771 .cache_mode = 0,
2772 .retain_on_pc = true,
2773 }, {
2774 .usecase_id = LLCC_MDMPNG,
2775 .slice_id = 21,
2776 .max_cap = 256,
2777 .priority = 0,
2778 .fixed_size = true,
2779 .bonus_ways = 0x3,
2780 .cache_mode = 0,
2781 .retain_on_pc = true,
2782 }, {
2783 .usecase_id = LLCC_ECC,
2784 .slice_id = 26,
2785 .max_cap = 512,
2786 .priority = 3,
2787 .fixed_size = true,
2788 .bonus_ways = 0xffc,
2789 .cache_mode = 0,
2790 .activate_on_init = true,
2791 }, {
2792 .usecase_id = LLCC_MODPE,
2793 .slice_id = 29,
2794 .max_cap = 256,
2795 .priority = 1,
2796 .fixed_size = true,
2797 .bonus_ways = 0xfff,
2798 .cache_mode = 0,
2799 .retain_on_pc = true,
2800 }, {
2801 .usecase_id = LLCC_APTCM,
2802 .slice_id = 30,
2803 .max_cap = 256,
2804 .priority = 3,
2805 .fixed_size = true,
2806 .res_ways = 0xc,
2807 .cache_mode = 1,
2808 .retain_on_pc = true,
2809 }, {
2810 .usecase_id = LLCC_WRCACHE,
2811 .slice_id = 31,
2812 .max_cap = 128,
2813 .priority = 1,
2814 .fixed_size = true,
2815 .bonus_ways = 0x3,
2816 .cache_mode = 0,
2817 .activate_on_init = true,
2818 },
2819 };
2820
2821 static const struct llcc_slice_config qdu1000_data_4ch[] = {
2822 {
2823 .usecase_id = LLCC_MDMHPGRW,
2824 .slice_id = 7,
2825 .max_cap = 1024,
2826 .priority = 1,
2827 .fixed_size = true,
2828 .bonus_ways = 0xfff,
2829 .cache_mode = 0,
2830 .retain_on_pc = true,
2831 }, {
2832 .usecase_id = LLCC_MODHW,
2833 .slice_id = 9,
2834 .max_cap = 512,
2835 .priority = 1,
2836 .fixed_size = true,
2837 .bonus_ways = 0xfff,
2838 .cache_mode = 0,
2839 .retain_on_pc = true,
2840 }, {
2841 .usecase_id = LLCC_MDMPNG,
2842 .slice_id = 21,
2843 .max_cap = 512,
2844 .priority = 0,
2845 .fixed_size = true,
2846 .bonus_ways = 0x3,
2847 .cache_mode = 0,
2848 .retain_on_pc = true,
2849 }, {
2850 .usecase_id = LLCC_ECC,
2851 .slice_id = 26,
2852 .max_cap = 1024,
2853 .priority = 3,
2854 .fixed_size = true,
2855 .bonus_ways = 0xffc,
2856 .cache_mode = 0,
2857 .activate_on_init = true,
2858 }, {
2859 .usecase_id = LLCC_MODPE,
2860 .slice_id = 29,
2861 .max_cap = 512,
2862 .priority = 1,
2863 .fixed_size = true,
2864 .bonus_ways = 0xfff,
2865 .cache_mode = 0,
2866 .retain_on_pc = true,
2867 }, {
2868 .usecase_id = LLCC_APTCM,
2869 .slice_id = 30,
2870 .max_cap = 512,
2871 .priority = 3,
2872 .fixed_size = true,
2873 .res_ways = 0xc,
2874 .cache_mode = 1,
2875 .retain_on_pc = true,
2876 }, {
2877 .usecase_id = LLCC_WRCACHE,
2878 .slice_id = 31,
2879 .max_cap = 256,
2880 .priority = 1,
2881 .fixed_size = true,
2882 .bonus_ways = 0x3,
2883 .cache_mode = 0,
2884 .activate_on_init = true,
2885 },
2886 };
2887
2888 static const struct llcc_slice_config qdu1000_data_8ch[] = {
2889 {
2890 .usecase_id = LLCC_MDMHPGRW,
2891 .slice_id = 7,
2892 .max_cap = 2048,
2893 .priority = 1,
2894 .fixed_size = true,
2895 .bonus_ways = 0xfff,
2896 .cache_mode = 0,
2897 .retain_on_pc = true,
2898 }, {
2899 .usecase_id = LLCC_MODHW,
2900 .slice_id = 9,
2901 .max_cap = 1024,
2902 .priority = 1,
2903 .fixed_size = true,
2904 .bonus_ways = 0xfff,
2905 .cache_mode = 0,
2906 .retain_on_pc = true,
2907 }, {
2908 .usecase_id = LLCC_MDMPNG,
2909 .slice_id = 21,
2910 .max_cap = 1024,
2911 .priority = 0,
2912 .fixed_size = true,
2913 .bonus_ways = 0x3,
2914 .cache_mode = 0,
2915 .retain_on_pc = true,
2916 }, {
2917 .usecase_id = LLCC_ECC,
2918 .slice_id = 26,
2919 .max_cap = 2048,
2920 .priority = 3,
2921 .fixed_size = true,
2922 .bonus_ways = 0xffc,
2923 .cache_mode = 0,
2924 .activate_on_init = true,
2925 }, {
2926 .usecase_id = LLCC_MODPE,
2927 .slice_id = 29,
2928 .max_cap = 1024,
2929 .priority = 1,
2930 .fixed_size = true,
2931 .bonus_ways = 0xfff,
2932 .cache_mode = 0,
2933 .retain_on_pc = true,
2934 }, {
2935 .usecase_id = LLCC_APTCM,
2936 .slice_id = 30,
2937 .max_cap = 1024,
2938 .priority = 3,
2939 .fixed_size = true,
2940 .res_ways = 0xc,
2941 .cache_mode = 1,
2942 .retain_on_pc = true,
2943 }, {
2944 .usecase_id = LLCC_WRCACHE,
2945 .slice_id = 31,
2946 .max_cap = 512,
2947 .priority = 1,
2948 .fixed_size = true,
2949 .bonus_ways = 0x3,
2950 .cache_mode = 0,
2951 .activate_on_init = true,
2952 },
2953 };
2954
2955 static const struct llcc_slice_config x1e80100_data[] = {
2956 {
2957 .usecase_id = LLCC_CPUSS,
2958 .slice_id = 1,
2959 .max_cap = 6144,
2960 .priority = 1,
2961 .fixed_size = true,
2962 .bonus_ways = 0xfff,
2963 .cache_mode = 0,
2964 .activate_on_init = true,
2965 }, {
2966 .usecase_id = LLCC_VIDSC0,
2967 .slice_id = 2,
2968 .max_cap = 512,
2969 .priority = 4,
2970 .fixed_size = true,
2971 .bonus_ways = 0xfff,
2972 .cache_mode = 0,
2973 }, {
2974 .usecase_id = LLCC_AUDIO,
2975 .slice_id = 6,
2976 .max_cap = 1024,
2977 .priority = 1,
2978 .fixed_size = true,
2979 .bonus_ways = 0xfff,
2980 .cache_mode = 0,
2981 }, {
2982 .usecase_id = LLCC_CMPT,
2983 .slice_id = 10,
2984 .max_cap = 6144,
2985 .priority = 1,
2986 .fixed_size = true,
2987 .bonus_ways = 0xfff,
2988 .cache_mode = 0,
2989 }, {
2990 .usecase_id = LLCC_GPUHTW,
2991 .slice_id = 11,
2992 .max_cap = 512,
2993 .priority = 1,
2994 .fixed_size = true,
2995 .bonus_ways = 0xfff,
2996 .cache_mode = 0,
2997 }, {
2998 .usecase_id = LLCC_GPU,
2999 .slice_id = 9,
3000 .max_cap = 4608,
3001 .priority = 1,
3002 .bonus_ways = 0xfff,
3003 .cache_mode = 0,
3004 .write_scid_en = true,
3005 .write_scid_cacheable_en = true,
3006 .stale_en = true,
3007 }, {
3008 .usecase_id = LLCC_MMUHWT,
3009 .slice_id = 18,
3010 .max_cap = 512,
3011 .priority = 1,
3012 .fixed_size = true,
3013 .bonus_ways = 0xfff,
3014 .cache_mode = 0,
3015 .activate_on_init = true,
3016 }, {
3017 .usecase_id = LLCC_AUDHW,
3018 .slice_id = 22,
3019 .max_cap = 1024,
3020 .priority = 1,
3021 .fixed_size = true,
3022 .bonus_ways = 0xfff,
3023 .cache_mode = 0,
3024 }, {
3025 .usecase_id = LLCC_CVP,
3026 .slice_id = 8,
3027 .max_cap = 512,
3028 .priority = 4,
3029 .fixed_size = true,
3030 .bonus_ways = 0xfff,
3031 .cache_mode = 0,
3032 }, {
3033 .usecase_id = LLCC_WRCACHE,
3034 .slice_id = 31,
3035 .max_cap = 1024,
3036 .priority = 1,
3037 .fixed_size = true,
3038 .bonus_ways = 0xfff,
3039 .cache_mode = 0,
3040 .activate_on_init = true,
3041 }, {
3042 .usecase_id = LLCC_CAMEXP0,
3043 .slice_id = 4,
3044 .max_cap = 256,
3045 .priority = 4,
3046 .fixed_size = true,
3047 .bonus_ways = 0x3,
3048 .cache_mode = 0,
3049 }, {
3050 .usecase_id = LLCC_CAMEXP1,
3051 .slice_id = 7,
3052 .max_cap = 3072,
3053 .priority = 3,
3054 .fixed_size = true,
3055 .bonus_ways = 0xffc,
3056 .cache_mode = 2,
3057 }, {
3058 .usecase_id = LLCC_LCPDARE,
3059 .slice_id = 30,
3060 .max_cap = 512,
3061 .priority = 3,
3062 .fixed_size = true,
3063 .bonus_ways = 0xfff,
3064 .cache_mode = 0,
3065 .activate_on_init = true,
3066 .alloc_oneway_en = true,
3067 }, {
3068 .usecase_id = LLCC_AENPU,
3069 .slice_id = 3,
3070 .max_cap = 3072,
3071 .priority = 1,
3072 .fixed_size = true,
3073 .bonus_ways = 0xfff,
3074 .cache_mode = 2,
3075 }, {
3076 .usecase_id = LLCC_ISLAND1,
3077 .slice_id = 12,
3078 .max_cap = 2048,
3079 .priority = 7,
3080 .fixed_size = true,
3081 .res_ways = 0xf,
3082 .cache_mode = 0,
3083 }, {
3084 .usecase_id = LLCC_CAMEXP2,
3085 .slice_id = 19,
3086 .max_cap = 3072,
3087 .priority = 3,
3088 .fixed_size = true,
3089 .bonus_ways = 0xffc,
3090 .cache_mode = 2,
3091 }, {
3092 .usecase_id = LLCC_CAMEXP3,
3093 .slice_id = 20,
3094 .max_cap = 3072,
3095 .priority = 2,
3096 .fixed_size = true,
3097 .bonus_ways = 0xffc,
3098 .cache_mode = 2,
3099 }, {
3100 .usecase_id = LLCC_CAMEXP4,
3101 .slice_id = 21,
3102 .max_cap = 3072,
3103 .priority = 2,
3104 .fixed_size = true,
3105 .bonus_ways = 0xffc,
3106 .cache_mode = 2,
3107 },
3108 };
3109
3110 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = {
3111 .trp_ecc_error_status0 = 0x20344,
3112 .trp_ecc_error_status1 = 0x20348,
3113 .trp_ecc_sb_err_syn0 = 0x2304c,
3114 .trp_ecc_db_err_syn0 = 0x20370,
3115 .trp_ecc_error_cntr_clear = 0x20440,
3116 .trp_interrupt_0_status = 0x20480,
3117 .trp_interrupt_0_clear = 0x20484,
3118 .trp_interrupt_0_enable = 0x20488,
3119
3120 /* LLCC Common registers */
3121 .cmn_status0 = 0x3000c,
3122 .cmn_interrupt_0_enable = 0x3001c,
3123 .cmn_interrupt_2_enable = 0x3003c,
3124
3125 /* LLCC DRP registers */
3126 .drp_ecc_error_cfg = 0x40000,
3127 .drp_ecc_error_cntr_clear = 0x40004,
3128 .drp_interrupt_status = 0x41000,
3129 .drp_interrupt_clear = 0x41008,
3130 .drp_interrupt_enable = 0x4100c,
3131 .drp_ecc_error_status0 = 0x42044,
3132 .drp_ecc_error_status1 = 0x42048,
3133 .drp_ecc_sb_err_syn0 = 0x4204c,
3134 .drp_ecc_db_err_syn0 = 0x42070,
3135 };
3136
3137 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = {
3138 .trp_ecc_error_status0 = 0x20344,
3139 .trp_ecc_error_status1 = 0x20348,
3140 .trp_ecc_sb_err_syn0 = 0x2034c,
3141 .trp_ecc_db_err_syn0 = 0x20370,
3142 .trp_ecc_error_cntr_clear = 0x20440,
3143 .trp_interrupt_0_status = 0x20480,
3144 .trp_interrupt_0_clear = 0x20484,
3145 .trp_interrupt_0_enable = 0x20488,
3146
3147 /* LLCC Common registers */
3148 .cmn_status0 = 0x3400c,
3149 .cmn_interrupt_0_enable = 0x3401c,
3150 .cmn_interrupt_2_enable = 0x3403c,
3151
3152 /* LLCC DRP registers */
3153 .drp_ecc_error_cfg = 0x50000,
3154 .drp_ecc_error_cntr_clear = 0x50004,
3155 .drp_interrupt_status = 0x50020,
3156 .drp_interrupt_clear = 0x50028,
3157 .drp_interrupt_enable = 0x5002c,
3158 .drp_ecc_error_status0 = 0x520f4,
3159 .drp_ecc_error_status1 = 0x520f8,
3160 .drp_ecc_sb_err_syn0 = 0x520fc,
3161 .drp_ecc_db_err_syn0 = 0x52120,
3162 };
3163
3164 /* LLCC register offset starting from v1.0.0 */
3165 static const u32 llcc_v1_reg_offset[] = {
3166 [LLCC_COMMON_HW_INFO] = 0x00030000,
3167 [LLCC_COMMON_STATUS0] = 0x0003000c,
3168 };
3169
3170 /* LLCC register offset starting from v2.0.1 */
3171 static const u32 llcc_v2_1_reg_offset[] = {
3172 [LLCC_COMMON_HW_INFO] = 0x00034000,
3173 [LLCC_COMMON_STATUS0] = 0x0003400c,
3174 };
3175
3176 static const struct qcom_llcc_config qcs615_cfg[] = {
3177 {
3178 .sct_data = qcs615_data,
3179 .size = ARRAY_SIZE(qcs615_data),
3180 .reg_offset = llcc_v1_reg_offset,
3181 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3182 },
3183 };
3184
3185 static const struct qcom_llcc_config qcs8300_cfg[] = {
3186 {
3187 .sct_data = qcs8300_data,
3188 .size = ARRAY_SIZE(qcs8300_data),
3189 .reg_offset = llcc_v2_1_reg_offset,
3190 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3191 .num_banks = 4,
3192 },
3193 };
3194
3195 static const struct qcom_llcc_config qdu1000_cfg[] = {
3196 {
3197 .sct_data = qdu1000_data_8ch,
3198 .size = ARRAY_SIZE(qdu1000_data_8ch),
3199 .reg_offset = llcc_v2_1_reg_offset,
3200 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3201 },
3202 {
3203 .sct_data = qdu1000_data_4ch,
3204 .size = ARRAY_SIZE(qdu1000_data_4ch),
3205 .reg_offset = llcc_v2_1_reg_offset,
3206 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3207 },
3208 {
3209 .sct_data = qdu1000_data_4ch,
3210 .size = ARRAY_SIZE(qdu1000_data_4ch),
3211 .reg_offset = llcc_v2_1_reg_offset,
3212 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3213 },
3214 {
3215 .sct_data = qdu1000_data_2ch,
3216 .size = ARRAY_SIZE(qdu1000_data_2ch),
3217 .reg_offset = llcc_v2_1_reg_offset,
3218 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3219 },
3220 };
3221
3222 static const struct qcom_llcc_config ipq5424_cfg[] = {
3223 {
3224 .sct_data = ipq5424_data,
3225 .size = ARRAY_SIZE(ipq5424_data),
3226 .reg_offset = llcc_v2_1_reg_offset,
3227 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3228 .no_broadcast_register = true,
3229 },
3230 };
3231
3232 static const struct qcom_llcc_config sa8775p_cfg[] = {
3233 {
3234 .sct_data = sa8775p_data,
3235 .size = ARRAY_SIZE(sa8775p_data),
3236 .reg_offset = llcc_v2_1_reg_offset,
3237 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3238 },
3239 };
3240
3241 static const struct qcom_llcc_config sar1130p_cfg[] = {
3242 {
3243 .sct_data = sar1130p_data,
3244 .size = ARRAY_SIZE(sar1130p_data),
3245 .reg_offset = llcc_v2_1_reg_offset,
3246 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3247 .max_cap_shift = 14,
3248 .num_banks = 2,
3249 },
3250 };
3251
3252 static const struct qcom_llcc_config sar2130p_cfg[] = {
3253 {
3254 .sct_data = sar2130p_data,
3255 .size = ARRAY_SIZE(sar2130p_data),
3256 .reg_offset = llcc_v2_1_reg_offset,
3257 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3258 .max_cap_shift = 14,
3259 .num_banks = 2,
3260 },
3261 };
3262
3263 static const struct qcom_llcc_config sc7180_cfg[] = {
3264 {
3265 .sct_data = sc7180_data,
3266 .size = ARRAY_SIZE(sc7180_data),
3267 .reg_offset = llcc_v1_reg_offset,
3268 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3269 },
3270 };
3271
3272 static const struct qcom_llcc_config sc7280_cfg[] = {
3273 {
3274 .sct_data = sc7280_data,
3275 .size = ARRAY_SIZE(sc7280_data),
3276 .reg_offset = llcc_v1_reg_offset,
3277 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3278 },
3279 };
3280
3281 static const struct qcom_llcc_config sc8180x_cfg[] = {
3282 {
3283 .sct_data = sc8180x_data,
3284 .size = ARRAY_SIZE(sc8180x_data),
3285 .reg_offset = llcc_v1_reg_offset,
3286 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3287 },
3288 };
3289
3290 static const struct qcom_llcc_config sc8280xp_cfg[] = {
3291 {
3292 .sct_data = sc8280xp_data,
3293 .size = ARRAY_SIZE(sc8280xp_data),
3294 .reg_offset = llcc_v1_reg_offset,
3295 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3296 },
3297 };
3298
3299 static const struct qcom_llcc_config sdm845_cfg[] = {
3300 {
3301 .sct_data = sdm845_data,
3302 .size = ARRAY_SIZE(sdm845_data),
3303 .skip_llcc_cfg = true,
3304 .reg_offset = llcc_v1_reg_offset,
3305 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3306 .no_edac = true,
3307 },
3308 };
3309
3310 static const struct qcom_llcc_config sm6350_cfg[] = {
3311 {
3312 .sct_data = sm6350_data,
3313 .size = ARRAY_SIZE(sm6350_data),
3314 .reg_offset = llcc_v1_reg_offset,
3315 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3316 },
3317 };
3318
3319 static const struct qcom_llcc_config sm7150_cfg[] = {
3320 {
3321 .sct_data = sm7150_data,
3322 .size = ARRAY_SIZE(sm7150_data),
3323 .reg_offset = llcc_v1_reg_offset,
3324 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3325 },
3326 };
3327
3328 static const struct qcom_llcc_config sm8150_cfg[] = {
3329 {
3330 .sct_data = sm8150_data,
3331 .size = ARRAY_SIZE(sm8150_data),
3332 .reg_offset = llcc_v1_reg_offset,
3333 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3334 },
3335 };
3336
3337 static const struct qcom_llcc_config sm8250_cfg[] = {
3338 {
3339 .sct_data = sm8250_data,
3340 .size = ARRAY_SIZE(sm8250_data),
3341 .reg_offset = llcc_v1_reg_offset,
3342 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3343 },
3344 };
3345
3346 static const struct qcom_llcc_config sm8350_cfg[] = {
3347 {
3348 .sct_data = sm8350_data,
3349 .size = ARRAY_SIZE(sm8350_data),
3350 .reg_offset = llcc_v1_reg_offset,
3351 .edac_reg_offset = &llcc_v1_edac_reg_offset,
3352 },
3353 };
3354
3355 static const struct qcom_llcc_config sm8450_cfg[] = {
3356 {
3357 .sct_data = sm8450_data,
3358 .size = ARRAY_SIZE(sm8450_data),
3359 .reg_offset = llcc_v2_1_reg_offset,
3360 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3361 },
3362 };
3363
3364 static const struct qcom_llcc_config sm8550_cfg[] = {
3365 {
3366 .sct_data = sm8550_data,
3367 .size = ARRAY_SIZE(sm8550_data),
3368 .reg_offset = llcc_v2_1_reg_offset,
3369 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3370 },
3371 };
3372
3373 static const struct qcom_llcc_config sm8650_cfg[] = {
3374 {
3375 .sct_data = sm8650_data,
3376 .size = ARRAY_SIZE(sm8650_data),
3377 .reg_offset = llcc_v2_1_reg_offset,
3378 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3379 },
3380 };
3381
3382 static const struct qcom_llcc_config x1e80100_cfg[] = {
3383 {
3384 .sct_data = x1e80100_data,
3385 .size = ARRAY_SIZE(x1e80100_data),
3386 .reg_offset = llcc_v2_1_reg_offset,
3387 .edac_reg_offset = &llcc_v2_1_edac_reg_offset,
3388 .irq_configured = true,
3389 },
3390 };
3391
3392 static const struct qcom_sct_config qcs615_cfgs = {
3393 .llcc_config = qcs615_cfg,
3394 .num_config = ARRAY_SIZE(qcs615_cfg),
3395 };
3396
3397 static const struct qcom_sct_config qcs8300_cfgs = {
3398 .llcc_config = qcs8300_cfg,
3399 .num_config = ARRAY_SIZE(qcs8300_cfg),
3400 };
3401
3402 static const struct qcom_sct_config qdu1000_cfgs = {
3403 .llcc_config = qdu1000_cfg,
3404 .num_config = ARRAY_SIZE(qdu1000_cfg),
3405 };
3406
3407 static const struct qcom_sct_config ipq5424_cfgs = {
3408 .llcc_config = ipq5424_cfg,
3409 .num_config = ARRAY_SIZE(ipq5424_cfg),
3410 };
3411
3412 static const struct qcom_sct_config sa8775p_cfgs = {
3413 .llcc_config = sa8775p_cfg,
3414 .num_config = ARRAY_SIZE(sa8775p_cfg),
3415 };
3416
3417 static const struct qcom_sct_config sar1130p_cfgs = {
3418 .llcc_config = sar1130p_cfg,
3419 .num_config = ARRAY_SIZE(sar1130p_cfg),
3420 };
3421
3422 static const struct qcom_sct_config sar2130p_cfgs = {
3423 .llcc_config = sar2130p_cfg,
3424 .num_config = ARRAY_SIZE(sar2130p_cfg),
3425 };
3426
3427 static const struct qcom_sct_config sc7180_cfgs = {
3428 .llcc_config = sc7180_cfg,
3429 .num_config = ARRAY_SIZE(sc7180_cfg),
3430 };
3431
3432 static const struct qcom_sct_config sc7280_cfgs = {
3433 .llcc_config = sc7280_cfg,
3434 .num_config = ARRAY_SIZE(sc7280_cfg),
3435 };
3436
3437 static const struct qcom_sct_config sc8180x_cfgs = {
3438 .llcc_config = sc8180x_cfg,
3439 .num_config = ARRAY_SIZE(sc8180x_cfg),
3440 };
3441
3442 static const struct qcom_sct_config sc8280xp_cfgs = {
3443 .llcc_config = sc8280xp_cfg,
3444 .num_config = ARRAY_SIZE(sc8280xp_cfg),
3445 };
3446
3447 static const struct qcom_sct_config sdm845_cfgs = {
3448 .llcc_config = sdm845_cfg,
3449 .num_config = ARRAY_SIZE(sdm845_cfg),
3450 };
3451
3452 static const struct qcom_sct_config sm6350_cfgs = {
3453 .llcc_config = sm6350_cfg,
3454 .num_config = ARRAY_SIZE(sm6350_cfg),
3455 };
3456
3457 static const struct qcom_sct_config sm7150_cfgs = {
3458 .llcc_config = sm7150_cfg,
3459 .num_config = ARRAY_SIZE(sm7150_cfg),
3460 };
3461
3462 static const struct qcom_sct_config sm8150_cfgs = {
3463 .llcc_config = sm8150_cfg,
3464 .num_config = ARRAY_SIZE(sm8150_cfg),
3465 };
3466
3467 static const struct qcom_sct_config sm8250_cfgs = {
3468 .llcc_config = sm8250_cfg,
3469 .num_config = ARRAY_SIZE(sm8250_cfg),
3470 };
3471
3472 static const struct qcom_sct_config sm8350_cfgs = {
3473 .llcc_config = sm8350_cfg,
3474 .num_config = ARRAY_SIZE(sm8350_cfg),
3475 };
3476
3477 static const struct qcom_sct_config sm8450_cfgs = {
3478 .llcc_config = sm8450_cfg,
3479 .num_config = ARRAY_SIZE(sm8450_cfg),
3480 };
3481
3482 static const struct qcom_sct_config sm8550_cfgs = {
3483 .llcc_config = sm8550_cfg,
3484 .num_config = ARRAY_SIZE(sm8550_cfg),
3485 };
3486
3487 static const struct qcom_sct_config sm8650_cfgs = {
3488 .llcc_config = sm8650_cfg,
3489 .num_config = ARRAY_SIZE(sm8650_cfg),
3490 };
3491
3492 static const struct qcom_sct_config x1e80100_cfgs = {
3493 .llcc_config = x1e80100_cfg,
3494 .num_config = ARRAY_SIZE(x1e80100_cfg),
3495 };
3496
3497 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
3498
3499 /**
3500 * llcc_slice_getd - get llcc slice descriptor
3501 * @uid: usecase_id for the client
3502 *
3503 * A pointer to llcc slice descriptor will be returned on success
3504 * and error pointer is returned on failure
3505 */
llcc_slice_getd(u32 uid)3506 struct llcc_slice_desc *llcc_slice_getd(u32 uid)
3507 {
3508 const struct llcc_slice_config *cfg;
3509 struct llcc_slice_desc *desc;
3510 u32 sz, count;
3511
3512 if (IS_ERR(drv_data))
3513 return ERR_CAST(drv_data);
3514
3515 cfg = drv_data->cfg;
3516 sz = drv_data->cfg_size;
3517
3518 for (count = 0; cfg && count < sz; count++, cfg++)
3519 if (cfg->usecase_id == uid)
3520 break;
3521
3522 if (count == sz || !cfg)
3523 return ERR_PTR(-ENODEV);
3524
3525 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
3526 if (!desc)
3527 return ERR_PTR(-ENOMEM);
3528
3529 desc->slice_id = cfg->slice_id;
3530 desc->slice_size = cfg->max_cap;
3531
3532 return desc;
3533 }
3534 EXPORT_SYMBOL_GPL(llcc_slice_getd);
3535
3536 /**
3537 * llcc_slice_putd - llcc slice descriptor
3538 * @desc: Pointer to llcc slice descriptor
3539 */
llcc_slice_putd(struct llcc_slice_desc * desc)3540 void llcc_slice_putd(struct llcc_slice_desc *desc)
3541 {
3542 if (!IS_ERR_OR_NULL(desc))
3543 kfree(desc);
3544 }
3545 EXPORT_SYMBOL_GPL(llcc_slice_putd);
3546
llcc_update_act_ctrl(u32 sid,u32 act_ctrl_reg_val,u32 status)3547 static int llcc_update_act_ctrl(u32 sid,
3548 u32 act_ctrl_reg_val, u32 status)
3549 {
3550 struct regmap *regmap;
3551 u32 act_ctrl_reg;
3552 u32 act_clear_reg;
3553 u32 status_reg;
3554 u32 slice_status;
3555 int ret;
3556
3557 if (IS_ERR(drv_data))
3558 return PTR_ERR(drv_data);
3559
3560 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid);
3561 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid);
3562 status_reg = LLCC_TRP_STATUSn(sid);
3563
3564 /* Set the ACTIVE trigger */
3565 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG;
3566 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3567 act_ctrl_reg_val);
3568 if (ret)
3569 return ret;
3570
3571 /* Clear the ACTIVE trigger */
3572 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG;
3573 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg,
3574 act_ctrl_reg_val);
3575 if (ret)
3576 return ret;
3577
3578 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3579 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
3580 ret = regmap_read_poll_timeout(regmap, status_reg,
3581 slice_status, (slice_status & ACT_COMPLETE),
3582 0, LLCC_STATUS_READ_DELAY);
3583 if (ret)
3584 return ret;
3585 }
3586
3587 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
3588 slice_status, !(slice_status & status),
3589 0, LLCC_STATUS_READ_DELAY);
3590 if (ret)
3591 return ret;
3592
3593 if (drv_data->version >= LLCC_VERSION_4_1_0_0)
3594 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg,
3595 ACT_CLEAR);
3596
3597 return ret;
3598 }
3599
3600 /**
3601 * llcc_slice_activate - Activate the llcc slice
3602 * @desc: Pointer to llcc slice descriptor
3603 *
3604 * A value of zero will be returned on success and a negative errno will
3605 * be returned in error cases
3606 */
llcc_slice_activate(struct llcc_slice_desc * desc)3607 int llcc_slice_activate(struct llcc_slice_desc *desc)
3608 {
3609 int ret;
3610 u32 act_ctrl_val;
3611
3612 if (IS_ERR(drv_data))
3613 return PTR_ERR(drv_data);
3614
3615 if (IS_ERR_OR_NULL(desc))
3616 return -EINVAL;
3617
3618 mutex_lock(&drv_data->lock);
3619 if (test_bit(desc->slice_id, drv_data->bitmap)) {
3620 mutex_unlock(&drv_data->lock);
3621 return 0;
3622 }
3623
3624 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT;
3625
3626 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
3627 DEACTIVATE);
3628 if (ret) {
3629 mutex_unlock(&drv_data->lock);
3630 return ret;
3631 }
3632
3633 __set_bit(desc->slice_id, drv_data->bitmap);
3634 mutex_unlock(&drv_data->lock);
3635
3636 return ret;
3637 }
3638 EXPORT_SYMBOL_GPL(llcc_slice_activate);
3639
3640 /**
3641 * llcc_slice_deactivate - Deactivate the llcc slice
3642 * @desc: Pointer to llcc slice descriptor
3643 *
3644 * A value of zero will be returned on success and a negative errno will
3645 * be returned in error cases
3646 */
llcc_slice_deactivate(struct llcc_slice_desc * desc)3647 int llcc_slice_deactivate(struct llcc_slice_desc *desc)
3648 {
3649 u32 act_ctrl_val;
3650 int ret;
3651
3652 if (IS_ERR(drv_data))
3653 return PTR_ERR(drv_data);
3654
3655 if (IS_ERR_OR_NULL(desc))
3656 return -EINVAL;
3657
3658 mutex_lock(&drv_data->lock);
3659 if (!test_bit(desc->slice_id, drv_data->bitmap)) {
3660 mutex_unlock(&drv_data->lock);
3661 return 0;
3662 }
3663 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT;
3664
3665 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val,
3666 ACTIVATE);
3667 if (ret) {
3668 mutex_unlock(&drv_data->lock);
3669 return ret;
3670 }
3671
3672 __clear_bit(desc->slice_id, drv_data->bitmap);
3673 mutex_unlock(&drv_data->lock);
3674
3675 return ret;
3676 }
3677 EXPORT_SYMBOL_GPL(llcc_slice_deactivate);
3678
3679 /**
3680 * llcc_get_slice_id - return the slice id
3681 * @desc: Pointer to llcc slice descriptor
3682 */
llcc_get_slice_id(struct llcc_slice_desc * desc)3683 int llcc_get_slice_id(struct llcc_slice_desc *desc)
3684 {
3685 if (IS_ERR_OR_NULL(desc))
3686 return -EINVAL;
3687
3688 return desc->slice_id;
3689 }
3690 EXPORT_SYMBOL_GPL(llcc_get_slice_id);
3691
3692 /**
3693 * llcc_get_slice_size - return the slice id
3694 * @desc: Pointer to llcc slice descriptor
3695 */
llcc_get_slice_size(struct llcc_slice_desc * desc)3696 size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
3697 {
3698 if (IS_ERR_OR_NULL(desc))
3699 return 0;
3700
3701 return desc->slice_size;
3702 }
3703 EXPORT_SYMBOL_GPL(llcc_get_slice_size);
3704
_qcom_llcc_cfg_program(const struct llcc_slice_config * config,const struct qcom_llcc_config * cfg)3705 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config,
3706 const struct qcom_llcc_config *cfg)
3707 {
3708 int ret;
3709 u32 attr2_cfg;
3710 u32 attr1_cfg;
3711 u32 attr0_cfg;
3712 u32 attr2_val;
3713 u32 attr1_val;
3714 u32 attr0_val;
3715 u32 max_cap_cacheline;
3716 struct llcc_slice_desc desc;
3717
3718 attr1_val = config->cache_mode;
3719 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
3720 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
3721 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT;
3722
3723 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap);
3724
3725 /*
3726 * LLCC instances can vary for each target.
3727 * The SW writes to broadcast register which gets propagated
3728 * to each llcc instance (llcc0,.. llccN).
3729 * Since the size of the memory is divided equally amongst the
3730 * llcc instances, we need to configure the max cap accordingly.
3731 */
3732 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
3733 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
3734 if (cfg->max_cap_shift)
3735 attr1_val |= max_cap_cacheline << cfg->max_cap_shift;
3736 else
3737 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
3738
3739 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id);
3740
3741 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
3742 if (ret)
3743 return ret;
3744
3745 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3746 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id);
3747 attr0_val = config->res_ways;
3748 attr2_val = config->bonus_ways;
3749 } else {
3750 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK;
3751 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
3752 }
3753
3754 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id);
3755
3756 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
3757 if (ret)
3758 return ret;
3759
3760 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3761 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val);
3762 if (ret)
3763 return ret;
3764 }
3765
3766 /* At least SDM845 disallows non-secure writes to these registers */
3767 if (!cfg->skip_llcc_cfg) {
3768 u32 disable_cap_alloc, retain_pc;
3769
3770 disable_cap_alloc = config->dis_cap_alloc << config->slice_id;
3771 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC,
3772 BIT(config->slice_id), disable_cap_alloc);
3773 if (ret)
3774 return ret;
3775
3776 if (drv_data->version < LLCC_VERSION_4_1_0_0) {
3777 retain_pc = config->retain_on_pc << config->slice_id;
3778 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT,
3779 BIT(config->slice_id), retain_pc);
3780 if (ret)
3781 return ret;
3782 }
3783 }
3784
3785 if (drv_data->version >= LLCC_VERSION_2_0_0_0) {
3786 u32 wren;
3787
3788 wren = config->write_scid_en << config->slice_id;
3789 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN,
3790 BIT(config->slice_id), wren);
3791 if (ret)
3792 return ret;
3793 }
3794
3795 if (drv_data->version >= LLCC_VERSION_2_1_0_0) {
3796 u32 wr_cache_en;
3797
3798 wr_cache_en = config->write_scid_cacheable_en << config->slice_id;
3799 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN,
3800 BIT(config->slice_id), wr_cache_en);
3801 if (ret)
3802 return ret;
3803 }
3804
3805 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
3806 u32 stale_en;
3807 u32 stale_cap_en;
3808 u32 mru_uncap_en;
3809 u32 mru_rollover;
3810 u32 alloc_oneway_en;
3811 u32 ovcap_en;
3812 u32 ovcap_prio;
3813 u32 vict_prio;
3814
3815 stale_en = config->stale_en << config->slice_id;
3816 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1,
3817 BIT(config->slice_id), stale_en);
3818 if (ret)
3819 return ret;
3820
3821 stale_cap_en = config->stale_cap_en << config->slice_id;
3822 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2,
3823 BIT(config->slice_id), stale_cap_en);
3824 if (ret)
3825 return ret;
3826
3827 mru_uncap_en = config->mru_uncap_en << config->slice_id;
3828 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3,
3829 BIT(config->slice_id), mru_uncap_en);
3830 if (ret)
3831 return ret;
3832
3833 mru_rollover = config->mru_rollover << config->slice_id;
3834 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4,
3835 BIT(config->slice_id), mru_rollover);
3836 if (ret)
3837 return ret;
3838
3839 alloc_oneway_en = config->alloc_oneway_en << config->slice_id;
3840 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5,
3841 BIT(config->slice_id), alloc_oneway_en);
3842 if (ret)
3843 return ret;
3844
3845 ovcap_en = config->ovcap_en << config->slice_id;
3846 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6,
3847 BIT(config->slice_id), ovcap_en);
3848 if (ret)
3849 return ret;
3850
3851 ovcap_prio = config->ovcap_prio << config->slice_id;
3852 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7,
3853 BIT(config->slice_id), ovcap_prio);
3854 if (ret)
3855 return ret;
3856
3857 vict_prio = config->vict_prio << config->slice_id;
3858 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8,
3859 BIT(config->slice_id), vict_prio);
3860 if (ret)
3861 return ret;
3862 }
3863
3864 if (config->activate_on_init) {
3865 desc.slice_id = config->slice_id;
3866 ret = llcc_slice_activate(&desc);
3867 }
3868
3869 return ret;
3870 }
3871
qcom_llcc_cfg_program(struct platform_device * pdev,const struct qcom_llcc_config * cfg)3872 static int qcom_llcc_cfg_program(struct platform_device *pdev,
3873 const struct qcom_llcc_config *cfg)
3874 {
3875 int i;
3876 u32 sz;
3877 int ret = 0;
3878 const struct llcc_slice_config *llcc_table;
3879
3880 sz = drv_data->cfg_size;
3881 llcc_table = drv_data->cfg;
3882
3883 for (i = 0; i < sz; i++) {
3884 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg);
3885 if (ret)
3886 return ret;
3887 }
3888
3889 return ret;
3890 }
3891
qcom_llcc_get_cfg_index(struct platform_device * pdev,u8 * cfg_index,int num_config)3892 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
3893 {
3894 int ret;
3895
3896 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
3897 if (ret == -ENOENT || ret == -EOPNOTSUPP) {
3898 if (num_config > 1)
3899 return -EINVAL;
3900 *cfg_index = 0;
3901 return 0;
3902 }
3903
3904 if (!ret && *cfg_index >= num_config)
3905 ret = -EINVAL;
3906
3907 return ret;
3908 }
3909
qcom_llcc_remove(struct platform_device * pdev)3910 static void qcom_llcc_remove(struct platform_device *pdev)
3911 {
3912 /* Set the global pointer to a error code to avoid referencing it */
3913 drv_data = ERR_PTR(-ENODEV);
3914 }
3915
qcom_llcc_init_mmio(struct platform_device * pdev,u8 index,const char * name)3916 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index,
3917 const char *name)
3918 {
3919 void __iomem *base;
3920 struct regmap_config llcc_regmap_config = {
3921 .reg_bits = 32,
3922 .reg_stride = 4,
3923 .val_bits = 32,
3924 .fast_io = true,
3925 };
3926
3927 base = devm_platform_ioremap_resource(pdev, index);
3928 if (IS_ERR(base))
3929 return ERR_CAST(base);
3930
3931 llcc_regmap_config.name = name;
3932 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config);
3933 }
3934
qcom_llcc_probe(struct platform_device * pdev)3935 static int qcom_llcc_probe(struct platform_device *pdev)
3936 {
3937 u32 num_banks;
3938 struct device *dev = &pdev->dev;
3939 int ret, i;
3940 struct platform_device *llcc_edac;
3941 const struct qcom_sct_config *cfgs;
3942 const struct qcom_llcc_config *cfg;
3943 const struct llcc_slice_config *llcc_cfg;
3944 u32 sz;
3945 u8 cfg_index;
3946 u32 version;
3947 struct regmap *regmap;
3948
3949 if (!IS_ERR(drv_data))
3950 return -EBUSY;
3951
3952 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL);
3953 if (!drv_data) {
3954 ret = -ENOMEM;
3955 goto err;
3956 }
3957
3958 /* Initialize the first LLCC bank regmap */
3959 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base");
3960 if (IS_ERR(regmap)) {
3961 ret = PTR_ERR(regmap);
3962 goto err;
3963 }
3964
3965 cfgs = of_device_get_match_data(&pdev->dev);
3966 if (!cfgs) {
3967 ret = -EINVAL;
3968 goto err;
3969 }
3970 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
3971 if (ret)
3972 goto err;
3973 cfg = &cfgs->llcc_config[cfg_index];
3974
3975 if (cfg->num_banks) {
3976 num_banks = cfg->num_banks;
3977 } else {
3978 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
3979 if (ret)
3980 goto err;
3981
3982 num_banks &= LLCC_LB_CNT_MASK;
3983 num_banks >>= LLCC_LB_CNT_SHIFT;
3984 }
3985
3986 drv_data->num_banks = num_banks;
3987
3988 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL);
3989 if (!drv_data->regmaps) {
3990 ret = -ENOMEM;
3991 goto err;
3992 }
3993
3994 drv_data->regmaps[0] = regmap;
3995
3996 /* Initialize rest of LLCC bank regmaps */
3997 for (i = 1; i < num_banks; i++) {
3998 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i);
3999
4000 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base);
4001 if (IS_ERR(drv_data->regmaps[i])) {
4002 ret = PTR_ERR(drv_data->regmaps[i]);
4003 goto err;
4004 }
4005 }
4006
4007 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base");
4008 if (IS_ERR(drv_data->bcast_regmap)) {
4009 if (cfg->no_broadcast_register) {
4010 drv_data->bcast_regmap = regmap;
4011 } else {
4012 ret = PTR_ERR(drv_data->bcast_regmap);
4013 goto err;
4014 }
4015 }
4016
4017 /* Extract version of the IP */
4018 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO],
4019 &version);
4020 if (ret)
4021 goto err;
4022
4023 drv_data->version = version;
4024
4025 /* Applicable only when drv_data->version >= 4.1 */
4026 if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
4027 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
4028 if (IS_ERR(drv_data->bcast_and_regmap)) {
4029 ret = PTR_ERR(drv_data->bcast_and_regmap);
4030 if (ret == -EINVAL)
4031 drv_data->bcast_and_regmap = NULL;
4032 else
4033 goto err;
4034 }
4035 }
4036
4037 llcc_cfg = cfg->sct_data;
4038 sz = cfg->size;
4039
4040 for (i = 0; i < sz; i++)
4041 if (llcc_cfg[i].slice_id > drv_data->max_slices)
4042 drv_data->max_slices = llcc_cfg[i].slice_id;
4043
4044 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices,
4045 GFP_KERNEL);
4046 if (!drv_data->bitmap) {
4047 ret = -ENOMEM;
4048 goto err;
4049 }
4050
4051 drv_data->cfg = llcc_cfg;
4052 drv_data->cfg_size = sz;
4053 drv_data->edac_reg_offset = cfg->edac_reg_offset;
4054 drv_data->ecc_irq_configured = cfg->irq_configured;
4055 mutex_init(&drv_data->lock);
4056 platform_set_drvdata(pdev, drv_data);
4057
4058 ret = qcom_llcc_cfg_program(pdev, cfg);
4059 if (ret)
4060 goto err;
4061
4062 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0);
4063
4064 /*
4065 * On some platforms, the access to EDAC registers will be locked by
4066 * the bootloader. So probing the EDAC driver will result in a crash.
4067 * Hence, disable the creation of EDAC platform device for the
4068 * problematic platforms.
4069 */
4070 if (!cfg->no_edac) {
4071 llcc_edac = platform_device_register_data(&pdev->dev,
4072 "qcom_llcc_edac", -1, drv_data,
4073 sizeof(*drv_data));
4074 if (IS_ERR(llcc_edac))
4075 dev_err(dev, "Failed to register llcc edac driver\n");
4076 }
4077
4078 return 0;
4079 err:
4080 drv_data = ERR_PTR(-ENODEV);
4081 return ret;
4082 }
4083
4084 static const struct of_device_id qcom_llcc_of_match[] = {
4085 { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs},
4086 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs},
4087 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs},
4088 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
4089 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
4090 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs },
4091 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs },
4092 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
4093 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
4094 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
4095 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
4096 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
4097 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
4098 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
4099 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
4100 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
4101 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
4102 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
4103 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
4104 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
4105 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
4106 { }
4107 };
4108 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match);
4109
4110 static struct platform_driver qcom_llcc_driver = {
4111 .driver = {
4112 .name = "qcom-llcc",
4113 .of_match_table = qcom_llcc_of_match,
4114 },
4115 .probe = qcom_llcc_probe,
4116 .remove = qcom_llcc_remove,
4117 };
4118 module_platform_driver(qcom_llcc_driver);
4119
4120 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller");
4121 MODULE_LICENSE("GPL v2");
4122