1 // SPDX-License-Identifier: GPL-2.0-only
2 /******************************************************************************
3  *
4  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5  *
6  * Portions of this file are derived from the ipw3945 project, as well
7  * as portions of the ieee80211 subsystem header files.
8  *
9  * Contact Information:
10  *  Intel Linux Wireless <[email protected]>
11  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
12  *
13  *****************************************************************************/
14 
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/pci.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/delay.h>
24 #include <linux/sched.h>
25 #include <linux/skbuff.h>
26 #include <linux/netdevice.h>
27 #include <linux/firmware.h>
28 #include <linux/etherdevice.h>
29 #include <linux/if_arp.h>
30 
31 #include <net/ieee80211_radiotap.h>
32 #include <net/mac80211.h>
33 
34 #include <asm/div64.h>
35 
36 #define DRV_NAME	"iwl3945"
37 
38 #include "commands.h"
39 #include "common.h"
40 #include "3945.h"
41 #include "iwl-spectrum.h"
42 
43 /*
44  * module name, copyright, version, etc.
45  */
46 
47 #define DRV_DESCRIPTION	\
48 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
49 
50 #ifdef CONFIG_IWLEGACY_DEBUG
51 #define VD "d"
52 #else
53 #define VD
54 #endif
55 
56 /*
57  * add "s" to indicate spectrum measurement included.
58  * we add it here to be consistent with previous releases in which
59  * this was configurable.
60  */
61 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
62 #define DRV_COPYRIGHT	"Copyright(c) 2003-2011 Intel Corporation"
63 #define DRV_AUTHOR     "<[email protected]>"
64 
65 MODULE_DESCRIPTION(DRV_DESCRIPTION);
66 MODULE_VERSION(DRV_VERSION);
67 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
68 MODULE_LICENSE("GPL");
69 
70  /* module parameters */
71 struct il_mod_params il3945_mod_params = {
72 	.sw_crypto = 1,
73 	.restart_fw = 1,
74 	.disable_hw_scan = 1,
75 	/* the rest are 0 by default */
76 };
77 
78 /**
79  * il3945_get_antenna_flags - Get antenna flags for RXON command
80  * @il: eeprom and antenna fields are used to determine antenna flags
81  *
82  * il->eeprom39  is used to determine if antenna AUX/MAIN are reversed
83  * il3945_mod_params.antenna specifies the antenna diversity mode:
84  *
85  * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
86  * IL_ANTENNA_MAIN      - Force MAIN antenna
87  * IL_ANTENNA_AUX       - Force AUX antenna
88  */
89 __le32
il3945_get_antenna_flags(const struct il_priv * il)90 il3945_get_antenna_flags(const struct il_priv *il)
91 {
92 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
93 
94 	switch (il3945_mod_params.antenna) {
95 	case IL_ANTENNA_DIVERSITY:
96 		return 0;
97 
98 	case IL_ANTENNA_MAIN:
99 		if (eeprom->antenna_switch_type)
100 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
101 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
102 
103 	case IL_ANTENNA_AUX:
104 		if (eeprom->antenna_switch_type)
105 			return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
106 		return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
107 	}
108 
109 	/* bad antenna selector value */
110 	IL_ERR("Bad antenna selector value (0x%x)\n",
111 	       il3945_mod_params.antenna);
112 
113 	return 0;		/* "diversity" is default if error */
114 }
115 
116 static int
il3945_set_ccmp_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)117 il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
118 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
119 {
120 	unsigned long flags;
121 	__le16 key_flags = 0;
122 	int ret;
123 
124 	key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
125 	key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
126 
127 	if (sta_id == il->hw_params.bcast_id)
128 		key_flags |= STA_KEY_MULTICAST_MSK;
129 
130 	keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
131 	keyconf->hw_key_idx = keyconf->keyidx;
132 	key_flags &= ~STA_KEY_FLG_INVALID;
133 
134 	spin_lock_irqsave(&il->sta_lock, flags);
135 	il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
136 	il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
137 	memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
138 
139 	memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
140 
141 	if ((il->stations[sta_id].sta.key.
142 	     key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
143 		il->stations[sta_id].sta.key.key_offset =
144 		    il_get_free_ucode_key_idx(il);
145 	/* else, we are overriding an existing key => no need to allocated room
146 	 * in uCode. */
147 
148 	WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
149 	     "no space for a new key");
150 
151 	il->stations[sta_id].sta.key.key_flags = key_flags;
152 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
153 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
154 
155 	D_INFO("hwcrypto: modify ucode station key info\n");
156 
157 	ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
158 
159 	spin_unlock_irqrestore(&il->sta_lock, flags);
160 
161 	return ret;
162 }
163 
164 static int
il3945_set_tkip_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)165 il3945_set_tkip_dynamic_key_info(struct il_priv *il,
166 				 struct ieee80211_key_conf *keyconf, u8 sta_id)
167 {
168 	return -EOPNOTSUPP;
169 }
170 
171 static int
il3945_set_wep_dynamic_key_info(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)172 il3945_set_wep_dynamic_key_info(struct il_priv *il,
173 				struct ieee80211_key_conf *keyconf, u8 sta_id)
174 {
175 	return -EOPNOTSUPP;
176 }
177 
178 static int
il3945_clear_sta_key_info(struct il_priv * il,u8 sta_id)179 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
180 {
181 	unsigned long flags;
182 	struct il_addsta_cmd sta_cmd;
183 
184 	spin_lock_irqsave(&il->sta_lock, flags);
185 	memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
186 	memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
187 	il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
188 	il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
189 	il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
190 	memcpy(&sta_cmd, &il->stations[sta_id].sta,
191 	       sizeof(struct il_addsta_cmd));
192 	spin_unlock_irqrestore(&il->sta_lock, flags);
193 
194 	D_INFO("hwcrypto: clear ucode station key info\n");
195 	return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
196 }
197 
198 static int
il3945_set_dynamic_key(struct il_priv * il,struct ieee80211_key_conf * keyconf,u8 sta_id)199 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
200 		       u8 sta_id)
201 {
202 	int ret = 0;
203 
204 	keyconf->hw_key_idx = HW_KEY_DYNAMIC;
205 
206 	switch (keyconf->cipher) {
207 	case WLAN_CIPHER_SUITE_CCMP:
208 		ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
209 		break;
210 	case WLAN_CIPHER_SUITE_TKIP:
211 		ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
212 		break;
213 	case WLAN_CIPHER_SUITE_WEP40:
214 	case WLAN_CIPHER_SUITE_WEP104:
215 		ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
216 		break;
217 	default:
218 		IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
219 		ret = -EINVAL;
220 	}
221 
222 	D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
223 	      keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
224 
225 	return ret;
226 }
227 
228 static int
il3945_remove_static_key(struct il_priv * il)229 il3945_remove_static_key(struct il_priv *il)
230 {
231 	return -EOPNOTSUPP;
232 }
233 
234 static int
il3945_set_static_key(struct il_priv * il,struct ieee80211_key_conf * key)235 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
236 {
237 	if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
238 	    key->cipher == WLAN_CIPHER_SUITE_WEP104)
239 		return -EOPNOTSUPP;
240 
241 	IL_ERR("Static key invalid: cipher %x\n", key->cipher);
242 	return -EINVAL;
243 }
244 
245 static void
il3945_clear_free_frames(struct il_priv * il)246 il3945_clear_free_frames(struct il_priv *il)
247 {
248 	struct list_head *element;
249 
250 	D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
251 
252 	while (!list_empty(&il->free_frames)) {
253 		element = il->free_frames.next;
254 		list_del(element);
255 		kfree(list_entry(element, struct il3945_frame, list));
256 		il->frames_count--;
257 	}
258 
259 	if (il->frames_count) {
260 		IL_WARN("%d frames still in use.  Did we lose one?\n",
261 			il->frames_count);
262 		il->frames_count = 0;
263 	}
264 }
265 
266 static struct il3945_frame *
il3945_get_free_frame(struct il_priv * il)267 il3945_get_free_frame(struct il_priv *il)
268 {
269 	struct il3945_frame *frame;
270 	struct list_head *element;
271 	if (list_empty(&il->free_frames)) {
272 		frame = kzalloc(sizeof(*frame), GFP_KERNEL);
273 		if (!frame) {
274 			IL_ERR("Could not allocate frame!\n");
275 			return NULL;
276 		}
277 
278 		il->frames_count++;
279 		return frame;
280 	}
281 
282 	element = il->free_frames.next;
283 	list_del(element);
284 	return list_entry(element, struct il3945_frame, list);
285 }
286 
287 static void
il3945_free_frame(struct il_priv * il,struct il3945_frame * frame)288 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
289 {
290 	memset(frame, 0, sizeof(*frame));
291 	list_add(&frame->list, &il->free_frames);
292 }
293 
294 unsigned int
il3945_fill_beacon_frame(struct il_priv * il,struct ieee80211_hdr * hdr,int left)295 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
296 			 int left)
297 {
298 
299 	if (!il_is_associated(il) || !il->beacon_skb)
300 		return 0;
301 
302 	if (il->beacon_skb->len > left)
303 		return 0;
304 
305 	memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
306 
307 	return il->beacon_skb->len;
308 }
309 
310 static int
il3945_send_beacon_cmd(struct il_priv * il)311 il3945_send_beacon_cmd(struct il_priv *il)
312 {
313 	struct il3945_frame *frame;
314 	unsigned int frame_size;
315 	int rc;
316 	u8 rate;
317 
318 	frame = il3945_get_free_frame(il);
319 
320 	if (!frame) {
321 		IL_ERR("Could not obtain free frame buffer for beacon "
322 		       "command.\n");
323 		return -ENOMEM;
324 	}
325 
326 	rate = il_get_lowest_plcp(il);
327 
328 	frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
329 
330 	rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
331 
332 	il3945_free_frame(il, frame);
333 
334 	return rc;
335 }
336 
337 static void
il3945_unset_hw_params(struct il_priv * il)338 il3945_unset_hw_params(struct il_priv *il)
339 {
340 	if (il->_3945.shared_virt)
341 		dma_free_coherent(&il->pci_dev->dev,
342 				  sizeof(struct il3945_shared),
343 				  il->_3945.shared_virt, il->_3945.shared_phys);
344 }
345 
346 static void
il3945_build_tx_cmd_hwcrypto(struct il_priv * il,struct ieee80211_tx_info * info,struct il_device_cmd * cmd,struct sk_buff * skb_frag,int sta_id)347 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
348 			     struct il_device_cmd *cmd,
349 			     struct sk_buff *skb_frag, int sta_id)
350 {
351 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
352 	struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
353 
354 	tx_cmd->sec_ctl = 0;
355 
356 	switch (keyinfo->cipher) {
357 	case WLAN_CIPHER_SUITE_CCMP:
358 		tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
359 		memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
360 		D_TX("tx_cmd with AES hwcrypto\n");
361 		break;
362 
363 	case WLAN_CIPHER_SUITE_TKIP:
364 		break;
365 
366 	case WLAN_CIPHER_SUITE_WEP104:
367 		tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
368 		fallthrough;
369 	case WLAN_CIPHER_SUITE_WEP40:
370 		tx_cmd->sec_ctl |=
371 		    TX_CMD_SEC_WEP | (info->control.hw_key->
372 				      hw_key_idx & TX_CMD_SEC_MSK) <<
373 		    TX_CMD_SEC_SHIFT;
374 
375 		memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
376 
377 		D_TX("Configuring packet for WEP encryption " "with key %d\n",
378 		     info->control.hw_key->hw_key_idx);
379 		break;
380 
381 	default:
382 		IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
383 		break;
384 	}
385 }
386 
387 /*
388  * handle build C_TX command notification.
389  */
390 static void
il3945_build_tx_cmd_basic(struct il_priv * il,struct il_device_cmd * cmd,struct ieee80211_tx_info * info,struct ieee80211_hdr * hdr,u8 std_id)391 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
392 			  struct ieee80211_tx_info *info,
393 			  struct ieee80211_hdr *hdr, u8 std_id)
394 {
395 	struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
396 	__le32 tx_flags = tx_cmd->tx_flags;
397 	__le16 fc = hdr->frame_control;
398 
399 	tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
400 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
401 		tx_flags |= TX_CMD_FLG_ACK_MSK;
402 		if (ieee80211_is_mgmt(fc))
403 			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
404 		if (ieee80211_is_probe_resp(fc) &&
405 		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
406 			tx_flags |= TX_CMD_FLG_TSF_MSK;
407 	} else {
408 		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
409 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
410 	}
411 
412 	tx_cmd->sta_id = std_id;
413 	if (ieee80211_has_morefrags(fc))
414 		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
415 
416 	if (ieee80211_is_data_qos(fc)) {
417 		u8 *qc = ieee80211_get_qos_ctl(hdr);
418 		tx_cmd->tid_tspec = qc[0] & 0xf;
419 		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
420 	} else {
421 		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 	}
423 
424 	il_tx_cmd_protection(il, info, fc, &tx_flags);
425 
426 	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
427 	if (ieee80211_is_mgmt(fc)) {
428 		if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
429 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
430 		else
431 			tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
432 	} else {
433 		tx_cmd->timeout.pm_frame_timeout = 0;
434 	}
435 
436 	tx_cmd->driver_txop = 0;
437 	tx_cmd->tx_flags = tx_flags;
438 	tx_cmd->next_frame_len = 0;
439 }
440 
441 /*
442  * start C_TX command process
443  */
444 static int
il3945_tx_skb(struct il_priv * il,struct ieee80211_sta * sta,struct sk_buff * skb)445 il3945_tx_skb(struct il_priv *il,
446 	      struct ieee80211_sta *sta,
447 	      struct sk_buff *skb)
448 {
449 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
450 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
451 	struct il3945_tx_cmd *tx_cmd;
452 	struct il_tx_queue *txq = NULL;
453 	struct il_queue *q = NULL;
454 	struct il_device_cmd *out_cmd;
455 	struct il_cmd_meta *out_meta;
456 	dma_addr_t phys_addr;
457 	dma_addr_t txcmd_phys;
458 	int txq_id = skb_get_queue_mapping(skb);
459 	u16 len, idx, hdr_len;
460 	u16 firstlen, secondlen;
461 	u8 sta_id;
462 	u8 tid = 0;
463 	__le16 fc;
464 	u8 wait_write_ptr = 0;
465 	unsigned long flags;
466 
467 	spin_lock_irqsave(&il->lock, flags);
468 	if (il_is_rfkill(il)) {
469 		D_DROP("Dropping - RF KILL\n");
470 		goto drop_unlock;
471 	}
472 
473 	if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
474 	    IL_INVALID_RATE) {
475 		IL_ERR("ERROR: No TX rate available.\n");
476 		goto drop_unlock;
477 	}
478 
479 	fc = hdr->frame_control;
480 
481 #ifdef CONFIG_IWLEGACY_DEBUG
482 	if (ieee80211_is_auth(fc))
483 		D_TX("Sending AUTH frame\n");
484 	else if (ieee80211_is_assoc_req(fc))
485 		D_TX("Sending ASSOC frame\n");
486 	else if (ieee80211_is_reassoc_req(fc))
487 		D_TX("Sending REASSOC frame\n");
488 #endif
489 
490 	spin_unlock_irqrestore(&il->lock, flags);
491 
492 	hdr_len = ieee80211_hdrlen(fc);
493 
494 	/* Find idx into station table for destination station */
495 	sta_id = il_sta_id_or_broadcast(il, sta);
496 	if (sta_id == IL_INVALID_STATION) {
497 		D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
498 		goto drop;
499 	}
500 
501 	D_RATE("station Id %d\n", sta_id);
502 
503 	if (ieee80211_is_data_qos(fc)) {
504 		u8 *qc = ieee80211_get_qos_ctl(hdr);
505 		tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
506 		if (unlikely(tid >= MAX_TID_COUNT))
507 			goto drop;
508 	}
509 
510 	/* Descriptor for chosen Tx queue */
511 	txq = &il->txq[txq_id];
512 	q = &txq->q;
513 
514 	if ((il_queue_space(q) < q->high_mark))
515 		goto drop;
516 
517 	spin_lock_irqsave(&il->lock, flags);
518 
519 	idx = il_get_cmd_idx(q, q->write_ptr, 0);
520 
521 	txq->skbs[q->write_ptr] = skb;
522 
523 	/* Init first empty entry in queue's array of Tx/cmd buffers */
524 	out_cmd = txq->cmd[idx];
525 	out_meta = &txq->meta[idx];
526 	tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
527 	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
528 	memset(tx_cmd, 0, sizeof(*tx_cmd));
529 
530 	/*
531 	 * Set up the Tx-command (not MAC!) header.
532 	 * Store the chosen Tx queue and TFD idx within the sequence field;
533 	 * after Tx, uCode's Tx response will return this value so driver can
534 	 * locate the frame within the tx queue and do post-tx processing.
535 	 */
536 	out_cmd->hdr.cmd = C_TX;
537 	out_cmd->hdr.sequence =
538 	    cpu_to_le16((u16)
539 			(QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
540 
541 	/* Copy MAC header from skb into command buffer */
542 	memcpy(tx_cmd->hdr, hdr, hdr_len);
543 
544 	if (info->control.hw_key)
545 		il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
546 
547 	/* TODO need this for burst mode later on */
548 	il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
549 
550 	il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
551 
552 	/* Total # bytes to be transmitted */
553 	tx_cmd->len = cpu_to_le16((u16) skb->len);
554 
555 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
556 	tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
557 
558 	/*
559 	 * Use the first empty entry in this queue's command buffer array
560 	 * to contain the Tx command and MAC header concatenated together
561 	 * (payload data will be in another buffer).
562 	 * Size of this varies, due to varying MAC header length.
563 	 * If end is not dword aligned, we'll have 2 extra bytes at the end
564 	 * of the MAC header (device reads on dword boundaries).
565 	 * We'll tell device about this padding later.
566 	 */
567 	len =
568 	    sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
569 	    hdr_len;
570 	firstlen = (len + 3) & ~3;
571 
572 	/* Physical address of this Tx command's header (not MAC header!),
573 	 * within command buffer array. */
574 	txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen,
575 				    DMA_TO_DEVICE);
576 	if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys)))
577 		goto drop_unlock;
578 
579 	/* Set up TFD's 2nd entry to point directly to remainder of skb,
580 	 * if any (802.11 null frames have no payload). */
581 	secondlen = skb->len - hdr_len;
582 	if (secondlen > 0) {
583 		phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len,
584 					   secondlen, DMA_TO_DEVICE);
585 		if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr)))
586 			goto drop_unlock;
587 	}
588 
589 	/* Add buffer containing Tx command and MAC(!) header to TFD's
590 	 * first entry */
591 	il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
592 	dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
593 	dma_unmap_len_set(out_meta, len, firstlen);
594 	if (secondlen > 0)
595 		il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
596 					       U32_PAD(secondlen));
597 
598 	if (!ieee80211_has_morefrags(hdr->frame_control)) {
599 		txq->need_update = 1;
600 	} else {
601 		wait_write_ptr = 1;
602 		txq->need_update = 0;
603 	}
604 
605 	il_update_stats(il, true, fc, skb->len);
606 
607 	D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
608 	D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
609 	il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
610 	il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
611 			  ieee80211_hdrlen(fc));
612 
613 	/* Tell device the write idx *just past* this latest filled TFD */
614 	q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
615 	il_txq_update_write_ptr(il, txq);
616 	spin_unlock_irqrestore(&il->lock, flags);
617 
618 	if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
619 		if (wait_write_ptr) {
620 			spin_lock_irqsave(&il->lock, flags);
621 			txq->need_update = 1;
622 			il_txq_update_write_ptr(il, txq);
623 			spin_unlock_irqrestore(&il->lock, flags);
624 		}
625 
626 		il_stop_queue(il, txq);
627 	}
628 
629 	return 0;
630 
631 drop_unlock:
632 	spin_unlock_irqrestore(&il->lock, flags);
633 drop:
634 	return -1;
635 }
636 
637 static int
il3945_get_measurement(struct il_priv * il,struct ieee80211_measurement_params * params,u8 type)638 il3945_get_measurement(struct il_priv *il,
639 		       struct ieee80211_measurement_params *params, u8 type)
640 {
641 	struct il_spectrum_cmd spectrum;
642 	struct il_rx_pkt *pkt;
643 	struct il_host_cmd cmd = {
644 		.id = C_SPECTRUM_MEASUREMENT,
645 		.data = (void *)&spectrum,
646 		.flags = CMD_WANT_SKB,
647 	};
648 	u32 add_time = le64_to_cpu(params->start_time);
649 	int rc;
650 	int spectrum_resp_status;
651 	int duration = le16_to_cpu(params->duration);
652 
653 	if (il_is_associated(il))
654 		add_time =
655 		    il_usecs_to_beacons(il,
656 					le64_to_cpu(params->start_time) -
657 					il->_3945.last_tsf,
658 					le16_to_cpu(il->timing.beacon_interval));
659 
660 	memset(&spectrum, 0, sizeof(spectrum));
661 
662 	spectrum.channel_count = cpu_to_le16(1);
663 	spectrum.flags =
664 	    RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
665 	spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
666 	cmd.len = sizeof(spectrum);
667 	spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
668 
669 	if (il_is_associated(il))
670 		spectrum.start_time =
671 		    il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
672 				       le16_to_cpu(il->timing.beacon_interval));
673 	else
674 		spectrum.start_time = 0;
675 
676 	spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
677 	spectrum.channels[0].channel = params->channel;
678 	spectrum.channels[0].type = type;
679 	if (il->active.flags & RXON_FLG_BAND_24G_MSK)
680 		spectrum.flags |=
681 		    RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
682 		    RXON_FLG_TGG_PROTECT_MSK;
683 
684 	rc = il_send_cmd_sync(il, &cmd);
685 	if (rc)
686 		return rc;
687 
688 	pkt = (struct il_rx_pkt *)cmd.reply_page;
689 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
690 		IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
691 		rc = -EIO;
692 	}
693 
694 	spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
695 	switch (spectrum_resp_status) {
696 	case 0:		/* Command will be handled */
697 		if (pkt->u.spectrum.id != 0xff) {
698 			D_INFO("Replaced existing measurement: %d\n",
699 			       pkt->u.spectrum.id);
700 			il->measurement_status &= ~MEASUREMENT_READY;
701 		}
702 		il->measurement_status |= MEASUREMENT_ACTIVE;
703 		rc = 0;
704 		break;
705 
706 	case 1:		/* Command will not be handled */
707 		rc = -EAGAIN;
708 		break;
709 	}
710 
711 	il_free_pages(il, cmd.reply_page);
712 
713 	return rc;
714 }
715 
716 static void
il3945_hdl_alive(struct il_priv * il,struct il_rx_buf * rxb)717 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
718 {
719 	struct il_rx_pkt *pkt = rxb_addr(rxb);
720 	struct il_alive_resp *palive;
721 	struct delayed_work *pwork;
722 
723 	palive = &pkt->u.alive_frame;
724 
725 	D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
726 	       palive->is_valid, palive->ver_type, palive->ver_subtype);
727 
728 	if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
729 		D_INFO("Initialization Alive received.\n");
730 		memcpy(&il->card_alive_init, &pkt->u.alive_frame,
731 		       sizeof(struct il_alive_resp));
732 		pwork = &il->init_alive_start;
733 	} else {
734 		D_INFO("Runtime Alive received.\n");
735 		memcpy(&il->card_alive, &pkt->u.alive_frame,
736 		       sizeof(struct il_alive_resp));
737 		pwork = &il->alive_start;
738 		il3945_disable_events(il);
739 	}
740 
741 	/* We delay the ALIVE response by 5ms to
742 	 * give the HW RF Kill time to activate... */
743 	if (palive->is_valid == UCODE_VALID_OK)
744 		queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
745 	else
746 		IL_WARN("uCode did not respond OK.\n");
747 }
748 
749 static void
il3945_hdl_add_sta(struct il_priv * il,struct il_rx_buf * rxb)750 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
751 {
752 	struct il_rx_pkt *pkt = rxb_addr(rxb);
753 
754 	D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
755 }
756 
757 static void
il3945_hdl_beacon(struct il_priv * il,struct il_rx_buf * rxb)758 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
759 {
760 	struct il_rx_pkt *pkt = rxb_addr(rxb);
761 	struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
762 #ifdef CONFIG_IWLEGACY_DEBUG
763 	u8 rate = beacon->beacon_notify_hdr.rate;
764 
765 	D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
766 	     le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
767 	     beacon->beacon_notify_hdr.failure_frame,
768 	     le32_to_cpu(beacon->ibss_mgr_status),
769 	     le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
770 #endif
771 
772 	il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
773 
774 }
775 
776 /* Handle notification from uCode that card's power state is changing
777  * due to software, hardware, or critical temperature RFKILL */
778 static void
il3945_hdl_card_state(struct il_priv * il,struct il_rx_buf * rxb)779 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
780 {
781 	struct il_rx_pkt *pkt = rxb_addr(rxb);
782 	u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
783 	unsigned long status = il->status;
784 
785 	IL_WARN("Card state received: HW:%s SW:%s\n",
786 		(flags & HW_CARD_DISABLED) ? "Kill" : "On",
787 		(flags & SW_CARD_DISABLED) ? "Kill" : "On");
788 
789 	_il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
790 
791 	if (flags & HW_CARD_DISABLED)
792 		set_bit(S_RFKILL, &il->status);
793 	else
794 		clear_bit(S_RFKILL, &il->status);
795 
796 	il_scan_cancel(il);
797 
798 	if ((test_bit(S_RFKILL, &status) !=
799 	     test_bit(S_RFKILL, &il->status)))
800 		wiphy_rfkill_set_hw_state(il->hw->wiphy,
801 					  test_bit(S_RFKILL, &il->status));
802 	else
803 		wake_up(&il->wait_command_queue);
804 }
805 
806 /*
807  * il3945_setup_handlers - Initialize Rx handler callbacks
808  *
809  * Setup the RX handlers for each of the reply types sent from the uCode
810  * to the host.
811  *
812  * This function chains into the hardware specific files for them to setup
813  * any hardware specific handlers as well.
814  */
815 static void
il3945_setup_handlers(struct il_priv * il)816 il3945_setup_handlers(struct il_priv *il)
817 {
818 	il->handlers[N_ALIVE] = il3945_hdl_alive;
819 	il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
820 	il->handlers[N_ERROR] = il_hdl_error;
821 	il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
822 	il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
823 	il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
824 	il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
825 	il->handlers[N_BEACON] = il3945_hdl_beacon;
826 
827 	/*
828 	 * The same handler is used for both the REPLY to a discrete
829 	 * stats request from the host as well as for the periodic
830 	 * stats notifications (after received beacons) from the uCode.
831 	 */
832 	il->handlers[C_STATS] = il3945_hdl_c_stats;
833 	il->handlers[N_STATS] = il3945_hdl_stats;
834 
835 	il_setup_rx_scan_handlers(il);
836 	il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
837 
838 	/* Set up hardware specific Rx handlers */
839 	il3945_hw_handler_setup(il);
840 }
841 
842 /************************** RX-FUNCTIONS ****************************/
843 /*
844  * Rx theory of operation
845  *
846  * The host allocates 32 DMA target addresses and passes the host address
847  * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
848  * 0 to 31
849  *
850  * Rx Queue Indexes
851  * The host/firmware share two idx registers for managing the Rx buffers.
852  *
853  * The READ idx maps to the first position that the firmware may be writing
854  * to -- the driver can read up to (but not including) this position and get
855  * good data.
856  * The READ idx is managed by the firmware once the card is enabled.
857  *
858  * The WRITE idx maps to the last position the driver has read from -- the
859  * position preceding WRITE is the last slot the firmware can place a packet.
860  *
861  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
862  * WRITE = READ.
863  *
864  * During initialization, the host sets up the READ queue position to the first
865  * IDX position, and WRITE to the last (READ - 1 wrapped)
866  *
867  * When the firmware places a packet in a buffer, it will advance the READ idx
868  * and fire the RX interrupt.  The driver can then query the READ idx and
869  * process as many packets as possible, moving the WRITE idx forward as it
870  * resets the Rx queue buffers with new memory.
871  *
872  * The management in the driver is as follows:
873  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
874  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
875  *   to replenish the iwl->rxq->rx_free.
876  * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
877  *   iwl->rxq is replenished and the READ IDX is updated (updating the
878  *   'processed' and 'read' driver idxes as well)
879  * + A received packet is processed and handed to the kernel network stack,
880  *   detached from the iwl->rxq.  The driver 'processed' idx is updated.
881  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
882  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
883  *   IDX is not incremented and iwl->status(RX_STALLED) is set.  If there
884  *   were enough free buffers and RX_STALLED is set it is cleared.
885  *
886  *
887  * Driver sequence:
888  *
889  * il3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
890  *                            il3945_rx_queue_restock
891  * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
892  *                            queue, updates firmware pointers, and updates
893  *                            the WRITE idx.  If insufficient rx_free buffers
894  *                            are available, schedules il3945_rx_replenish
895  *
896  * -- enable interrupts --
897  * ISR - il3945_rx()         Detach il_rx_bufs from pool up to the
898  *                            READ IDX, detaching the SKB from the pool.
899  *                            Moves the packet buffer from queue to rx_used.
900  *                            Calls il3945_rx_queue_restock to refill any empty
901  *                            slots.
902  * ...
903  *
904  */
905 
906 /*
907  * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
908  */
909 static inline __le32
il3945_dma_addr2rbd_ptr(struct il_priv * il,dma_addr_t dma_addr)910 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
911 {
912 	return cpu_to_le32((u32) dma_addr);
913 }
914 
915 /*
916  * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
917  *
918  * If there are slots in the RX queue that need to be restocked,
919  * and we have free pre-allocated buffers, fill the ranks as much
920  * as we can, pulling from rx_free.
921  *
922  * This moves the 'write' idx forward to catch up with 'processed', and
923  * also updates the memory address in the firmware to reference the new
924  * target buffer.
925  */
926 static void
il3945_rx_queue_restock(struct il_priv * il)927 il3945_rx_queue_restock(struct il_priv *il)
928 {
929 	struct il_rx_queue *rxq = &il->rxq;
930 	struct list_head *element;
931 	struct il_rx_buf *rxb;
932 	unsigned long flags;
933 
934 	spin_lock_irqsave(&rxq->lock, flags);
935 	while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
936 		/* Get next free Rx buffer, remove from free list */
937 		element = rxq->rx_free.next;
938 		rxb = list_entry(element, struct il_rx_buf, list);
939 		list_del(element);
940 
941 		/* Point to Rx buffer via next RBD in circular buffer */
942 		rxq->bd[rxq->write] =
943 		    il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
944 		rxq->queue[rxq->write] = rxb;
945 		rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
946 		rxq->free_count--;
947 	}
948 	spin_unlock_irqrestore(&rxq->lock, flags);
949 	/* If the pre-allocated buffer pool is dropping low, schedule to
950 	 * refill it */
951 	if (rxq->free_count <= RX_LOW_WATERMARK)
952 		queue_work(il->workqueue, &il->rx_replenish);
953 
954 	/* If we've added more space for the firmware to place data, tell it.
955 	 * Increment device's write pointer in multiples of 8. */
956 	if (rxq->write_actual != (rxq->write & ~0x7) ||
957 	    abs(rxq->write - rxq->read) > 7) {
958 		spin_lock_irqsave(&rxq->lock, flags);
959 		rxq->need_update = 1;
960 		spin_unlock_irqrestore(&rxq->lock, flags);
961 		il_rx_queue_update_write_ptr(il, rxq);
962 	}
963 }
964 
965 /*
966  * il3945_rx_replenish - Move all used packet from rx_used to rx_free
967  *
968  * When moving to rx_free an SKB is allocated for the slot.
969  *
970  * Also restock the Rx queue via il3945_rx_queue_restock.
971  * This is called as a scheduled work item (except for during initialization)
972  */
973 static void
il3945_rx_allocate(struct il_priv * il,gfp_t priority)974 il3945_rx_allocate(struct il_priv *il, gfp_t priority)
975 {
976 	struct il_rx_queue *rxq = &il->rxq;
977 	struct list_head *element;
978 	struct il_rx_buf *rxb;
979 	struct page *page;
980 	dma_addr_t page_dma;
981 	unsigned long flags;
982 	gfp_t gfp_mask = priority;
983 
984 	while (1) {
985 		spin_lock_irqsave(&rxq->lock, flags);
986 		if (list_empty(&rxq->rx_used)) {
987 			spin_unlock_irqrestore(&rxq->lock, flags);
988 			return;
989 		}
990 		spin_unlock_irqrestore(&rxq->lock, flags);
991 
992 		if (rxq->free_count > RX_LOW_WATERMARK)
993 			gfp_mask |= __GFP_NOWARN;
994 
995 		if (il->hw_params.rx_page_order > 0)
996 			gfp_mask |= __GFP_COMP;
997 
998 		/* Alloc a new receive buffer */
999 		page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1000 		if (!page) {
1001 			if (net_ratelimit())
1002 				D_INFO("Failed to allocate SKB buffer.\n");
1003 			if (rxq->free_count <= RX_LOW_WATERMARK &&
1004 			    net_ratelimit())
1005 				IL_ERR("Failed to allocate SKB buffer with %0x."
1006 				       "Only %u free buffers remaining.\n",
1007 				       priority, rxq->free_count);
1008 			/* We don't reschedule replenish work here -- we will
1009 			 * call the restock method and if it still needs
1010 			 * more buffers it will schedule replenish */
1011 			break;
1012 		}
1013 
1014 		/* Get physical address of RB/SKB */
1015 		page_dma =
1016 		    dma_map_page(&il->pci_dev->dev, page, 0,
1017 				 PAGE_SIZE << il->hw_params.rx_page_order,
1018 				 DMA_FROM_DEVICE);
1019 
1020 		if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) {
1021 			__free_pages(page, il->hw_params.rx_page_order);
1022 			break;
1023 		}
1024 
1025 		spin_lock_irqsave(&rxq->lock, flags);
1026 
1027 		if (list_empty(&rxq->rx_used)) {
1028 			spin_unlock_irqrestore(&rxq->lock, flags);
1029 			dma_unmap_page(&il->pci_dev->dev, page_dma,
1030 				       PAGE_SIZE << il->hw_params.rx_page_order,
1031 				       DMA_FROM_DEVICE);
1032 			__free_pages(page, il->hw_params.rx_page_order);
1033 			return;
1034 		}
1035 
1036 		element = rxq->rx_used.next;
1037 		rxb = list_entry(element, struct il_rx_buf, list);
1038 		list_del(element);
1039 
1040 		rxb->page = page;
1041 		rxb->page_dma = page_dma;
1042 		list_add_tail(&rxb->list, &rxq->rx_free);
1043 		rxq->free_count++;
1044 		il->alloc_rxb_page++;
1045 
1046 		spin_unlock_irqrestore(&rxq->lock, flags);
1047 	}
1048 }
1049 
1050 void
il3945_rx_queue_reset(struct il_priv * il,struct il_rx_queue * rxq)1051 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1052 {
1053 	unsigned long flags;
1054 	int i;
1055 	spin_lock_irqsave(&rxq->lock, flags);
1056 	INIT_LIST_HEAD(&rxq->rx_free);
1057 	INIT_LIST_HEAD(&rxq->rx_used);
1058 	/* Fill the rx_used queue with _all_ of the Rx buffers */
1059 	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1060 		/* In the reset function, these buffers may have been allocated
1061 		 * to an SKB, so we need to unmap and free potential storage */
1062 		if (rxq->pool[i].page != NULL) {
1063 			dma_unmap_page(&il->pci_dev->dev,
1064 				       rxq->pool[i].page_dma,
1065 				       PAGE_SIZE << il->hw_params.rx_page_order,
1066 				       DMA_FROM_DEVICE);
1067 			__il_free_pages(il, rxq->pool[i].page);
1068 			rxq->pool[i].page = NULL;
1069 		}
1070 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1071 	}
1072 
1073 	/* Set us so that we have processed and used all buffers, but have
1074 	 * not restocked the Rx queue with fresh buffers */
1075 	rxq->read = rxq->write = 0;
1076 	rxq->write_actual = 0;
1077 	rxq->free_count = 0;
1078 	spin_unlock_irqrestore(&rxq->lock, flags);
1079 }
1080 
1081 void
il3945_rx_replenish(void * data)1082 il3945_rx_replenish(void *data)
1083 {
1084 	struct il_priv *il = data;
1085 	unsigned long flags;
1086 
1087 	il3945_rx_allocate(il, GFP_KERNEL);
1088 
1089 	spin_lock_irqsave(&il->lock, flags);
1090 	il3945_rx_queue_restock(il);
1091 	spin_unlock_irqrestore(&il->lock, flags);
1092 }
1093 
1094 static void
il3945_rx_replenish_now(struct il_priv * il)1095 il3945_rx_replenish_now(struct il_priv *il)
1096 {
1097 	il3945_rx_allocate(il, GFP_ATOMIC);
1098 
1099 	il3945_rx_queue_restock(il);
1100 }
1101 
1102 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1103  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1104  * This free routine walks the list of POOL entries and if SKB is set to
1105  * non NULL it is unmapped and freed
1106  */
1107 static void
il3945_rx_queue_free(struct il_priv * il,struct il_rx_queue * rxq)1108 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1109 {
1110 	int i;
1111 	for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1112 		if (rxq->pool[i].page != NULL) {
1113 			dma_unmap_page(&il->pci_dev->dev,
1114 				       rxq->pool[i].page_dma,
1115 				       PAGE_SIZE << il->hw_params.rx_page_order,
1116 				       DMA_FROM_DEVICE);
1117 			__il_free_pages(il, rxq->pool[i].page);
1118 			rxq->pool[i].page = NULL;
1119 		}
1120 	}
1121 
1122 	dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1123 			  rxq->bd_dma);
1124 	dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1125 			  rxq->rb_stts, rxq->rb_stts_dma);
1126 	rxq->bd = NULL;
1127 	rxq->rb_stts = NULL;
1128 }
1129 
1130 /*
1131  * il3945_rx_handle - Main entry function for receiving responses from uCode
1132  *
1133  * Uses the il->handlers callback function array to invoke
1134  * the appropriate handlers, including command responses,
1135  * frame-received notifications, and other notifications.
1136  */
1137 static void
il3945_rx_handle(struct il_priv * il)1138 il3945_rx_handle(struct il_priv *il)
1139 {
1140 	struct il_rx_buf *rxb;
1141 	struct il_rx_pkt *pkt;
1142 	struct il_rx_queue *rxq = &il->rxq;
1143 	u32 r, i;
1144 	int reclaim;
1145 	unsigned long flags;
1146 	u8 fill_rx = 0;
1147 	u32 count = 8;
1148 	int total_empty = 0;
1149 
1150 	/* uCode's read idx (stored in shared DRAM) indicates the last Rx
1151 	 * buffer that the driver may process (last buffer filled by ucode). */
1152 	r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1153 	i = rxq->read;
1154 
1155 	/* calculate total frames need to be restock after handling RX */
1156 	total_empty = r - rxq->write_actual;
1157 	if (total_empty < 0)
1158 		total_empty += RX_QUEUE_SIZE;
1159 
1160 	if (total_empty > (RX_QUEUE_SIZE / 2))
1161 		fill_rx = 1;
1162 	/* Rx interrupt, but nothing sent from uCode */
1163 	if (i == r)
1164 		D_RX("r = %d, i = %d\n", r, i);
1165 
1166 	while (i != r) {
1167 		rxb = rxq->queue[i];
1168 
1169 		/* If an RXB doesn't have a Rx queue slot associated with it,
1170 		 * then a bug has been introduced in the queue refilling
1171 		 * routines -- catch it here */
1172 		BUG_ON(rxb == NULL);
1173 
1174 		rxq->queue[i] = NULL;
1175 
1176 		dma_unmap_page(&il->pci_dev->dev, rxb->page_dma,
1177 			       PAGE_SIZE << il->hw_params.rx_page_order,
1178 			       DMA_FROM_DEVICE);
1179 		pkt = rxb_addr(rxb);
1180 		reclaim = il_need_reclaim(il, pkt);
1181 
1182 		/* Based on type of command response or notification,
1183 		 *   handle those that need handling via function in
1184 		 *   handlers table.  See il3945_setup_handlers() */
1185 		if (il->handlers[pkt->hdr.cmd]) {
1186 			D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1187 			     il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1188 			il->isr_stats.handlers[pkt->hdr.cmd]++;
1189 			il->handlers[pkt->hdr.cmd] (il, rxb);
1190 		} else {
1191 			/* No handling needed */
1192 			D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1193 			     i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1194 		}
1195 
1196 		/*
1197 		 * XXX: After here, we should always check rxb->page
1198 		 * against NULL before touching it or its virtual
1199 		 * memory (pkt). Because some handler might have
1200 		 * already taken or freed the pages.
1201 		 */
1202 
1203 		if (reclaim) {
1204 			/* Invoke any callbacks, transfer the buffer to caller,
1205 			 * and fire off the (possibly) blocking il_send_cmd()
1206 			 * as we reclaim the driver command queue */
1207 			if (rxb->page)
1208 				il_tx_cmd_complete(il, rxb);
1209 			else
1210 				IL_WARN("Claim null rxb?\n");
1211 		}
1212 
1213 		/* Reuse the page if possible. For notification packets and
1214 		 * SKBs that fail to Rx correctly, add them back into the
1215 		 * rx_free list for reuse later. */
1216 		spin_lock_irqsave(&rxq->lock, flags);
1217 		if (rxb->page != NULL) {
1218 			rxb->page_dma =
1219 			    dma_map_page(&il->pci_dev->dev, rxb->page, 0,
1220 					 PAGE_SIZE << il->hw_params.rx_page_order,
1221 					 DMA_FROM_DEVICE);
1222 			if (unlikely(dma_mapping_error(&il->pci_dev->dev,
1223 						       rxb->page_dma))) {
1224 				__il_free_pages(il, rxb->page);
1225 				rxb->page = NULL;
1226 				list_add_tail(&rxb->list, &rxq->rx_used);
1227 			} else {
1228 				list_add_tail(&rxb->list, &rxq->rx_free);
1229 				rxq->free_count++;
1230 			}
1231 		} else
1232 			list_add_tail(&rxb->list, &rxq->rx_used);
1233 
1234 		spin_unlock_irqrestore(&rxq->lock, flags);
1235 
1236 		i = (i + 1) & RX_QUEUE_MASK;
1237 		/* If there are a lot of unused frames,
1238 		 * restock the Rx queue so ucode won't assert. */
1239 		if (fill_rx) {
1240 			count++;
1241 			if (count >= 8) {
1242 				rxq->read = i;
1243 				il3945_rx_replenish_now(il);
1244 				count = 0;
1245 			}
1246 		}
1247 	}
1248 
1249 	/* Backtrack one entry */
1250 	rxq->read = i;
1251 	if (fill_rx)
1252 		il3945_rx_replenish_now(il);
1253 	else
1254 		il3945_rx_queue_restock(il);
1255 }
1256 
1257 /* call this function to flush any scheduled tasklet */
1258 static inline void
il3945_synchronize_irq(struct il_priv * il)1259 il3945_synchronize_irq(struct il_priv *il)
1260 {
1261 	/* wait to make sure we flush pending tasklet */
1262 	synchronize_irq(il->pci_dev->irq);
1263 	tasklet_kill(&il->irq_tasklet);
1264 }
1265 
1266 static const char *
il3945_desc_lookup(int i)1267 il3945_desc_lookup(int i)
1268 {
1269 	switch (i) {
1270 	case 1:
1271 		return "FAIL";
1272 	case 2:
1273 		return "BAD_PARAM";
1274 	case 3:
1275 		return "BAD_CHECKSUM";
1276 	case 4:
1277 		return "NMI_INTERRUPT";
1278 	case 5:
1279 		return "SYSASSERT";
1280 	case 6:
1281 		return "FATAL_ERROR";
1282 	}
1283 
1284 	return "UNKNOWN";
1285 }
1286 
1287 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1288 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1289 
1290 void
il3945_dump_nic_error_log(struct il_priv * il)1291 il3945_dump_nic_error_log(struct il_priv *il)
1292 {
1293 	u32 i;
1294 	u32 desc, time, count, base, data1;
1295 	u32 blink1, blink2, ilink1, ilink2;
1296 
1297 	base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1298 
1299 	if (!il3945_hw_valid_rtc_data_addr(base)) {
1300 		IL_ERR("Not valid error log pointer 0x%08X\n", base);
1301 		return;
1302 	}
1303 
1304 	count = il_read_targ_mem(il, base);
1305 
1306 	if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1307 		IL_ERR("Start IWL Error Log Dump:\n");
1308 		IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1309 	}
1310 
1311 	IL_ERR("Desc       Time       asrtPC  blink2 "
1312 	       "ilink1  nmiPC   Line\n");
1313 	for (i = ERROR_START_OFFSET;
1314 	     i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1315 	     i += ERROR_ELEM_SIZE) {
1316 		desc = il_read_targ_mem(il, base + i);
1317 		time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1318 		blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1319 		blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1320 		ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1321 		ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1322 		data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1323 
1324 		IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1325 		       il3945_desc_lookup(desc), desc, time, blink1, blink2,
1326 		       ilink1, ilink2, data1);
1327 	}
1328 }
1329 
1330 static void
il3945_irq_tasklet(struct tasklet_struct * t)1331 il3945_irq_tasklet(struct tasklet_struct *t)
1332 {
1333 	struct il_priv *il = from_tasklet(il, t, irq_tasklet);
1334 	u32 inta, handled = 0;
1335 	u32 inta_fh;
1336 	unsigned long flags;
1337 #ifdef CONFIG_IWLEGACY_DEBUG
1338 	u32 inta_mask;
1339 #endif
1340 
1341 	spin_lock_irqsave(&il->lock, flags);
1342 
1343 	/* Ack/clear/reset pending uCode interrupts.
1344 	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1345 	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1346 	inta = _il_rd(il, CSR_INT);
1347 	_il_wr(il, CSR_INT, inta);
1348 
1349 	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
1350 	 * Any new interrupts that happen after this, either while we're
1351 	 * in this tasklet, or later, will show up in next ISR/tasklet. */
1352 	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1353 	_il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1354 
1355 #ifdef CONFIG_IWLEGACY_DEBUG
1356 	if (il_get_debug_level(il) & IL_DL_ISR) {
1357 		/* just for debug */
1358 		inta_mask = _il_rd(il, CSR_INT_MASK);
1359 		D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1360 		      inta_mask, inta_fh);
1361 	}
1362 #endif
1363 
1364 	spin_unlock_irqrestore(&il->lock, flags);
1365 
1366 	/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1367 	 * atomic, make sure that inta covers all the interrupts that
1368 	 * we've discovered, even if FH interrupt came in just after
1369 	 * reading CSR_INT. */
1370 	if (inta_fh & CSR39_FH_INT_RX_MASK)
1371 		inta |= CSR_INT_BIT_FH_RX;
1372 	if (inta_fh & CSR39_FH_INT_TX_MASK)
1373 		inta |= CSR_INT_BIT_FH_TX;
1374 
1375 	/* Now service all interrupt bits discovered above. */
1376 	if (inta & CSR_INT_BIT_HW_ERR) {
1377 		IL_ERR("Hardware error detected.  Restarting.\n");
1378 
1379 		/* Tell the device to stop sending interrupts */
1380 		il_disable_interrupts(il);
1381 
1382 		il->isr_stats.hw++;
1383 		il_irq_handle_error(il);
1384 
1385 		handled |= CSR_INT_BIT_HW_ERR;
1386 
1387 		return;
1388 	}
1389 #ifdef CONFIG_IWLEGACY_DEBUG
1390 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
1391 		/* NIC fires this, but we don't use it, redundant with WAKEUP */
1392 		if (inta & CSR_INT_BIT_SCD) {
1393 			D_ISR("Scheduler finished to transmit "
1394 			      "the frame/frames.\n");
1395 			il->isr_stats.sch++;
1396 		}
1397 
1398 		/* Alive notification via Rx interrupt will do the real work */
1399 		if (inta & CSR_INT_BIT_ALIVE) {
1400 			D_ISR("Alive interrupt\n");
1401 			il->isr_stats.alive++;
1402 		}
1403 	}
1404 #endif
1405 	/* Safely ignore these bits for debug checks below */
1406 	inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1407 
1408 	/* Error detected by uCode */
1409 	if (inta & CSR_INT_BIT_SW_ERR) {
1410 		IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1411 		       inta);
1412 		il->isr_stats.sw++;
1413 		il_irq_handle_error(il);
1414 		handled |= CSR_INT_BIT_SW_ERR;
1415 	}
1416 
1417 	/* uCode wakes up after power-down sleep */
1418 	if (inta & CSR_INT_BIT_WAKEUP) {
1419 		D_ISR("Wakeup interrupt\n");
1420 		il_rx_queue_update_write_ptr(il, &il->rxq);
1421 
1422 		spin_lock_irqsave(&il->lock, flags);
1423 		il_txq_update_write_ptr(il, &il->txq[0]);
1424 		il_txq_update_write_ptr(il, &il->txq[1]);
1425 		il_txq_update_write_ptr(il, &il->txq[2]);
1426 		il_txq_update_write_ptr(il, &il->txq[3]);
1427 		il_txq_update_write_ptr(il, &il->txq[4]);
1428 		spin_unlock_irqrestore(&il->lock, flags);
1429 
1430 		il->isr_stats.wakeup++;
1431 		handled |= CSR_INT_BIT_WAKEUP;
1432 	}
1433 
1434 	/* All uCode command responses, including Tx command responses,
1435 	 * Rx "responses" (frame-received notification), and other
1436 	 * notifications from uCode come through here*/
1437 	if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1438 		il3945_rx_handle(il);
1439 		il->isr_stats.rx++;
1440 		handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1441 	}
1442 
1443 	if (inta & CSR_INT_BIT_FH_TX) {
1444 		D_ISR("Tx interrupt\n");
1445 		il->isr_stats.tx++;
1446 
1447 		_il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1448 		il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1449 		handled |= CSR_INT_BIT_FH_TX;
1450 	}
1451 
1452 	if (inta & ~handled) {
1453 		IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1454 		il->isr_stats.unhandled++;
1455 	}
1456 
1457 	if (inta & ~il->inta_mask) {
1458 		IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1459 			inta & ~il->inta_mask);
1460 		IL_WARN("   with inta_fh = 0x%08x\n", inta_fh);
1461 	}
1462 
1463 	/* Re-enable all interrupts */
1464 	/* only Re-enable if disabled by irq */
1465 	if (test_bit(S_INT_ENABLED, &il->status))
1466 		il_enable_interrupts(il);
1467 
1468 #ifdef CONFIG_IWLEGACY_DEBUG
1469 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
1470 		inta = _il_rd(il, CSR_INT);
1471 		inta_mask = _il_rd(il, CSR_INT_MASK);
1472 		inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1473 		D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1474 		      "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1475 	}
1476 #endif
1477 }
1478 
1479 static int
il3945_get_channels_for_scan(struct il_priv * il,enum nl80211_band band,u8 is_active,u8 n_probes,struct il3945_scan_channel * scan_ch,struct ieee80211_vif * vif)1480 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
1481 			     u8 is_active, u8 n_probes,
1482 			     struct il3945_scan_channel *scan_ch,
1483 			     struct ieee80211_vif *vif)
1484 {
1485 	struct ieee80211_channel *chan;
1486 	const struct ieee80211_supported_band *sband;
1487 	const struct il_channel_info *ch_info;
1488 	u16 passive_dwell = 0;
1489 	u16 active_dwell = 0;
1490 	int added, i;
1491 
1492 	sband = il_get_hw_mode(il, band);
1493 	if (!sband)
1494 		return 0;
1495 
1496 	active_dwell = il_get_active_dwell_time(il, band, n_probes);
1497 	passive_dwell = il_get_passive_dwell_time(il, band, vif);
1498 
1499 	if (passive_dwell <= active_dwell)
1500 		passive_dwell = active_dwell + 1;
1501 
1502 	for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1503 		chan = il->scan_request->channels[i];
1504 
1505 		if (chan->band != band)
1506 			continue;
1507 
1508 		scan_ch->channel = chan->hw_value;
1509 
1510 		ch_info = il_get_channel_info(il, band, scan_ch->channel);
1511 		if (!il_is_channel_valid(ch_info)) {
1512 			D_SCAN("Channel %d is INVALID for this band.\n",
1513 			       scan_ch->channel);
1514 			continue;
1515 		}
1516 
1517 		scan_ch->active_dwell = cpu_to_le16(active_dwell);
1518 		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1519 		/* If passive , set up for auto-switch
1520 		 *  and use long active_dwell time.
1521 		 */
1522 		if (!is_active || il_is_channel_passive(ch_info) ||
1523 		    (chan->flags & IEEE80211_CHAN_NO_IR)) {
1524 			scan_ch->type = 0;	/* passive */
1525 			if (IL_UCODE_API(il->ucode_ver) == 1)
1526 				scan_ch->active_dwell =
1527 				    cpu_to_le16(passive_dwell - 1);
1528 		} else {
1529 			scan_ch->type = 1;	/* active */
1530 		}
1531 
1532 		/* Set direct probe bits. These may be used both for active
1533 		 * scan channels (probes gets sent right away),
1534 		 * or for passive channels (probes get se sent only after
1535 		 * hearing clear Rx packet).*/
1536 		if (IL_UCODE_API(il->ucode_ver) >= 2) {
1537 			if (n_probes)
1538 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1539 		} else {
1540 			/* uCode v1 does not allow setting direct probe bits on
1541 			 * passive channel. */
1542 			if ((scan_ch->type & 1) && n_probes)
1543 				scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1544 		}
1545 
1546 		/* Set txpower levels to defaults */
1547 		scan_ch->tpc.dsp_atten = 110;
1548 		/* scan_pwr_info->tpc.dsp_atten; */
1549 
1550 		/*scan_pwr_info->tpc.tx_gain; */
1551 		if (band == NL80211_BAND_5GHZ)
1552 			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1553 		else {
1554 			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1555 			/* NOTE: if we were doing 6Mb OFDM for scans we'd use
1556 			 * power level:
1557 			 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1558 			 */
1559 		}
1560 
1561 		D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1562 		       (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1563 		       (scan_ch->type & 1) ? active_dwell : passive_dwell);
1564 
1565 		scan_ch++;
1566 		added++;
1567 	}
1568 
1569 	D_SCAN("total channels to scan %d\n", added);
1570 	return added;
1571 }
1572 
1573 static void
il3945_init_hw_rates(struct il_priv * il,struct ieee80211_rate * rates)1574 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1575 {
1576 	int i;
1577 
1578 	for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1579 		rates[i].bitrate = il3945_rates[i].ieee * 5;
1580 		rates[i].hw_value = i;	/* Rate scaling will work on idxes */
1581 		rates[i].hw_value_short = i;
1582 		rates[i].flags = 0;
1583 		if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1584 			/*
1585 			 * If CCK != 1M then set short preamble rate flag.
1586 			 */
1587 			rates[i].flags |=
1588 			    (il3945_rates[i].plcp ==
1589 			     10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1590 		}
1591 	}
1592 }
1593 
1594 /******************************************************************************
1595  *
1596  * uCode download functions
1597  *
1598  ******************************************************************************/
1599 
1600 static void
il3945_dealloc_ucode_pci(struct il_priv * il)1601 il3945_dealloc_ucode_pci(struct il_priv *il)
1602 {
1603 	il_free_fw_desc(il->pci_dev, &il->ucode_code);
1604 	il_free_fw_desc(il->pci_dev, &il->ucode_data);
1605 	il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1606 	il_free_fw_desc(il->pci_dev, &il->ucode_init);
1607 	il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1608 	il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1609 }
1610 
1611 /*
1612  * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1613  *     looking at all data.
1614  */
1615 static int
il3945_verify_inst_full(struct il_priv * il,__le32 * image,u32 len)1616 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1617 {
1618 	u32 val;
1619 	u32 save_len = len;
1620 	int rc = 0;
1621 	u32 errcnt;
1622 
1623 	D_INFO("ucode inst image size is %u\n", len);
1624 
1625 	il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1626 
1627 	errcnt = 0;
1628 	for (; len > 0; len -= sizeof(u32), image++) {
1629 		/* read data comes through single port, auto-incr addr */
1630 		/* NOTE: Use the debugless read so we don't flood kernel log
1631 		 * if IL_DL_IO is set */
1632 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1633 		if (val != le32_to_cpu(*image)) {
1634 			IL_ERR("uCode INST section is invalid at "
1635 			       "offset 0x%x, is 0x%x, s/b 0x%x\n",
1636 			       save_len - len, val, le32_to_cpu(*image));
1637 			rc = -EIO;
1638 			errcnt++;
1639 			if (errcnt >= 20)
1640 				break;
1641 		}
1642 	}
1643 
1644 	if (!errcnt)
1645 		D_INFO("ucode image in INSTRUCTION memory is good\n");
1646 
1647 	return rc;
1648 }
1649 
1650 /*
1651  * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1652  *   using sample data 100 bytes apart.  If these sample points are good,
1653  *   it's a pretty good bet that everything between them is good, too.
1654  */
1655 static int
il3945_verify_inst_sparse(struct il_priv * il,__le32 * image,u32 len)1656 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1657 {
1658 	u32 val;
1659 	int rc = 0;
1660 	u32 errcnt = 0;
1661 	u32 i;
1662 
1663 	D_INFO("ucode inst image size is %u\n", len);
1664 
1665 	for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1666 		/* read data comes through single port, auto-incr addr */
1667 		/* NOTE: Use the debugless read so we don't flood kernel log
1668 		 * if IL_DL_IO is set */
1669 		il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1670 		val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1671 		if (val != le32_to_cpu(*image)) {
1672 #if 0				/* Enable this if you want to see details */
1673 			IL_ERR("uCode INST section is invalid at "
1674 			       "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1675 			       *image);
1676 #endif
1677 			rc = -EIO;
1678 			errcnt++;
1679 			if (errcnt >= 3)
1680 				break;
1681 		}
1682 	}
1683 
1684 	return rc;
1685 }
1686 
1687 /*
1688  * il3945_verify_ucode - determine which instruction image is in SRAM,
1689  *    and verify its contents
1690  */
1691 static int
il3945_verify_ucode(struct il_priv * il)1692 il3945_verify_ucode(struct il_priv *il)
1693 {
1694 	__le32 *image;
1695 	u32 len;
1696 	int rc = 0;
1697 
1698 	/* Try bootstrap */
1699 	image = (__le32 *) il->ucode_boot.v_addr;
1700 	len = il->ucode_boot.len;
1701 	rc = il3945_verify_inst_sparse(il, image, len);
1702 	if (rc == 0) {
1703 		D_INFO("Bootstrap uCode is good in inst SRAM\n");
1704 		return 0;
1705 	}
1706 
1707 	/* Try initialize */
1708 	image = (__le32 *) il->ucode_init.v_addr;
1709 	len = il->ucode_init.len;
1710 	rc = il3945_verify_inst_sparse(il, image, len);
1711 	if (rc == 0) {
1712 		D_INFO("Initialize uCode is good in inst SRAM\n");
1713 		return 0;
1714 	}
1715 
1716 	/* Try runtime/protocol */
1717 	image = (__le32 *) il->ucode_code.v_addr;
1718 	len = il->ucode_code.len;
1719 	rc = il3945_verify_inst_sparse(il, image, len);
1720 	if (rc == 0) {
1721 		D_INFO("Runtime uCode is good in inst SRAM\n");
1722 		return 0;
1723 	}
1724 
1725 	IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1726 
1727 	/* Since nothing seems to match, show first several data entries in
1728 	 * instruction SRAM, so maybe visual inspection will give a clue.
1729 	 * Selection of bootstrap image (vs. other images) is arbitrary. */
1730 	image = (__le32 *) il->ucode_boot.v_addr;
1731 	len = il->ucode_boot.len;
1732 	rc = il3945_verify_inst_full(il, image, len);
1733 
1734 	return rc;
1735 }
1736 
1737 static void
il3945_nic_start(struct il_priv * il)1738 il3945_nic_start(struct il_priv *il)
1739 {
1740 	/* Remove all resets to allow NIC to operate */
1741 	_il_wr(il, CSR_RESET, 0);
1742 }
1743 
1744 #define IL3945_UCODE_GET(item)						\
1745 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1746 {									\
1747 	return le32_to_cpu(ucode->v1.item);				\
1748 }
1749 
1750 static u32
il3945_ucode_get_header_size(u32 api_ver)1751 il3945_ucode_get_header_size(u32 api_ver)
1752 {
1753 	return 24;
1754 }
1755 
1756 static u8 *
il3945_ucode_get_data(const struct il_ucode_header * ucode)1757 il3945_ucode_get_data(const struct il_ucode_header *ucode)
1758 {
1759 	return (u8 *) ucode->v1.data;
1760 }
1761 
1762 IL3945_UCODE_GET(inst_size);
1763 IL3945_UCODE_GET(data_size);
1764 IL3945_UCODE_GET(init_size);
1765 IL3945_UCODE_GET(init_data_size);
1766 IL3945_UCODE_GET(boot_size);
1767 
1768 /*
1769  * il3945_read_ucode - Read uCode images from disk file.
1770  *
1771  * Copy into buffers for card to fetch via bus-mastering
1772  */
1773 static int
il3945_read_ucode(struct il_priv * il)1774 il3945_read_ucode(struct il_priv *il)
1775 {
1776 	const struct il_ucode_header *ucode;
1777 	int ret = -EINVAL, idx;
1778 	const struct firmware *ucode_raw;
1779 	/* firmware file name contains uCode/driver compatibility version */
1780 	const char *name_pre = il->cfg->fw_name_pre;
1781 	const unsigned int api_max = il->cfg->ucode_api_max;
1782 	const unsigned int api_min = il->cfg->ucode_api_min;
1783 	char buf[25];
1784 	u8 *src;
1785 	size_t len;
1786 	u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1787 
1788 	/* Ask kernel firmware_class module to get the boot firmware off disk.
1789 	 * request_firmware() is synchronous, file is in memory on return. */
1790 	for (idx = api_max; idx >= api_min; idx--) {
1791 		sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1792 		ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1793 		if (ret < 0) {
1794 			IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1795 			if (ret == -ENOENT)
1796 				continue;
1797 			else
1798 				goto error;
1799 		} else {
1800 			if (idx < api_max)
1801 				IL_ERR("Loaded firmware %s, "
1802 				       "which is deprecated. "
1803 				       " Please use API v%u instead.\n", buf,
1804 				       api_max);
1805 			D_INFO("Got firmware '%s' file "
1806 			       "(%zd bytes) from disk\n", buf, ucode_raw->size);
1807 			break;
1808 		}
1809 	}
1810 
1811 	if (ret < 0)
1812 		goto error;
1813 
1814 	/* Make sure that we got at least our header! */
1815 	if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1816 		IL_ERR("File size way too small!\n");
1817 		ret = -EINVAL;
1818 		goto err_release;
1819 	}
1820 
1821 	/* Data from ucode file:  header followed by uCode images */
1822 	ucode = (struct il_ucode_header *)ucode_raw->data;
1823 
1824 	il->ucode_ver = le32_to_cpu(ucode->ver);
1825 	api_ver = IL_UCODE_API(il->ucode_ver);
1826 	inst_size = il3945_ucode_get_inst_size(ucode);
1827 	data_size = il3945_ucode_get_data_size(ucode);
1828 	init_size = il3945_ucode_get_init_size(ucode);
1829 	init_data_size = il3945_ucode_get_init_data_size(ucode);
1830 	boot_size = il3945_ucode_get_boot_size(ucode);
1831 	src = il3945_ucode_get_data(ucode);
1832 
1833 	/* api_ver should match the api version forming part of the
1834 	 * firmware filename ... but we don't check for that and only rely
1835 	 * on the API version read from firmware header from here on forward */
1836 
1837 	if (api_ver < api_min || api_ver > api_max) {
1838 		IL_ERR("Driver unable to support your firmware API. "
1839 		       "Driver supports v%u, firmware is v%u.\n", api_max,
1840 		       api_ver);
1841 		il->ucode_ver = 0;
1842 		ret = -EINVAL;
1843 		goto err_release;
1844 	}
1845 	if (api_ver != api_max)
1846 		IL_ERR("Firmware has old API version. Expected %u, "
1847 		       "got %u. New firmware can be obtained "
1848 		       "from http://www.intellinuxwireless.org.\n", api_max,
1849 		       api_ver);
1850 
1851 	IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1852 		IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1853 		IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1854 
1855 	snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1856 		 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1857 		 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1858 		 IL_UCODE_SERIAL(il->ucode_ver));
1859 
1860 	D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1861 	D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1862 	D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1863 	D_INFO("f/w package hdr init inst size = %u\n", init_size);
1864 	D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1865 	D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1866 
1867 	/* Verify size of file vs. image size info in file's header */
1868 	if (ucode_raw->size !=
1869 	    il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1870 	    init_size + init_data_size + boot_size) {
1871 
1872 		D_INFO("uCode file size %zd does not match expected size\n",
1873 		       ucode_raw->size);
1874 		ret = -EINVAL;
1875 		goto err_release;
1876 	}
1877 
1878 	/* Verify that uCode images will fit in card's SRAM */
1879 	if (inst_size > IL39_MAX_INST_SIZE) {
1880 		D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1881 		ret = -EINVAL;
1882 		goto err_release;
1883 	}
1884 
1885 	if (data_size > IL39_MAX_DATA_SIZE) {
1886 		D_INFO("uCode data len %d too large to fit in\n", data_size);
1887 		ret = -EINVAL;
1888 		goto err_release;
1889 	}
1890 	if (init_size > IL39_MAX_INST_SIZE) {
1891 		D_INFO("uCode init instr len %d too large to fit in\n",
1892 		       init_size);
1893 		ret = -EINVAL;
1894 		goto err_release;
1895 	}
1896 	if (init_data_size > IL39_MAX_DATA_SIZE) {
1897 		D_INFO("uCode init data len %d too large to fit in\n",
1898 		       init_data_size);
1899 		ret = -EINVAL;
1900 		goto err_release;
1901 	}
1902 	if (boot_size > IL39_MAX_BSM_SIZE) {
1903 		D_INFO("uCode boot instr len %d too large to fit in\n",
1904 		       boot_size);
1905 		ret = -EINVAL;
1906 		goto err_release;
1907 	}
1908 
1909 	/* Allocate ucode buffers for card's bus-master loading ... */
1910 
1911 	/* Runtime instructions and 2 copies of data:
1912 	 * 1) unmodified from disk
1913 	 * 2) backup cache for save/restore during power-downs */
1914 	il->ucode_code.len = inst_size;
1915 	il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1916 
1917 	il->ucode_data.len = data_size;
1918 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1919 
1920 	il->ucode_data_backup.len = data_size;
1921 	il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1922 
1923 	if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1924 	    !il->ucode_data_backup.v_addr)
1925 		goto err_pci_alloc;
1926 
1927 	/* Initialization instructions and data */
1928 	if (init_size && init_data_size) {
1929 		il->ucode_init.len = init_size;
1930 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1931 
1932 		il->ucode_init_data.len = init_data_size;
1933 		il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1934 
1935 		if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1936 			goto err_pci_alloc;
1937 	}
1938 
1939 	/* Bootstrap (instructions only, no data) */
1940 	if (boot_size) {
1941 		il->ucode_boot.len = boot_size;
1942 		il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
1943 
1944 		if (!il->ucode_boot.v_addr)
1945 			goto err_pci_alloc;
1946 	}
1947 
1948 	/* Copy images into buffers for card's bus-master reads ... */
1949 
1950 	/* Runtime instructions (first block of data in file) */
1951 	len = inst_size;
1952 	D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
1953 	memcpy(il->ucode_code.v_addr, src, len);
1954 	src += len;
1955 
1956 	D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1957 	       il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
1958 
1959 	/* Runtime data (2nd block)
1960 	 * NOTE:  Copy into backup buffer will be done in il3945_up()  */
1961 	len = data_size;
1962 	D_INFO("Copying (but not loading) uCode data len %zd\n", len);
1963 	memcpy(il->ucode_data.v_addr, src, len);
1964 	memcpy(il->ucode_data_backup.v_addr, src, len);
1965 	src += len;
1966 
1967 	/* Initialization instructions (3rd block) */
1968 	if (init_size) {
1969 		len = init_size;
1970 		D_INFO("Copying (but not loading) init instr len %zd\n", len);
1971 		memcpy(il->ucode_init.v_addr, src, len);
1972 		src += len;
1973 	}
1974 
1975 	/* Initialization data (4th block) */
1976 	if (init_data_size) {
1977 		len = init_data_size;
1978 		D_INFO("Copying (but not loading) init data len %zd\n", len);
1979 		memcpy(il->ucode_init_data.v_addr, src, len);
1980 		src += len;
1981 	}
1982 
1983 	/* Bootstrap instructions (5th block) */
1984 	len = boot_size;
1985 	D_INFO("Copying (but not loading) boot instr len %zd\n", len);
1986 	memcpy(il->ucode_boot.v_addr, src, len);
1987 
1988 	/* We have our copies now, allow OS release its copies */
1989 	release_firmware(ucode_raw);
1990 	return 0;
1991 
1992 err_pci_alloc:
1993 	IL_ERR("failed to allocate pci memory\n");
1994 	ret = -ENOMEM;
1995 	il3945_dealloc_ucode_pci(il);
1996 
1997 err_release:
1998 	release_firmware(ucode_raw);
1999 
2000 error:
2001 	return ret;
2002 }
2003 
2004 /*
2005  * il3945_set_ucode_ptrs - Set uCode address location
2006  *
2007  * Tell initialization uCode where to find runtime uCode.
2008  *
2009  * BSM registers initially contain pointers to initialization uCode.
2010  * We need to replace them to load runtime uCode inst and data,
2011  * and to save runtime data when powering down.
2012  */
2013 static int
il3945_set_ucode_ptrs(struct il_priv * il)2014 il3945_set_ucode_ptrs(struct il_priv *il)
2015 {
2016 	dma_addr_t pinst;
2017 	dma_addr_t pdata;
2018 
2019 	/* bits 31:0 for 3945 */
2020 	pinst = il->ucode_code.p_addr;
2021 	pdata = il->ucode_data_backup.p_addr;
2022 
2023 	/* Tell bootstrap uCode where to find image to load */
2024 	il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2025 	il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2026 	il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2027 
2028 	/* Inst byte count must be last to set up, bit 31 signals uCode
2029 	 *   that all new ptr/size info is in place */
2030 	il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2031 		   il->ucode_code.len | BSM_DRAM_INST_LOAD);
2032 
2033 	D_INFO("Runtime uCode pointers are set.\n");
2034 
2035 	return 0;
2036 }
2037 
2038 /*
2039  * il3945_init_alive_start - Called after N_ALIVE notification received
2040  *
2041  * Called after N_ALIVE notification received from "initialize" uCode.
2042  *
2043  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2044  */
2045 static void
il3945_init_alive_start(struct il_priv * il)2046 il3945_init_alive_start(struct il_priv *il)
2047 {
2048 	/* Check alive response for "valid" sign from uCode */
2049 	if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2050 		/* We had an error bringing up the hardware, so take it
2051 		 * all the way back down so we can try again */
2052 		D_INFO("Initialize Alive failed.\n");
2053 		goto restart;
2054 	}
2055 
2056 	/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2057 	 * This is a paranoid check, because we would not have gotten the
2058 	 * "initialize" alive if code weren't properly loaded.  */
2059 	if (il3945_verify_ucode(il)) {
2060 		/* Runtime instruction load was bad;
2061 		 * take it all the way back down so we can try again */
2062 		D_INFO("Bad \"initialize\" uCode load.\n");
2063 		goto restart;
2064 	}
2065 
2066 	/* Send pointers to protocol/runtime uCode image ... init code will
2067 	 * load and launch runtime uCode, which will send us another "Alive"
2068 	 * notification. */
2069 	D_INFO("Initialization Alive received.\n");
2070 	if (il3945_set_ucode_ptrs(il)) {
2071 		/* Runtime instruction load won't happen;
2072 		 * take it all the way back down so we can try again */
2073 		D_INFO("Couldn't set up uCode pointers.\n");
2074 		goto restart;
2075 	}
2076 	return;
2077 
2078 restart:
2079 	queue_work(il->workqueue, &il->restart);
2080 }
2081 
2082 /*
2083  * il3945_alive_start - called after N_ALIVE notification received
2084  *                   from protocol/runtime uCode (initialization uCode's
2085  *                   Alive gets handled by il3945_init_alive_start()).
2086  */
2087 static void
il3945_alive_start(struct il_priv * il)2088 il3945_alive_start(struct il_priv *il)
2089 {
2090 	int thermal_spin = 0;
2091 	u32 rfkill;
2092 
2093 	D_INFO("Runtime Alive received.\n");
2094 
2095 	if (il->card_alive.is_valid != UCODE_VALID_OK) {
2096 		/* We had an error bringing up the hardware, so take it
2097 		 * all the way back down so we can try again */
2098 		D_INFO("Alive failed.\n");
2099 		goto restart;
2100 	}
2101 
2102 	/* Initialize uCode has loaded Runtime uCode ... verify inst image.
2103 	 * This is a paranoid check, because we would not have gotten the
2104 	 * "runtime" alive if code weren't properly loaded.  */
2105 	if (il3945_verify_ucode(il)) {
2106 		/* Runtime instruction load was bad;
2107 		 * take it all the way back down so we can try again */
2108 		D_INFO("Bad runtime uCode load.\n");
2109 		goto restart;
2110 	}
2111 
2112 	rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2113 	D_INFO("RFKILL status: 0x%x\n", rfkill);
2114 
2115 	if (rfkill & 0x1) {
2116 		clear_bit(S_RFKILL, &il->status);
2117 		/* if RFKILL is not on, then wait for thermal
2118 		 * sensor in adapter to kick in */
2119 		while (il3945_hw_get_temperature(il) == 0) {
2120 			thermal_spin++;
2121 			udelay(10);
2122 		}
2123 
2124 		if (thermal_spin)
2125 			D_INFO("Thermal calibration took %dus\n",
2126 			       thermal_spin * 10);
2127 	} else
2128 		set_bit(S_RFKILL, &il->status);
2129 
2130 	/* After the ALIVE response, we can send commands to 3945 uCode */
2131 	set_bit(S_ALIVE, &il->status);
2132 
2133 	/* Enable watchdog to monitor the driver tx queues */
2134 	il_setup_watchdog(il);
2135 
2136 	if (il_is_rfkill(il))
2137 		return;
2138 
2139 	ieee80211_wake_queues(il->hw);
2140 
2141 	il->active_rate = RATES_MASK_3945;
2142 
2143 	il_power_update_mode(il, true);
2144 
2145 	if (il_is_associated(il)) {
2146 		struct il3945_rxon_cmd *active_rxon =
2147 		    (struct il3945_rxon_cmd *)(&il->active);
2148 
2149 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2150 		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2151 	} else {
2152 		/* Initialize our rx_config data */
2153 		il_connection_init_rx_config(il);
2154 	}
2155 
2156 	/* Configure Bluetooth device coexistence support */
2157 	il_send_bt_config(il);
2158 
2159 	set_bit(S_READY, &il->status);
2160 
2161 	/* Configure the adapter for unassociated operation */
2162 	il3945_commit_rxon(il);
2163 
2164 	il3945_reg_txpower_periodic(il);
2165 
2166 	D_INFO("ALIVE processing complete.\n");
2167 	wake_up(&il->wait_command_queue);
2168 
2169 	return;
2170 
2171 restart:
2172 	queue_work(il->workqueue, &il->restart);
2173 }
2174 
2175 static void il3945_cancel_deferred_work(struct il_priv *il);
2176 
2177 static void
__il3945_down(struct il_priv * il)2178 __il3945_down(struct il_priv *il)
2179 {
2180 	unsigned long flags;
2181 	int exit_pending;
2182 
2183 	D_INFO(DRV_NAME " is going down\n");
2184 
2185 	il_scan_cancel_timeout(il, 200);
2186 
2187 	exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2188 
2189 	/* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2190 	 * to prevent rearm timer */
2191 	del_timer_sync(&il->watchdog);
2192 
2193 	/* Station information will now be cleared in device */
2194 	il_clear_ucode_stations(il);
2195 	il_dealloc_bcast_stations(il);
2196 	il_clear_driver_stations(il);
2197 
2198 	/* Unblock any waiting calls */
2199 	wake_up_all(&il->wait_command_queue);
2200 
2201 	/* Wipe out the EXIT_PENDING status bit if we are not actually
2202 	 * exiting the module */
2203 	if (!exit_pending)
2204 		clear_bit(S_EXIT_PENDING, &il->status);
2205 
2206 	/* stop and reset the on-board processor */
2207 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2208 
2209 	/* tell the device to stop sending interrupts */
2210 	spin_lock_irqsave(&il->lock, flags);
2211 	il_disable_interrupts(il);
2212 	spin_unlock_irqrestore(&il->lock, flags);
2213 	il3945_synchronize_irq(il);
2214 
2215 	if (il->mac80211_registered)
2216 		ieee80211_stop_queues(il->hw);
2217 
2218 	/* If we have not previously called il3945_init() then
2219 	 * clear all bits but the RF Kill bits and return */
2220 	if (!il_is_init(il)) {
2221 		il->status =
2222 		    test_bit(S_RFKILL, &il->status) << S_RFKILL |
2223 		    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2224 		    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2225 		goto exit;
2226 	}
2227 
2228 	/* ...otherwise clear out all the status bits but the RF Kill
2229 	 * bit and continue taking the NIC down. */
2230 	il->status &=
2231 	    test_bit(S_RFKILL, &il->status) << S_RFKILL |
2232 	    test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2233 	    test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2234 	    test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2235 
2236 	/*
2237 	 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2238 	 * here is the only thread which will program device registers, but
2239 	 * still have lockdep assertions, so we are taking reg_lock.
2240 	 */
2241 	spin_lock_irq(&il->reg_lock);
2242 	/* FIXME: il_grab_nic_access if rfkill is off ? */
2243 
2244 	il3945_hw_txq_ctx_stop(il);
2245 	il3945_hw_rxq_stop(il);
2246 	/* Power-down device's busmaster DMA clocks */
2247 	_il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2248 	udelay(5);
2249 	/* Stop the device, and put it in low power state */
2250 	_il_apm_stop(il);
2251 
2252 	spin_unlock_irq(&il->reg_lock);
2253 
2254 	il3945_hw_txq_ctx_free(il);
2255 exit:
2256 	memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2257 	dev_kfree_skb(il->beacon_skb);
2258 	il->beacon_skb = NULL;
2259 
2260 	/* clear out any free frames */
2261 	il3945_clear_free_frames(il);
2262 }
2263 
2264 static void
il3945_down(struct il_priv * il)2265 il3945_down(struct il_priv *il)
2266 {
2267 	mutex_lock(&il->mutex);
2268 	__il3945_down(il);
2269 	mutex_unlock(&il->mutex);
2270 
2271 	il3945_cancel_deferred_work(il);
2272 }
2273 
2274 #define MAX_HW_RESTARTS 5
2275 
2276 static int
il3945_alloc_bcast_station(struct il_priv * il)2277 il3945_alloc_bcast_station(struct il_priv *il)
2278 {
2279 	unsigned long flags;
2280 	u8 sta_id;
2281 
2282 	spin_lock_irqsave(&il->sta_lock, flags);
2283 	sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2284 	if (sta_id == IL_INVALID_STATION) {
2285 		IL_ERR("Unable to prepare broadcast station\n");
2286 		spin_unlock_irqrestore(&il->sta_lock, flags);
2287 
2288 		return -EINVAL;
2289 	}
2290 
2291 	il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2292 	il->stations[sta_id].used |= IL_STA_BCAST;
2293 	spin_unlock_irqrestore(&il->sta_lock, flags);
2294 
2295 	return 0;
2296 }
2297 
2298 static int
__il3945_up(struct il_priv * il)2299 __il3945_up(struct il_priv *il)
2300 {
2301 	int rc, i;
2302 
2303 	rc = il3945_alloc_bcast_station(il);
2304 	if (rc)
2305 		return rc;
2306 
2307 	if (test_bit(S_EXIT_PENDING, &il->status)) {
2308 		IL_WARN("Exit pending; will not bring the NIC up\n");
2309 		return -EIO;
2310 	}
2311 
2312 	if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2313 		IL_ERR("ucode not available for device bring up\n");
2314 		return -EIO;
2315 	}
2316 
2317 	/* If platform's RF_KILL switch is NOT set to KILL */
2318 	if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2319 		clear_bit(S_RFKILL, &il->status);
2320 	else {
2321 		set_bit(S_RFKILL, &il->status);
2322 		return -ERFKILL;
2323 	}
2324 
2325 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
2326 
2327 	rc = il3945_hw_nic_init(il);
2328 	if (rc) {
2329 		IL_ERR("Unable to int nic\n");
2330 		return rc;
2331 	}
2332 
2333 	/* make sure rfkill handshake bits are cleared */
2334 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2335 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2336 
2337 	/* clear (again), then enable host interrupts */
2338 	_il_wr(il, CSR_INT, 0xFFFFFFFF);
2339 	il_enable_interrupts(il);
2340 
2341 	/* really make sure rfkill handshake bits are cleared */
2342 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2343 	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2344 
2345 	/* Copy original ucode data image from disk into backup cache.
2346 	 * This will be used to initialize the on-board processor's
2347 	 * data SRAM for a clean start when the runtime program first loads. */
2348 	memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2349 	       il->ucode_data.len);
2350 
2351 	/* We return success when we resume from suspend and rf_kill is on. */
2352 	if (test_bit(S_RFKILL, &il->status))
2353 		return 0;
2354 
2355 	for (i = 0; i < MAX_HW_RESTARTS; i++) {
2356 
2357 		/* load bootstrap state machine,
2358 		 * load bootstrap program into processor's memory,
2359 		 * prepare to load the "initialize" uCode */
2360 		rc = il->ops->load_ucode(il);
2361 
2362 		if (rc) {
2363 			IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2364 			continue;
2365 		}
2366 
2367 		/* start card; "initialize" will load runtime ucode */
2368 		il3945_nic_start(il);
2369 
2370 		D_INFO(DRV_NAME " is coming up\n");
2371 
2372 		return 0;
2373 	}
2374 
2375 	set_bit(S_EXIT_PENDING, &il->status);
2376 	__il3945_down(il);
2377 	clear_bit(S_EXIT_PENDING, &il->status);
2378 
2379 	/* tried to restart and config the device for as long as our
2380 	 * patience could withstand */
2381 	IL_ERR("Unable to initialize device after %d attempts.\n", i);
2382 	return -EIO;
2383 }
2384 
2385 /*****************************************************************************
2386  *
2387  * Workqueue callbacks
2388  *
2389  *****************************************************************************/
2390 
2391 static void
il3945_bg_init_alive_start(struct work_struct * data)2392 il3945_bg_init_alive_start(struct work_struct *data)
2393 {
2394 	struct il_priv *il =
2395 	    container_of(data, struct il_priv, init_alive_start.work);
2396 
2397 	mutex_lock(&il->mutex);
2398 	if (test_bit(S_EXIT_PENDING, &il->status))
2399 		goto out;
2400 
2401 	il3945_init_alive_start(il);
2402 out:
2403 	mutex_unlock(&il->mutex);
2404 }
2405 
2406 static void
il3945_bg_alive_start(struct work_struct * data)2407 il3945_bg_alive_start(struct work_struct *data)
2408 {
2409 	struct il_priv *il =
2410 	    container_of(data, struct il_priv, alive_start.work);
2411 
2412 	mutex_lock(&il->mutex);
2413 	if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2414 		goto out;
2415 
2416 	il3945_alive_start(il);
2417 out:
2418 	mutex_unlock(&il->mutex);
2419 }
2420 
2421 /*
2422  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2423  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2424  * *is* readable even when device has been SW_RESET into low power mode
2425  * (e.g. during RF KILL).
2426  */
2427 static void
il3945_rfkill_poll(struct work_struct * data)2428 il3945_rfkill_poll(struct work_struct *data)
2429 {
2430 	struct il_priv *il =
2431 	    container_of(data, struct il_priv, _3945.rfkill_poll.work);
2432 	bool old_rfkill = test_bit(S_RFKILL, &il->status);
2433 	bool new_rfkill =
2434 	    !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2435 
2436 	if (new_rfkill != old_rfkill) {
2437 		if (new_rfkill)
2438 			set_bit(S_RFKILL, &il->status);
2439 		else
2440 			clear_bit(S_RFKILL, &il->status);
2441 
2442 		wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2443 
2444 		D_RF_KILL("RF_KILL bit toggled to %s.\n",
2445 			  new_rfkill ? "disable radio" : "enable radio");
2446 	}
2447 
2448 	/* Keep this running, even if radio now enabled.  This will be
2449 	 * cancelled in mac_start() if system decides to start again */
2450 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2451 			   round_jiffies_relative(2 * HZ));
2452 
2453 }
2454 
2455 int
il3945_request_scan(struct il_priv * il,struct ieee80211_vif * vif)2456 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2457 {
2458 	struct il_host_cmd cmd = {
2459 		.id = C_SCAN,
2460 		.len = sizeof(struct il3945_scan_cmd),
2461 		.flags = CMD_SIZE_HUGE,
2462 	};
2463 	struct il3945_scan_cmd *scan;
2464 	u8 n_probes = 0;
2465 	enum nl80211_band band;
2466 	bool is_active = false;
2467 	int ret;
2468 	u16 len;
2469 
2470 	lockdep_assert_held(&il->mutex);
2471 
2472 	if (!il->scan_cmd) {
2473 		il->scan_cmd =
2474 		    kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2475 			    GFP_KERNEL);
2476 		if (!il->scan_cmd) {
2477 			D_SCAN("Fail to allocate scan memory\n");
2478 			return -ENOMEM;
2479 		}
2480 	}
2481 	scan = il->scan_cmd;
2482 	memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2483 
2484 	scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2485 	scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2486 
2487 	if (il_is_associated(il)) {
2488 		u16 interval;
2489 		u32 extra;
2490 		u32 suspend_time = 100;
2491 		u32 scan_suspend_time = 100;
2492 
2493 		D_INFO("Scanning while associated...\n");
2494 
2495 		interval = vif->bss_conf.beacon_int;
2496 
2497 		scan->suspend_time = 0;
2498 		scan->max_out_time = cpu_to_le32(200 * 1024);
2499 		if (!interval)
2500 			interval = suspend_time;
2501 		/*
2502 		 * suspend time format:
2503 		 *  0-19: beacon interval in usec (time before exec.)
2504 		 * 20-23: 0
2505 		 * 24-31: number of beacons (suspend between channels)
2506 		 */
2507 
2508 		extra = (suspend_time / interval) << 24;
2509 		scan_suspend_time =
2510 		    0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2511 
2512 		scan->suspend_time = cpu_to_le32(scan_suspend_time);
2513 		D_SCAN("suspend_time 0x%X beacon interval %d\n",
2514 		       scan_suspend_time, interval);
2515 	}
2516 
2517 	if (il->scan_request->n_ssids) {
2518 		int i, p = 0;
2519 		D_SCAN("Kicking off active scan\n");
2520 		for (i = 0; i < il->scan_request->n_ssids; i++) {
2521 			/* always does wildcard anyway */
2522 			if (!il->scan_request->ssids[i].ssid_len)
2523 				continue;
2524 			scan->direct_scan[p].id = WLAN_EID_SSID;
2525 			scan->direct_scan[p].len =
2526 			    il->scan_request->ssids[i].ssid_len;
2527 			memcpy(scan->direct_scan[p].ssid,
2528 			       il->scan_request->ssids[i].ssid,
2529 			       il->scan_request->ssids[i].ssid_len);
2530 			n_probes++;
2531 			p++;
2532 		}
2533 		is_active = true;
2534 	} else
2535 		D_SCAN("Kicking off passive scan.\n");
2536 
2537 	/* We don't build a direct scan probe request; the uCode will do
2538 	 * that based on the direct_mask added to each channel entry */
2539 	scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2540 	scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2541 	scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2542 
2543 	/* flags + rate selection */
2544 
2545 	switch (il->scan_band) {
2546 	case NL80211_BAND_2GHZ:
2547 		scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2548 		scan->tx_cmd.rate = RATE_1M_PLCP;
2549 		band = NL80211_BAND_2GHZ;
2550 		break;
2551 	case NL80211_BAND_5GHZ:
2552 		scan->tx_cmd.rate = RATE_6M_PLCP;
2553 		band = NL80211_BAND_5GHZ;
2554 		break;
2555 	default:
2556 		IL_WARN("Invalid scan band\n");
2557 		return -EIO;
2558 	}
2559 
2560 	/*
2561 	 * If active scaning is requested but a certain channel is marked
2562 	 * passive, we can do active scanning if we detect transmissions. For
2563 	 * passive only scanning disable switching to active on any channel.
2564 	 */
2565 	scan->good_CRC_th =
2566 	    is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2567 
2568 	len =
2569 	    il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2570 			      vif->addr, il->scan_request->ie,
2571 			      il->scan_request->ie_len,
2572 			      IL_MAX_SCAN_SIZE - sizeof(*scan));
2573 	scan->tx_cmd.len = cpu_to_le16(len);
2574 
2575 	/* select Rx antennas */
2576 	scan->flags |= il3945_get_antenna_flags(il);
2577 
2578 	scan->channel_count =
2579 	    il3945_get_channels_for_scan(il, band, is_active, n_probes,
2580 					 (void *)&scan->data[len], vif);
2581 	if (scan->channel_count == 0) {
2582 		D_SCAN("channel count %d\n", scan->channel_count);
2583 		return -EIO;
2584 	}
2585 
2586 	cmd.len +=
2587 	    le16_to_cpu(scan->tx_cmd.len) +
2588 	    scan->channel_count * sizeof(struct il3945_scan_channel);
2589 	cmd.data = scan;
2590 	scan->len = cpu_to_le16(cmd.len);
2591 
2592 	set_bit(S_SCAN_HW, &il->status);
2593 	ret = il_send_cmd_sync(il, &cmd);
2594 	if (ret)
2595 		clear_bit(S_SCAN_HW, &il->status);
2596 	return ret;
2597 }
2598 
2599 void
il3945_post_scan(struct il_priv * il)2600 il3945_post_scan(struct il_priv *il)
2601 {
2602 	/*
2603 	 * Since setting the RXON may have been deferred while
2604 	 * performing the scan, fire one off if needed
2605 	 */
2606 	if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2607 		il3945_commit_rxon(il);
2608 }
2609 
2610 static void
il3945_bg_restart(struct work_struct * data)2611 il3945_bg_restart(struct work_struct *data)
2612 {
2613 	struct il_priv *il = container_of(data, struct il_priv, restart);
2614 
2615 	if (test_bit(S_EXIT_PENDING, &il->status))
2616 		return;
2617 
2618 	if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2619 		mutex_lock(&il->mutex);
2620 		il->is_open = 0;
2621 		mutex_unlock(&il->mutex);
2622 		il3945_down(il);
2623 		ieee80211_restart_hw(il->hw);
2624 	} else {
2625 		il3945_down(il);
2626 
2627 		mutex_lock(&il->mutex);
2628 		if (test_bit(S_EXIT_PENDING, &il->status)) {
2629 			mutex_unlock(&il->mutex);
2630 			return;
2631 		}
2632 
2633 		__il3945_up(il);
2634 		mutex_unlock(&il->mutex);
2635 	}
2636 }
2637 
2638 static void
il3945_bg_rx_replenish(struct work_struct * data)2639 il3945_bg_rx_replenish(struct work_struct *data)
2640 {
2641 	struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2642 
2643 	mutex_lock(&il->mutex);
2644 	if (test_bit(S_EXIT_PENDING, &il->status))
2645 		goto out;
2646 
2647 	il3945_rx_replenish(il);
2648 out:
2649 	mutex_unlock(&il->mutex);
2650 }
2651 
2652 void
il3945_post_associate(struct il_priv * il)2653 il3945_post_associate(struct il_priv *il)
2654 {
2655 	int rc = 0;
2656 
2657 	if (!il->vif || !il->is_open)
2658 		return;
2659 
2660 	D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid,
2661 		il->active.bssid_addr);
2662 
2663 	if (test_bit(S_EXIT_PENDING, &il->status))
2664 		return;
2665 
2666 	il_scan_cancel_timeout(il, 200);
2667 
2668 	il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2669 	il3945_commit_rxon(il);
2670 
2671 	rc = il_send_rxon_timing(il);
2672 	if (rc)
2673 		IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2674 
2675 	il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2676 
2677 	il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid);
2678 
2679 	D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid,
2680 		il->vif->bss_conf.beacon_int);
2681 
2682 	if (il->vif->bss_conf.use_short_preamble)
2683 		il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2684 	else
2685 		il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2686 
2687 	if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2688 		if (il->vif->bss_conf.use_short_slot)
2689 			il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2690 		else
2691 			il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2692 	}
2693 
2694 	il3945_commit_rxon(il);
2695 
2696 	switch (il->vif->type) {
2697 	case NL80211_IFTYPE_STATION:
2698 		il3945_rate_scale_init(il->hw, IL_AP_ID);
2699 		break;
2700 	case NL80211_IFTYPE_ADHOC:
2701 		il3945_send_beacon_cmd(il);
2702 		break;
2703 	default:
2704 		IL_ERR("%s Should not be called in %d mode\n", __func__,
2705 		      il->vif->type);
2706 		break;
2707 	}
2708 }
2709 
2710 /*****************************************************************************
2711  *
2712  * mac80211 entry point functions
2713  *
2714  *****************************************************************************/
2715 
2716 #define UCODE_READY_TIMEOUT	(2 * HZ)
2717 
2718 static int
il3945_mac_start(struct ieee80211_hw * hw)2719 il3945_mac_start(struct ieee80211_hw *hw)
2720 {
2721 	struct il_priv *il = hw->priv;
2722 	int ret;
2723 
2724 	/* we should be verifying the device is ready to be opened */
2725 	mutex_lock(&il->mutex);
2726 	D_MAC80211("enter\n");
2727 
2728 	/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2729 	 * ucode filename and max sizes are card-specific. */
2730 
2731 	if (!il->ucode_code.len) {
2732 		ret = il3945_read_ucode(il);
2733 		if (ret) {
2734 			IL_ERR("Could not read microcode: %d\n", ret);
2735 			mutex_unlock(&il->mutex);
2736 			goto out_release_irq;
2737 		}
2738 	}
2739 
2740 	ret = __il3945_up(il);
2741 
2742 	mutex_unlock(&il->mutex);
2743 
2744 	if (ret)
2745 		goto out_release_irq;
2746 
2747 	D_INFO("Start UP work.\n");
2748 
2749 	/* Wait for START_ALIVE from ucode. Otherwise callbacks from
2750 	 * mac80211 will not be run successfully. */
2751 	ret = wait_event_timeout(il->wait_command_queue,
2752 				 test_bit(S_READY, &il->status),
2753 				 UCODE_READY_TIMEOUT);
2754 	if (!ret) {
2755 		if (!test_bit(S_READY, &il->status)) {
2756 			IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2757 			       jiffies_to_msecs(UCODE_READY_TIMEOUT));
2758 			ret = -ETIMEDOUT;
2759 			goto out_release_irq;
2760 		}
2761 	}
2762 
2763 	/* ucode is running and will send rfkill notifications,
2764 	 * no need to poll the killswitch state anymore */
2765 	cancel_delayed_work(&il->_3945.rfkill_poll);
2766 
2767 	il->is_open = 1;
2768 	D_MAC80211("leave\n");
2769 	return 0;
2770 
2771 out_release_irq:
2772 	il->is_open = 0;
2773 	D_MAC80211("leave - failed\n");
2774 	return ret;
2775 }
2776 
2777 static void
il3945_mac_stop(struct ieee80211_hw * hw,bool suspend)2778 il3945_mac_stop(struct ieee80211_hw *hw, bool suspend)
2779 {
2780 	struct il_priv *il = hw->priv;
2781 
2782 	D_MAC80211("enter\n");
2783 
2784 	if (!il->is_open) {
2785 		D_MAC80211("leave - skip\n");
2786 		return;
2787 	}
2788 
2789 	il->is_open = 0;
2790 
2791 	il3945_down(il);
2792 
2793 	flush_workqueue(il->workqueue);
2794 
2795 	/* start polling the killswitch state again */
2796 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2797 			   round_jiffies_relative(2 * HZ));
2798 
2799 	D_MAC80211("leave\n");
2800 }
2801 
2802 static void
il3945_mac_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)2803 il3945_mac_tx(struct ieee80211_hw *hw,
2804 	       struct ieee80211_tx_control *control,
2805 	       struct sk_buff *skb)
2806 {
2807 	struct il_priv *il = hw->priv;
2808 
2809 	D_MAC80211("enter\n");
2810 
2811 	D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2812 	     ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2813 
2814 	if (il3945_tx_skb(il, control->sta, skb))
2815 		dev_kfree_skb_any(skb);
2816 
2817 	D_MAC80211("leave\n");
2818 }
2819 
2820 void
il3945_config_ap(struct il_priv * il)2821 il3945_config_ap(struct il_priv *il)
2822 {
2823 	struct ieee80211_vif *vif = il->vif;
2824 	int rc = 0;
2825 
2826 	if (test_bit(S_EXIT_PENDING, &il->status))
2827 		return;
2828 
2829 	/* The following should be done only at AP bring up */
2830 	if (!(il_is_associated(il))) {
2831 
2832 		/* RXON - unassoc (to set timing command) */
2833 		il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2834 		il3945_commit_rxon(il);
2835 
2836 		/* RXON Timing */
2837 		rc = il_send_rxon_timing(il);
2838 		if (rc)
2839 			IL_WARN("C_RXON_TIMING failed - "
2840 				"Attempting to continue.\n");
2841 
2842 		il->staging.assoc_id = 0;
2843 
2844 		if (vif->bss_conf.use_short_preamble)
2845 			il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2846 		else
2847 			il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2848 
2849 		if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2850 			if (vif->bss_conf.use_short_slot)
2851 				il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2852 			else
2853 				il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2854 		}
2855 		/* restore RXON assoc */
2856 		il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2857 		il3945_commit_rxon(il);
2858 	}
2859 	il3945_send_beacon_cmd(il);
2860 }
2861 
2862 static int
il3945_mac_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)2863 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2864 		   struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2865 		   struct ieee80211_key_conf *key)
2866 {
2867 	struct il_priv *il = hw->priv;
2868 	int ret = 0;
2869 	u8 sta_id = IL_INVALID_STATION;
2870 	u8 static_key;
2871 
2872 	D_MAC80211("enter\n");
2873 
2874 	if (il3945_mod_params.sw_crypto) {
2875 		D_MAC80211("leave - hwcrypto disabled\n");
2876 		return -EOPNOTSUPP;
2877 	}
2878 
2879 	/*
2880 	 * To support IBSS RSN, don't program group keys in IBSS, the
2881 	 * hardware will then not attempt to decrypt the frames.
2882 	 */
2883 	if (vif->type == NL80211_IFTYPE_ADHOC &&
2884 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2885 		D_MAC80211("leave - IBSS RSN\n");
2886 		return -EOPNOTSUPP;
2887 	}
2888 
2889 	static_key = !il_is_associated(il);
2890 
2891 	if (!static_key) {
2892 		sta_id = il_sta_id_or_broadcast(il, sta);
2893 		if (sta_id == IL_INVALID_STATION) {
2894 			D_MAC80211("leave - station not found\n");
2895 			return -EINVAL;
2896 		}
2897 	}
2898 
2899 	mutex_lock(&il->mutex);
2900 	il_scan_cancel_timeout(il, 100);
2901 
2902 	switch (cmd) {
2903 	case SET_KEY:
2904 		if (static_key)
2905 			ret = il3945_set_static_key(il, key);
2906 		else
2907 			ret = il3945_set_dynamic_key(il, key, sta_id);
2908 		D_MAC80211("enable hwcrypto key\n");
2909 		break;
2910 	case DISABLE_KEY:
2911 		if (static_key)
2912 			ret = il3945_remove_static_key(il);
2913 		else
2914 			ret = il3945_clear_sta_key_info(il, sta_id);
2915 		D_MAC80211("disable hwcrypto key\n");
2916 		break;
2917 	default:
2918 		ret = -EINVAL;
2919 	}
2920 
2921 	D_MAC80211("leave ret %d\n", ret);
2922 	mutex_unlock(&il->mutex);
2923 
2924 	return ret;
2925 }
2926 
2927 static int
il3945_mac_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2928 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2929 		   struct ieee80211_sta *sta)
2930 {
2931 	struct il_priv *il = hw->priv;
2932 	struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
2933 	int ret;
2934 	bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2935 	u8 sta_id;
2936 
2937 	mutex_lock(&il->mutex);
2938 	D_INFO("station %pM\n", sta->addr);
2939 	sta_priv->common.sta_id = IL_INVALID_STATION;
2940 
2941 	ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
2942 	if (ret) {
2943 		IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
2944 		/* Should we return success if return code is EEXIST ? */
2945 		mutex_unlock(&il->mutex);
2946 		return ret;
2947 	}
2948 
2949 	sta_priv->common.sta_id = sta_id;
2950 
2951 	/* Initialize rate scaling */
2952 	D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
2953 	il3945_rs_rate_init(il, sta, sta_id);
2954 	mutex_unlock(&il->mutex);
2955 
2956 	return 0;
2957 }
2958 
2959 static void
il3945_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)2960 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
2961 			unsigned int *total_flags, u64 multicast)
2962 {
2963 	struct il_priv *il = hw->priv;
2964 	__le32 filter_or = 0, filter_nand = 0;
2965 
2966 #define CHK(test, flag)	do { \
2967 	if (*total_flags & (test))		\
2968 		filter_or |= (flag);		\
2969 	else					\
2970 		filter_nand |= (flag);		\
2971 	} while (0)
2972 
2973 	D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
2974 		   *total_flags);
2975 
2976 	CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
2977 	CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
2978 	CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2979 
2980 #undef CHK
2981 
2982 	mutex_lock(&il->mutex);
2983 
2984 	il->staging.filter_flags &= ~filter_nand;
2985 	il->staging.filter_flags |= filter_or;
2986 
2987 	/*
2988 	 * Not committing directly because hardware can perform a scan,
2989 	 * but even if hw is ready, committing here breaks for some reason,
2990 	 * we'll eventually commit the filter flags change anyway.
2991 	 */
2992 
2993 	mutex_unlock(&il->mutex);
2994 
2995 	/*
2996 	 * Receiving all multicast frames is always enabled by the
2997 	 * default flags setup in il_connection_init_rx_config()
2998 	 * since we currently do not support programming multicast
2999 	 * filters into the device.
3000 	 */
3001 	*total_flags &=
3002 	    FIF_OTHER_BSS | FIF_ALLMULTI |
3003 	    FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3004 }
3005 
3006 /*****************************************************************************
3007  *
3008  * sysfs attributes
3009  *
3010  *****************************************************************************/
3011 
3012 #ifdef CONFIG_IWLEGACY_DEBUG
3013 
3014 /*
3015  * The following adds a new attribute to the sysfs representation
3016  * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3017  * used for controlling the debug level.
3018  *
3019  * See the level definitions in iwl for details.
3020  *
3021  * The debug_level being managed using sysfs below is a per device debug
3022  * level that is used instead of the global debug level if it (the per
3023  * device debug level) is set.
3024  */
3025 static ssize_t
il3945_show_debug_level(struct device * d,struct device_attribute * attr,char * buf)3026 il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3027 			char *buf)
3028 {
3029 	struct il_priv *il = dev_get_drvdata(d);
3030 	return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3031 }
3032 
3033 static ssize_t
il3945_store_debug_level(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3034 il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3035 			 const char *buf, size_t count)
3036 {
3037 	struct il_priv *il = dev_get_drvdata(d);
3038 	unsigned long val;
3039 	int ret;
3040 
3041 	ret = kstrtoul(buf, 0, &val);
3042 	if (ret)
3043 		IL_INFO("%s is not in hex or decimal form.\n", buf);
3044 	else
3045 		il->debug_level = val;
3046 
3047 	return strnlen(buf, count);
3048 }
3049 
3050 static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
3051 		   il3945_store_debug_level);
3052 
3053 #endif /* CONFIG_IWLEGACY_DEBUG */
3054 
3055 static ssize_t
il3945_show_temperature(struct device * d,struct device_attribute * attr,char * buf)3056 il3945_show_temperature(struct device *d, struct device_attribute *attr,
3057 			char *buf)
3058 {
3059 	struct il_priv *il = dev_get_drvdata(d);
3060 
3061 	if (!il_is_alive(il))
3062 		return -EAGAIN;
3063 
3064 	return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3065 }
3066 
3067 static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
3068 
3069 static ssize_t
il3945_show_tx_power(struct device * d,struct device_attribute * attr,char * buf)3070 il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3071 {
3072 	struct il_priv *il = dev_get_drvdata(d);
3073 	return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3074 }
3075 
3076 static ssize_t
il3945_store_tx_power(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3077 il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3078 		      const char *buf, size_t count)
3079 {
3080 	struct il_priv *il = dev_get_drvdata(d);
3081 	char *p = (char *)buf;
3082 	u32 val;
3083 
3084 	val = simple_strtoul(p, &p, 10);
3085 	if (p == buf)
3086 		IL_INFO(": %s is not in decimal form.\n", buf);
3087 	else
3088 		il3945_hw_reg_set_txpower(il, val);
3089 
3090 	return count;
3091 }
3092 
3093 static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
3094 
3095 static ssize_t
il3945_show_flags(struct device * d,struct device_attribute * attr,char * buf)3096 il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3097 {
3098 	struct il_priv *il = dev_get_drvdata(d);
3099 
3100 	return sprintf(buf, "0x%04X\n", il->active.flags);
3101 }
3102 
3103 static ssize_t
il3945_store_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3104 il3945_store_flags(struct device *d, struct device_attribute *attr,
3105 		   const char *buf, size_t count)
3106 {
3107 	struct il_priv *il = dev_get_drvdata(d);
3108 	u32 flags = simple_strtoul(buf, NULL, 0);
3109 
3110 	mutex_lock(&il->mutex);
3111 	if (le32_to_cpu(il->staging.flags) != flags) {
3112 		/* Cancel any currently running scans... */
3113 		if (il_scan_cancel_timeout(il, 100))
3114 			IL_WARN("Could not cancel scan.\n");
3115 		else {
3116 			D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3117 			il->staging.flags = cpu_to_le32(flags);
3118 			il3945_commit_rxon(il);
3119 		}
3120 	}
3121 	mutex_unlock(&il->mutex);
3122 
3123 	return count;
3124 }
3125 
3126 static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
3127 
3128 static ssize_t
il3945_show_filter_flags(struct device * d,struct device_attribute * attr,char * buf)3129 il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3130 			 char *buf)
3131 {
3132 	struct il_priv *il = dev_get_drvdata(d);
3133 
3134 	return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3135 }
3136 
3137 static ssize_t
il3945_store_filter_flags(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3138 il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3139 			  const char *buf, size_t count)
3140 {
3141 	struct il_priv *il = dev_get_drvdata(d);
3142 	u32 filter_flags = simple_strtoul(buf, NULL, 0);
3143 
3144 	mutex_lock(&il->mutex);
3145 	if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3146 		/* Cancel any currently running scans... */
3147 		if (il_scan_cancel_timeout(il, 100))
3148 			IL_WARN("Could not cancel scan.\n");
3149 		else {
3150 			D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3151 			       filter_flags);
3152 			il->staging.filter_flags = cpu_to_le32(filter_flags);
3153 			il3945_commit_rxon(il);
3154 		}
3155 	}
3156 	mutex_unlock(&il->mutex);
3157 
3158 	return count;
3159 }
3160 
3161 static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
3162 		   il3945_store_filter_flags);
3163 
3164 static ssize_t
il3945_show_measurement(struct device * d,struct device_attribute * attr,char * buf)3165 il3945_show_measurement(struct device *d, struct device_attribute *attr,
3166 			char *buf)
3167 {
3168 	struct il_priv *il = dev_get_drvdata(d);
3169 	struct il_spectrum_notification measure_report;
3170 	u32 size = sizeof(measure_report), len = 0, ofs = 0;
3171 	u8 *data = (u8 *) &measure_report;
3172 	unsigned long flags;
3173 
3174 	spin_lock_irqsave(&il->lock, flags);
3175 	if (!(il->measurement_status & MEASUREMENT_READY)) {
3176 		spin_unlock_irqrestore(&il->lock, flags);
3177 		return 0;
3178 	}
3179 	memcpy(&measure_report, &il->measure_report, size);
3180 	il->measurement_status = 0;
3181 	spin_unlock_irqrestore(&il->lock, flags);
3182 
3183 	while (size && PAGE_SIZE - len) {
3184 		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3185 				   PAGE_SIZE - len, true);
3186 		len = strlen(buf);
3187 		if (PAGE_SIZE - len)
3188 			buf[len++] = '\n';
3189 
3190 		ofs += 16;
3191 		size -= min(size, 16U);
3192 	}
3193 
3194 	return len;
3195 }
3196 
3197 static ssize_t
il3945_store_measurement(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3198 il3945_store_measurement(struct device *d, struct device_attribute *attr,
3199 			 const char *buf, size_t count)
3200 {
3201 	struct il_priv *il = dev_get_drvdata(d);
3202 	struct ieee80211_measurement_params params = {
3203 		.channel = le16_to_cpu(il->active.channel),
3204 		.start_time = cpu_to_le64(il->_3945.last_tsf),
3205 		.duration = cpu_to_le16(1),
3206 	};
3207 	u8 type = IL_MEASURE_BASIC;
3208 	u8 buffer[32];
3209 	u8 channel;
3210 
3211 	if (count) {
3212 		char *p = buffer;
3213 		strscpy(buffer, buf, sizeof(buffer));
3214 		channel = simple_strtoul(p, NULL, 0);
3215 		if (channel)
3216 			params.channel = channel;
3217 
3218 		p = buffer;
3219 		while (*p && *p != ' ')
3220 			p++;
3221 		if (*p)
3222 			type = simple_strtoul(p + 1, NULL, 0);
3223 	}
3224 
3225 	D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3226 	       type, params.channel, buf);
3227 	il3945_get_measurement(il, &params, type);
3228 
3229 	return count;
3230 }
3231 
3232 static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
3233 		   il3945_store_measurement);
3234 
3235 static ssize_t
il3945_store_retry_rate(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3236 il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3237 			const char *buf, size_t count)
3238 {
3239 	struct il_priv *il = dev_get_drvdata(d);
3240 
3241 	il->retry_rate = simple_strtoul(buf, NULL, 0);
3242 	if (il->retry_rate <= 0)
3243 		il->retry_rate = 1;
3244 
3245 	return count;
3246 }
3247 
3248 static ssize_t
il3945_show_retry_rate(struct device * d,struct device_attribute * attr,char * buf)3249 il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3250 		       char *buf)
3251 {
3252 	struct il_priv *il = dev_get_drvdata(d);
3253 	return sprintf(buf, "%d", il->retry_rate);
3254 }
3255 
3256 static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
3257 		   il3945_store_retry_rate);
3258 
3259 static ssize_t
il3945_show_channels(struct device * d,struct device_attribute * attr,char * buf)3260 il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3261 {
3262 	/* all this shit doesn't belong into sysfs anyway */
3263 	return 0;
3264 }
3265 
3266 static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
3267 
3268 static ssize_t
il3945_show_antenna(struct device * d,struct device_attribute * attr,char * buf)3269 il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3270 {
3271 	struct il_priv *il = dev_get_drvdata(d);
3272 
3273 	if (!il_is_alive(il))
3274 		return -EAGAIN;
3275 
3276 	return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3277 }
3278 
3279 static ssize_t
il3945_store_antenna(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3280 il3945_store_antenna(struct device *d, struct device_attribute *attr,
3281 		     const char *buf, size_t count)
3282 {
3283 	struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3284 	int ant;
3285 
3286 	if (count == 0)
3287 		return 0;
3288 
3289 	if (sscanf(buf, "%1i", &ant) != 1) {
3290 		D_INFO("not in hex or decimal form.\n");
3291 		return count;
3292 	}
3293 
3294 	if (ant >= 0 && ant <= 2) {
3295 		D_INFO("Setting antenna select to %d.\n", ant);
3296 		il3945_mod_params.antenna = (enum il3945_antenna)ant;
3297 	} else
3298 		D_INFO("Bad antenna select value %d.\n", ant);
3299 
3300 	return count;
3301 }
3302 
3303 static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
3304 
3305 static ssize_t
il3945_show_status(struct device * d,struct device_attribute * attr,char * buf)3306 il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3307 {
3308 	struct il_priv *il = dev_get_drvdata(d);
3309 	if (!il_is_alive(il))
3310 		return -EAGAIN;
3311 	return sprintf(buf, "0x%08x\n", (int)il->status);
3312 }
3313 
3314 static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
3315 
3316 static ssize_t
il3945_dump_error_log(struct device * d,struct device_attribute * attr,const char * buf,size_t count)3317 il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3318 		      const char *buf, size_t count)
3319 {
3320 	struct il_priv *il = dev_get_drvdata(d);
3321 	char *p = (char *)buf;
3322 
3323 	if (p[0] == '1')
3324 		il3945_dump_nic_error_log(il);
3325 
3326 	return strnlen(buf, count);
3327 }
3328 
3329 static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
3330 
3331 /*****************************************************************************
3332  *
3333  * driver setup and tear down
3334  *
3335  *****************************************************************************/
3336 
3337 static int
il3945_setup_deferred_work(struct il_priv * il)3338 il3945_setup_deferred_work(struct il_priv *il)
3339 {
3340 	il->workqueue = create_singlethread_workqueue(DRV_NAME);
3341 	if (!il->workqueue)
3342 		return -ENOMEM;
3343 
3344 	init_waitqueue_head(&il->wait_command_queue);
3345 
3346 	INIT_WORK(&il->restart, il3945_bg_restart);
3347 	INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3348 	INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3349 	INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3350 	INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3351 
3352 	il_setup_scan_deferred_work(il);
3353 
3354 	il3945_hw_setup_deferred_work(il);
3355 
3356 	timer_setup(&il->watchdog, il_bg_watchdog, 0);
3357 
3358 	tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet);
3359 
3360 	return 0;
3361 }
3362 
3363 static void
il3945_cancel_deferred_work(struct il_priv * il)3364 il3945_cancel_deferred_work(struct il_priv *il)
3365 {
3366 	il3945_hw_cancel_deferred_work(il);
3367 
3368 	cancel_delayed_work_sync(&il->init_alive_start);
3369 	cancel_delayed_work(&il->alive_start);
3370 
3371 	il_cancel_scan_deferred_work(il);
3372 }
3373 
3374 static struct attribute *il3945_sysfs_entries[] = {
3375 	&dev_attr_antenna.attr,
3376 	&dev_attr_channels.attr,
3377 	&dev_attr_dump_errors.attr,
3378 	&dev_attr_flags.attr,
3379 	&dev_attr_filter_flags.attr,
3380 	&dev_attr_measurement.attr,
3381 	&dev_attr_retry_rate.attr,
3382 	&dev_attr_status.attr,
3383 	&dev_attr_temperature.attr,
3384 	&dev_attr_tx_power.attr,
3385 #ifdef CONFIG_IWLEGACY_DEBUG
3386 	&dev_attr_debug_level.attr,
3387 #endif
3388 	NULL
3389 };
3390 
3391 static const struct attribute_group il3945_attribute_group = {
3392 	.name = NULL,		/* put in device directory */
3393 	.attrs = il3945_sysfs_entries,
3394 };
3395 
3396 static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
3397 	.add_chanctx = ieee80211_emulate_add_chanctx,
3398 	.remove_chanctx = ieee80211_emulate_remove_chanctx,
3399 	.change_chanctx = ieee80211_emulate_change_chanctx,
3400 	.switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
3401 	.tx = il3945_mac_tx,
3402 	.wake_tx_queue = ieee80211_handle_wake_tx_queue,
3403 	.start = il3945_mac_start,
3404 	.stop = il3945_mac_stop,
3405 	.add_interface = il_mac_add_interface,
3406 	.remove_interface = il_mac_remove_interface,
3407 	.change_interface = il_mac_change_interface,
3408 	.config = il_mac_config,
3409 	.configure_filter = il3945_configure_filter,
3410 	.set_key = il3945_mac_set_key,
3411 	.conf_tx = il_mac_conf_tx,
3412 	.reset_tsf = il_mac_reset_tsf,
3413 	.bss_info_changed = il_mac_bss_info_changed,
3414 	.hw_scan = il_mac_hw_scan,
3415 	.sta_add = il3945_mac_sta_add,
3416 	.sta_remove = il_mac_sta_remove,
3417 	.tx_last_beacon = il_mac_tx_last_beacon,
3418 	.flush = il_mac_flush,
3419 };
3420 
3421 static int
il3945_init_drv(struct il_priv * il)3422 il3945_init_drv(struct il_priv *il)
3423 {
3424 	int ret;
3425 	struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3426 
3427 	il->retry_rate = 1;
3428 	il->beacon_skb = NULL;
3429 
3430 	spin_lock_init(&il->sta_lock);
3431 	spin_lock_init(&il->hcmd_lock);
3432 
3433 	INIT_LIST_HEAD(&il->free_frames);
3434 
3435 	mutex_init(&il->mutex);
3436 
3437 	il->ieee_channels = NULL;
3438 	il->ieee_rates = NULL;
3439 	il->band = NL80211_BAND_2GHZ;
3440 
3441 	il->iw_mode = NL80211_IFTYPE_STATION;
3442 	il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3443 
3444 	/* initialize force reset */
3445 	il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3446 
3447 	if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3448 		IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3449 			eeprom->version);
3450 		ret = -EINVAL;
3451 		goto err;
3452 	}
3453 	ret = il_init_channel_map(il);
3454 	if (ret) {
3455 		IL_ERR("initializing regulatory failed: %d\n", ret);
3456 		goto err;
3457 	}
3458 
3459 	/* Set up txpower settings in driver for all channels */
3460 	if (il3945_txpower_set_from_eeprom(il)) {
3461 		ret = -EIO;
3462 		goto err_free_channel_map;
3463 	}
3464 
3465 	ret = il_init_geos(il);
3466 	if (ret) {
3467 		IL_ERR("initializing geos failed: %d\n", ret);
3468 		goto err_free_channel_map;
3469 	}
3470 	il3945_init_hw_rates(il, il->ieee_rates);
3471 
3472 	return 0;
3473 
3474 err_free_channel_map:
3475 	il_free_channel_map(il);
3476 err:
3477 	return ret;
3478 }
3479 
3480 #define IL3945_MAX_PROBE_REQUEST	200
3481 
3482 static int
il3945_setup_mac(struct il_priv * il)3483 il3945_setup_mac(struct il_priv *il)
3484 {
3485 	int ret;
3486 	struct ieee80211_hw *hw = il->hw;
3487 
3488 	hw->rate_control_algorithm = "iwl-3945-rs";
3489 	hw->sta_data_size = sizeof(struct il3945_sta_priv);
3490 	hw->vif_data_size = sizeof(struct il_vif_priv);
3491 
3492 	/* Tell mac80211 our characteristics */
3493 	ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3494 	ieee80211_hw_set(hw, SUPPORTS_PS);
3495 	ieee80211_hw_set(hw, SIGNAL_DBM);
3496 	ieee80211_hw_set(hw, SPECTRUM_MGMT);
3497 
3498 	hw->wiphy->interface_modes =
3499 	    BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3500 
3501 	hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
3502 	hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
3503 				       REGULATORY_DISABLE_BEACON_HINTS;
3504 
3505 	hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3506 
3507 	hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3508 	/* we create the 802.11 header and a zero-length SSID element */
3509 	hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3510 
3511 	/* Default value; 4 EDCA QOS priorities */
3512 	hw->queues = 4;
3513 
3514 	if (il->bands[NL80211_BAND_2GHZ].n_channels)
3515 		il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
3516 		    &il->bands[NL80211_BAND_2GHZ];
3517 
3518 	if (il->bands[NL80211_BAND_5GHZ].n_channels)
3519 		il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
3520 		    &il->bands[NL80211_BAND_5GHZ];
3521 
3522 	il_leds_init(il);
3523 
3524 	wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3525 
3526 	ret = ieee80211_register_hw(il->hw);
3527 	if (ret) {
3528 		IL_ERR("Failed to register hw (error %d)\n", ret);
3529 		return ret;
3530 	}
3531 	il->mac80211_registered = 1;
3532 
3533 	return 0;
3534 }
3535 
3536 static int
il3945_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)3537 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3538 {
3539 	int err = 0;
3540 	struct il_priv *il;
3541 	struct ieee80211_hw *hw;
3542 	struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3543 	struct il3945_eeprom *eeprom;
3544 	unsigned long flags;
3545 
3546 	/***********************
3547 	 * 1. Allocating HW data
3548 	 * ********************/
3549 
3550 	hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3551 	if (!hw) {
3552 		err = -ENOMEM;
3553 		goto out;
3554 	}
3555 	il = hw->priv;
3556 	il->hw = hw;
3557 	SET_IEEE80211_DEV(hw, &pdev->dev);
3558 
3559 	il->cmd_queue = IL39_CMD_QUEUE_NUM;
3560 
3561 	D_INFO("*** LOAD DRIVER ***\n");
3562 	il->cfg = cfg;
3563 	il->ops = &il3945_ops;
3564 #ifdef CONFIG_IWLEGACY_DEBUGFS
3565 	il->debugfs_ops = &il3945_debugfs_ops;
3566 #endif
3567 	il->pci_dev = pdev;
3568 	il->inta_mask = CSR_INI_SET_MASK;
3569 
3570 	/***************************
3571 	 * 2. Initializing PCI bus
3572 	 * *************************/
3573 	pci_disable_link_state(pdev,
3574 			       PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3575 			       PCIE_LINK_STATE_CLKPM);
3576 
3577 	if (pci_enable_device(pdev)) {
3578 		err = -ENODEV;
3579 		goto out_ieee80211_free_hw;
3580 	}
3581 
3582 	pci_set_master(pdev);
3583 
3584 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3585 	if (err) {
3586 		IL_WARN("No suitable DMA available.\n");
3587 		goto out_pci_disable_device;
3588 	}
3589 
3590 	pci_set_drvdata(pdev, il);
3591 	err = pci_request_regions(pdev, DRV_NAME);
3592 	if (err)
3593 		goto out_pci_disable_device;
3594 
3595 	/***********************
3596 	 * 3. Read REV Register
3597 	 * ********************/
3598 	il->hw_base = pci_ioremap_bar(pdev, 0);
3599 	if (!il->hw_base) {
3600 		err = -ENODEV;
3601 		goto out_pci_release_regions;
3602 	}
3603 
3604 	D_INFO("pci_resource_len = 0x%08llx\n",
3605 	       (unsigned long long)pci_resource_len(pdev, 0));
3606 	D_INFO("pci_resource_base = %p\n", il->hw_base);
3607 
3608 	/* We disable the RETRY_TIMEOUT register (0x41) to keep
3609 	 * PCI Tx retries from interfering with C3 CPU state */
3610 	pci_write_config_byte(pdev, 0x41, 0x00);
3611 
3612 	/* these spin locks will be used in apm_init and EEPROM access
3613 	 * we should init now
3614 	 */
3615 	spin_lock_init(&il->reg_lock);
3616 	spin_lock_init(&il->lock);
3617 
3618 	/*
3619 	 * stop and reset the on-board processor just in case it is in a
3620 	 * strange state ... like being left stranded by a primary kernel
3621 	 * and this is now the kdump kernel trying to start up
3622 	 */
3623 	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3624 
3625 	/***********************
3626 	 * 4. Read EEPROM
3627 	 * ********************/
3628 
3629 	/* Read the EEPROM */
3630 	err = il_eeprom_init(il);
3631 	if (err) {
3632 		IL_ERR("Unable to init EEPROM\n");
3633 		goto out_iounmap;
3634 	}
3635 	/* MAC Address location in EEPROM same for 3945/4965 */
3636 	eeprom = (struct il3945_eeprom *)il->eeprom;
3637 	D_INFO("MAC address: %pM\n", eeprom->mac_address);
3638 	SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3639 
3640 	/***********************
3641 	 * 5. Setup HW Constants
3642 	 * ********************/
3643 	/* Device-specific setup */
3644 	err = il3945_hw_set_hw_params(il);
3645 	if (err) {
3646 		IL_ERR("failed to set hw settings\n");
3647 		goto out_eeprom_free;
3648 	}
3649 
3650 	/***********************
3651 	 * 6. Setup il
3652 	 * ********************/
3653 
3654 	err = il3945_init_drv(il);
3655 	if (err) {
3656 		IL_ERR("initializing driver failed\n");
3657 		goto out_unset_hw_params;
3658 	}
3659 
3660 	IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3661 
3662 	/***********************
3663 	 * 7. Setup Services
3664 	 * ********************/
3665 
3666 	spin_lock_irqsave(&il->lock, flags);
3667 	il_disable_interrupts(il);
3668 	spin_unlock_irqrestore(&il->lock, flags);
3669 
3670 	pci_enable_msi(il->pci_dev);
3671 
3672 	err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3673 	if (err) {
3674 		IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3675 		goto out_disable_msi;
3676 	}
3677 
3678 	err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3679 	if (err) {
3680 		IL_ERR("failed to create sysfs device attributes\n");
3681 		goto out_release_irq;
3682 	}
3683 
3684 	il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3685 	err = il3945_setup_deferred_work(il);
3686 	if (err)
3687 		goto out_remove_sysfs;
3688 
3689 	il3945_setup_handlers(il);
3690 	il_power_initialize(il);
3691 
3692 	/*********************************
3693 	 * 8. Setup and Register mac80211
3694 	 * *******************************/
3695 
3696 	il_enable_interrupts(il);
3697 
3698 	err = il3945_setup_mac(il);
3699 	if (err)
3700 		goto out_destroy_workqueue;
3701 
3702 	il_dbgfs_register(il, DRV_NAME);
3703 
3704 	/* Start monitoring the killswitch */
3705 	queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3706 
3707 	return 0;
3708 
3709 out_destroy_workqueue:
3710 	destroy_workqueue(il->workqueue);
3711 	il->workqueue = NULL;
3712 out_remove_sysfs:
3713 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3714 out_release_irq:
3715 	free_irq(il->pci_dev->irq, il);
3716 out_disable_msi:
3717 	pci_disable_msi(il->pci_dev);
3718 	il_free_geos(il);
3719 	il_free_channel_map(il);
3720 out_unset_hw_params:
3721 	il3945_unset_hw_params(il);
3722 out_eeprom_free:
3723 	il_eeprom_free(il);
3724 out_iounmap:
3725 	iounmap(il->hw_base);
3726 out_pci_release_regions:
3727 	pci_release_regions(pdev);
3728 out_pci_disable_device:
3729 	pci_disable_device(pdev);
3730 out_ieee80211_free_hw:
3731 	ieee80211_free_hw(il->hw);
3732 out:
3733 	return err;
3734 }
3735 
3736 static void
il3945_pci_remove(struct pci_dev * pdev)3737 il3945_pci_remove(struct pci_dev *pdev)
3738 {
3739 	struct il_priv *il = pci_get_drvdata(pdev);
3740 	unsigned long flags;
3741 
3742 	if (!il)
3743 		return;
3744 
3745 	D_INFO("*** UNLOAD DRIVER ***\n");
3746 
3747 	il_dbgfs_unregister(il);
3748 
3749 	set_bit(S_EXIT_PENDING, &il->status);
3750 
3751 	il_leds_exit(il);
3752 
3753 	if (il->mac80211_registered) {
3754 		ieee80211_unregister_hw(il->hw);
3755 		il->mac80211_registered = 0;
3756 	} else {
3757 		il3945_down(il);
3758 	}
3759 
3760 	/*
3761 	 * Make sure device is reset to low power before unloading driver.
3762 	 * This may be redundant with il_down(), but there are paths to
3763 	 * run il_down() without calling apm_ops.stop(), and there are
3764 	 * paths to avoid running il_down() at all before leaving driver.
3765 	 * This (inexpensive) call *makes sure* device is reset.
3766 	 */
3767 	il_apm_stop(il);
3768 
3769 	/* make sure we flush any pending irq or
3770 	 * tasklet for the driver
3771 	 */
3772 	spin_lock_irqsave(&il->lock, flags);
3773 	il_disable_interrupts(il);
3774 	spin_unlock_irqrestore(&il->lock, flags);
3775 
3776 	il3945_synchronize_irq(il);
3777 
3778 	sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3779 
3780 	cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3781 
3782 	il3945_dealloc_ucode_pci(il);
3783 
3784 	if (il->rxq.bd)
3785 		il3945_rx_queue_free(il, &il->rxq);
3786 	il3945_hw_txq_ctx_free(il);
3787 
3788 	il3945_unset_hw_params(il);
3789 
3790 	/*netif_stop_queue(dev); */
3791 
3792 	/* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3793 	 * il->workqueue... so we can't take down the workqueue
3794 	 * until now... */
3795 	destroy_workqueue(il->workqueue);
3796 	il->workqueue = NULL;
3797 
3798 	free_irq(pdev->irq, il);
3799 	pci_disable_msi(pdev);
3800 
3801 	iounmap(il->hw_base);
3802 	pci_release_regions(pdev);
3803 	pci_disable_device(pdev);
3804 
3805 	il_free_channel_map(il);
3806 	il_free_geos(il);
3807 	kfree(il->scan_cmd);
3808 	dev_kfree_skb(il->beacon_skb);
3809 	ieee80211_free_hw(il->hw);
3810 }
3811 
3812 /*****************************************************************************
3813  *
3814  * driver and module entry point
3815  *
3816  *****************************************************************************/
3817 
3818 static struct pci_driver il3945_driver = {
3819 	.name = DRV_NAME,
3820 	.id_table = il3945_hw_card_ids,
3821 	.probe = il3945_pci_probe,
3822 	.remove = il3945_pci_remove,
3823 	.driver.pm = IL_LEGACY_PM_OPS,
3824 };
3825 
3826 static int __init
il3945_init(void)3827 il3945_init(void)
3828 {
3829 
3830 	int ret;
3831 	pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3832 	pr_info(DRV_COPYRIGHT "\n");
3833 
3834 	/*
3835 	 * Disabling hardware scan means that mac80211 will perform scans
3836 	 * "the hard way", rather than using device's scan.
3837 	 */
3838 	if (il3945_mod_params.disable_hw_scan) {
3839 		pr_info("hw_scan is disabled\n");
3840 		il3945_mac_ops.hw_scan = NULL;
3841 	}
3842 
3843 	ret = il3945_rate_control_register();
3844 	if (ret) {
3845 		pr_err("Unable to register rate control algorithm: %d\n", ret);
3846 		return ret;
3847 	}
3848 
3849 	ret = pci_register_driver(&il3945_driver);
3850 	if (ret) {
3851 		pr_err("Unable to initialize PCI module\n");
3852 		goto error_register;
3853 	}
3854 
3855 	return ret;
3856 
3857 error_register:
3858 	il3945_rate_control_unregister();
3859 	return ret;
3860 }
3861 
3862 static void __exit
il3945_exit(void)3863 il3945_exit(void)
3864 {
3865 	pci_unregister_driver(&il3945_driver);
3866 	il3945_rate_control_unregister();
3867 }
3868 
3869 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3870 
3871 module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
3872 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3873 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
3874 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3875 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3876 		   0444);
3877 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3878 #ifdef CONFIG_IWLEGACY_DEBUG
3879 module_param_named(debug, il_debug_level, uint, 0644);
3880 MODULE_PARM_DESC(debug, "debug output mask");
3881 #endif
3882 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
3883 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3884 
3885 module_exit(il3945_exit);
3886 module_init(il3945_init);
3887