1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2024 Hisilicon Limited.
3 
4 #include <linux/etherdevice.h>
5 #include <linux/netdevice.h>
6 #include <linux/phy.h>
7 #include <linux/rtnetlink.h>
8 #include "hbg_common.h"
9 #include "hbg_err.h"
10 #include "hbg_hw.h"
11 
hbg_restore_mac_table(struct hbg_priv * priv)12 static void hbg_restore_mac_table(struct hbg_priv *priv)
13 {
14 	struct hbg_mac_filter *filter = &priv->filter;
15 	u64 addr;
16 	u32 i;
17 
18 	for (i = 0; i < filter->table_max_len; i++)
19 		if (!is_zero_ether_addr(filter->mac_table[i].addr)) {
20 			addr = ether_addr_to_u64(filter->mac_table[i].addr);
21 			hbg_hw_set_uc_addr(priv, addr, i);
22 		}
23 
24 	hbg_hw_set_mac_filter_enable(priv, priv->filter.enabled);
25 }
26 
hbg_restore_user_def_settings(struct hbg_priv * priv)27 static void hbg_restore_user_def_settings(struct hbg_priv *priv)
28 {
29 	/* The index of host mac is always 0. */
30 	u64 rx_pause_addr = ether_addr_to_u64(priv->filter.mac_table[0].addr);
31 	struct ethtool_pauseparam *pause_param = &priv->user_def.pause_param;
32 
33 	hbg_restore_mac_table(priv);
34 	hbg_hw_set_mtu(priv, priv->netdev->mtu);
35 	hbg_hw_set_pause_enable(priv, pause_param->tx_pause,
36 				pause_param->rx_pause);
37 	hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr);
38 }
39 
hbg_rebuild(struct hbg_priv * priv)40 int hbg_rebuild(struct hbg_priv *priv)
41 {
42 	int ret;
43 
44 	ret = hbg_hw_init(priv);
45 	if (ret)
46 		return ret;
47 
48 	hbg_restore_user_def_settings(priv);
49 	return 0;
50 }
51 
hbg_reset_prepare(struct hbg_priv * priv,enum hbg_reset_type type)52 static int hbg_reset_prepare(struct hbg_priv *priv, enum hbg_reset_type type)
53 {
54 	int ret;
55 
56 	ASSERT_RTNL();
57 
58 	if (netif_running(priv->netdev)) {
59 		dev_warn(&priv->pdev->dev,
60 			 "failed to reset because port is up\n");
61 		return -EBUSY;
62 	}
63 
64 	priv->reset_type = type;
65 	set_bit(HBG_NIC_STATE_RESETTING, &priv->state);
66 	clear_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state);
67 	ret = hbg_hw_event_notify(priv, HBG_HW_EVENT_RESET);
68 	if (ret) {
69 		set_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state);
70 		clear_bit(HBG_NIC_STATE_RESETTING, &priv->state);
71 	}
72 
73 	return ret;
74 }
75 
hbg_reset_done(struct hbg_priv * priv,enum hbg_reset_type type)76 static int hbg_reset_done(struct hbg_priv *priv, enum hbg_reset_type type)
77 {
78 	int ret;
79 
80 	if (!test_bit(HBG_NIC_STATE_RESETTING, &priv->state) ||
81 	    type != priv->reset_type)
82 		return 0;
83 
84 	ASSERT_RTNL();
85 
86 	clear_bit(HBG_NIC_STATE_RESETTING, &priv->state);
87 	ret = hbg_rebuild(priv);
88 	if (ret) {
89 		set_bit(HBG_NIC_STATE_RESET_FAIL, &priv->state);
90 		dev_err(&priv->pdev->dev, "failed to rebuild after reset\n");
91 		return ret;
92 	}
93 
94 	dev_info(&priv->pdev->dev, "reset done\n");
95 	return ret;
96 }
97 
98 /* must be protected by rtnl lock */
hbg_reset(struct hbg_priv * priv)99 int hbg_reset(struct hbg_priv *priv)
100 {
101 	int ret;
102 
103 	ASSERT_RTNL();
104 	ret = hbg_reset_prepare(priv, HBG_RESET_TYPE_FUNCTION);
105 	if (ret)
106 		return ret;
107 
108 	return hbg_reset_done(priv, HBG_RESET_TYPE_FUNCTION);
109 }
110 
hbg_pci_err_reset_prepare(struct pci_dev * pdev)111 static void hbg_pci_err_reset_prepare(struct pci_dev *pdev)
112 {
113 	struct net_device *netdev = pci_get_drvdata(pdev);
114 	struct hbg_priv *priv = netdev_priv(netdev);
115 
116 	rtnl_lock();
117 	hbg_reset_prepare(priv, HBG_RESET_TYPE_FLR);
118 }
119 
hbg_pci_err_reset_done(struct pci_dev * pdev)120 static void hbg_pci_err_reset_done(struct pci_dev *pdev)
121 {
122 	struct net_device *netdev = pci_get_drvdata(pdev);
123 	struct hbg_priv *priv = netdev_priv(netdev);
124 
125 	hbg_reset_done(priv, HBG_RESET_TYPE_FLR);
126 	rtnl_unlock();
127 }
128 
129 static const struct pci_error_handlers hbg_pci_err_handler = {
130 	.reset_prepare = hbg_pci_err_reset_prepare,
131 	.reset_done = hbg_pci_err_reset_done,
132 };
133 
hbg_set_pci_err_handler(struct pci_driver * pdrv)134 void hbg_set_pci_err_handler(struct pci_driver *pdrv)
135 {
136 	pdrv->err_handler = &hbg_pci_err_handler;
137 }
138