1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2023 Hisilicon Limited.
4 */
5
6 #include <linux/debugfs.h>
7 #include <linux/device.h>
8 #include <linux/pci.h>
9
10 #include "hns_roce_device.h"
11
12 static struct dentry *hns_roce_dbgfs_root;
13
hns_debugfs_seqfile_open(struct inode * inode,struct file * f)14 static int hns_debugfs_seqfile_open(struct inode *inode, struct file *f)
15 {
16 struct hns_debugfs_seqfile *seqfile = inode->i_private;
17
18 return single_open(f, seqfile->read, seqfile->data);
19 }
20
21 static const struct file_operations hns_debugfs_seqfile_fops = {
22 .owner = THIS_MODULE,
23 .open = hns_debugfs_seqfile_open,
24 .release = single_release,
25 .read = seq_read,
26 .llseek = seq_lseek
27 };
28
init_debugfs_seqfile(struct hns_debugfs_seqfile * seq,const char * name,struct dentry * parent,int (* read_fn)(struct seq_file *,void *),void * data)29 static void init_debugfs_seqfile(struct hns_debugfs_seqfile *seq,
30 const char *name, struct dentry *parent,
31 int (*read_fn)(struct seq_file *, void *),
32 void *data)
33 {
34 debugfs_create_file(name, 0400, parent, seq, &hns_debugfs_seqfile_fops);
35
36 seq->read = read_fn;
37 seq->data = data;
38 }
39
40 static const char * const sw_stat_info[] = {
41 [HNS_ROCE_DFX_AEQE_CNT] = "aeqe",
42 [HNS_ROCE_DFX_CEQE_CNT] = "ceqe",
43 [HNS_ROCE_DFX_CMDS_CNT] = "cmds",
44 [HNS_ROCE_DFX_CMDS_ERR_CNT] = "cmds_err",
45 [HNS_ROCE_DFX_MBX_POSTED_CNT] = "posted_mbx",
46 [HNS_ROCE_DFX_MBX_POLLED_CNT] = "polled_mbx",
47 [HNS_ROCE_DFX_MBX_EVENT_CNT] = "mbx_event",
48 [HNS_ROCE_DFX_QP_CREATE_ERR_CNT] = "qp_create_err",
49 [HNS_ROCE_DFX_QP_MODIFY_ERR_CNT] = "qp_modify_err",
50 [HNS_ROCE_DFX_CQ_CREATE_ERR_CNT] = "cq_create_err",
51 [HNS_ROCE_DFX_CQ_MODIFY_ERR_CNT] = "cq_modify_err",
52 [HNS_ROCE_DFX_SRQ_CREATE_ERR_CNT] = "srq_create_err",
53 [HNS_ROCE_DFX_SRQ_MODIFY_ERR_CNT] = "srq_modify_err",
54 [HNS_ROCE_DFX_XRCD_ALLOC_ERR_CNT] = "xrcd_alloc_err",
55 [HNS_ROCE_DFX_MR_REG_ERR_CNT] = "mr_reg_err",
56 [HNS_ROCE_DFX_MR_REREG_ERR_CNT] = "mr_rereg_err",
57 [HNS_ROCE_DFX_AH_CREATE_ERR_CNT] = "ah_create_err",
58 [HNS_ROCE_DFX_MMAP_ERR_CNT] = "mmap_err",
59 [HNS_ROCE_DFX_UCTX_ALLOC_ERR_CNT] = "uctx_alloc_err",
60 };
61
sw_stat_debugfs_show(struct seq_file * file,void * offset)62 static int sw_stat_debugfs_show(struct seq_file *file, void *offset)
63 {
64 struct hns_roce_dev *hr_dev = file->private;
65 int i;
66
67 for (i = 0; i < HNS_ROCE_DFX_CNT_TOTAL; i++)
68 seq_printf(file, "%-20s --- %lld\n", sw_stat_info[i],
69 atomic64_read(&hr_dev->dfx_cnt[i]));
70
71 return 0;
72 }
73
create_sw_stat_debugfs(struct hns_roce_dev * hr_dev,struct dentry * parent)74 static void create_sw_stat_debugfs(struct hns_roce_dev *hr_dev,
75 struct dentry *parent)
76 {
77 struct hns_sw_stat_debugfs *dbgfs = &hr_dev->dbgfs.sw_stat_root;
78
79 dbgfs->root = debugfs_create_dir("sw_stat", parent);
80
81 init_debugfs_seqfile(&dbgfs->sw_stat, "sw_stat", dbgfs->root,
82 sw_stat_debugfs_show, hr_dev);
83 }
84
85 /* debugfs for device */
hns_roce_register_debugfs(struct hns_roce_dev * hr_dev)86 void hns_roce_register_debugfs(struct hns_roce_dev *hr_dev)
87 {
88 struct hns_roce_dev_debugfs *dbgfs = &hr_dev->dbgfs;
89
90 dbgfs->root = debugfs_create_dir(pci_name(hr_dev->pci_dev),
91 hns_roce_dbgfs_root);
92
93 create_sw_stat_debugfs(hr_dev, dbgfs->root);
94 }
95
hns_roce_unregister_debugfs(struct hns_roce_dev * hr_dev)96 void hns_roce_unregister_debugfs(struct hns_roce_dev *hr_dev)
97 {
98 debugfs_remove_recursive(hr_dev->dbgfs.root);
99 }
100
101 /* debugfs for hns module */
hns_roce_init_debugfs(void)102 void hns_roce_init_debugfs(void)
103 {
104 hns_roce_dbgfs_root = debugfs_create_dir("hns_roce", NULL);
105 }
106
hns_roce_cleanup_debugfs(void)107 void hns_roce_cleanup_debugfs(void)
108 {
109 debugfs_remove_recursive(hns_roce_dbgfs_root);
110 hns_roce_dbgfs_root = NULL;
111 }
112