1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/pm_runtime.h>
7
8 #include <linux/iio/common/inv_sensors_timestamp.h>
9 #include <linux/iio/events.h>
10
11 #include "inv_mpu_iio.h"
12
inv_scan_query_mpu6050(struct iio_dev * indio_dev)13 static unsigned int inv_scan_query_mpu6050(struct iio_dev *indio_dev)
14 {
15 struct inv_mpu6050_state *st = iio_priv(indio_dev);
16 unsigned int mask;
17
18 /*
19 * If the MPU6050 is just used as a trigger, then the scan mask
20 * is not allocated so we simply enable the temperature channel
21 * as a dummy and bail out.
22 */
23 if (!indio_dev->active_scan_mask) {
24 st->chip_config.temp_fifo_enable = true;
25 return INV_MPU6050_SENSOR_TEMP;
26 }
27
28 st->chip_config.gyro_fifo_enable =
29 test_bit(INV_MPU6050_SCAN_GYRO_X,
30 indio_dev->active_scan_mask) ||
31 test_bit(INV_MPU6050_SCAN_GYRO_Y,
32 indio_dev->active_scan_mask) ||
33 test_bit(INV_MPU6050_SCAN_GYRO_Z,
34 indio_dev->active_scan_mask);
35
36 st->chip_config.accl_fifo_enable =
37 test_bit(INV_MPU6050_SCAN_ACCL_X,
38 indio_dev->active_scan_mask) ||
39 test_bit(INV_MPU6050_SCAN_ACCL_Y,
40 indio_dev->active_scan_mask) ||
41 test_bit(INV_MPU6050_SCAN_ACCL_Z,
42 indio_dev->active_scan_mask);
43
44 st->chip_config.temp_fifo_enable =
45 test_bit(INV_MPU6050_SCAN_TEMP, indio_dev->active_scan_mask);
46
47 mask = 0;
48 if (st->chip_config.gyro_fifo_enable)
49 mask |= INV_MPU6050_SENSOR_GYRO;
50 if (st->chip_config.accl_fifo_enable)
51 mask |= INV_MPU6050_SENSOR_ACCL;
52 if (st->chip_config.temp_fifo_enable)
53 mask |= INV_MPU6050_SENSOR_TEMP;
54
55 return mask;
56 }
57
inv_scan_query_mpu9x50(struct iio_dev * indio_dev)58 static unsigned int inv_scan_query_mpu9x50(struct iio_dev *indio_dev)
59 {
60 struct inv_mpu6050_state *st = iio_priv(indio_dev);
61 unsigned int mask;
62
63 mask = inv_scan_query_mpu6050(indio_dev);
64
65 /* no magnetometer if i2c auxiliary bus is used */
66 if (st->magn_disabled)
67 return mask;
68
69 st->chip_config.magn_fifo_enable =
70 test_bit(INV_MPU9X50_SCAN_MAGN_X,
71 indio_dev->active_scan_mask) ||
72 test_bit(INV_MPU9X50_SCAN_MAGN_Y,
73 indio_dev->active_scan_mask) ||
74 test_bit(INV_MPU9X50_SCAN_MAGN_Z,
75 indio_dev->active_scan_mask);
76 if (st->chip_config.magn_fifo_enable)
77 mask |= INV_MPU6050_SENSOR_MAGN;
78
79 return mask;
80 }
81
inv_scan_query(struct iio_dev * indio_dev)82 static unsigned int inv_scan_query(struct iio_dev *indio_dev)
83 {
84 struct inv_mpu6050_state *st = iio_priv(indio_dev);
85
86 switch (st->chip_type) {
87 case INV_MPU9150:
88 case INV_MPU9250:
89 case INV_MPU9255:
90 return inv_scan_query_mpu9x50(indio_dev);
91 default:
92 return inv_scan_query_mpu6050(indio_dev);
93 }
94 }
95
inv_compute_skip_samples(const struct inv_mpu6050_state * st)96 static unsigned int inv_compute_skip_samples(const struct inv_mpu6050_state *st)
97 {
98 unsigned int skip_samples = 0;
99
100 /* mag first sample is always not ready, skip it */
101 if (st->chip_config.magn_fifo_enable)
102 skip_samples = 1;
103
104 return skip_samples;
105 }
106
inv_mpu6050_prepare_fifo(struct inv_mpu6050_state * st,bool enable)107 int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
108 {
109 uint8_t d;
110 int ret;
111
112 if (enable) {
113 /* reset timestamping */
114 inv_sensors_timestamp_reset(&st->timestamp);
115 /* reset FIFO */
116 d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
117 ret = regmap_write(st->map, st->reg->user_ctrl, d);
118 if (ret)
119 return ret;
120 /* enable sensor output to FIFO */
121 d = 0;
122 if (st->chip_config.gyro_fifo_enable)
123 d |= INV_MPU6050_BITS_GYRO_OUT;
124 if (st->chip_config.accl_fifo_enable)
125 d |= INV_MPU6050_BIT_ACCEL_OUT;
126 if (st->chip_config.temp_fifo_enable)
127 d |= INV_MPU6050_BIT_TEMP_OUT;
128 if (st->chip_config.magn_fifo_enable)
129 d |= INV_MPU6050_BIT_SLAVE_0;
130 ret = regmap_write(st->map, st->reg->fifo_en, d);
131 if (ret)
132 return ret;
133 /* enable FIFO reading */
134 d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_EN;
135 ret = regmap_write(st->map, st->reg->user_ctrl, d);
136 if (ret)
137 return ret;
138 /* enable data interrupt */
139 ret = regmap_update_bits(st->map, st->reg->int_enable,
140 INV_MPU6050_BIT_DATA_RDY_EN, INV_MPU6050_BIT_DATA_RDY_EN);
141 } else {
142 /* disable data interrupt */
143 ret = regmap_update_bits(st->map, st->reg->int_enable,
144 INV_MPU6050_BIT_DATA_RDY_EN, 0);
145 if (ret)
146 return ret;
147 ret = regmap_write(st->map, st->reg->fifo_en, 0);
148 if (ret)
149 return ret;
150 /* restore user_ctrl for disabling FIFO reading */
151 ret = regmap_write(st->map, st->reg->user_ctrl,
152 st->chip_config.user_ctrl);
153 }
154
155 return ret;
156 }
157
158 /**
159 * inv_mpu6050_set_enable() - enable chip functions.
160 * @indio_dev: Device driver instance.
161 * @enable: enable/disable
162 */
inv_mpu6050_set_enable(struct iio_dev * indio_dev,bool enable)163 static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
164 {
165 struct inv_mpu6050_state *st = iio_priv(indio_dev);
166 struct device *pdev = regmap_get_device(st->map);
167 unsigned int scan;
168 int result;
169
170 if (enable) {
171 scan = inv_scan_query(indio_dev);
172 result = pm_runtime_resume_and_get(pdev);
173 if (result)
174 return result;
175 /*
176 * In case autosuspend didn't trigger, turn off first not
177 * required sensors excepted WoM
178 */
179 result = inv_mpu6050_switch_engine(st, false, ~scan & ~INV_MPU6050_SENSOR_WOM);
180 if (result)
181 goto error_power_off;
182 result = inv_mpu6050_switch_engine(st, true, scan);
183 if (result)
184 goto error_power_off;
185 st->skip_samples = inv_compute_skip_samples(st);
186 result = inv_mpu6050_prepare_fifo(st, true);
187 if (result)
188 goto error_power_off;
189 } else {
190 st->chip_config.gyro_fifo_enable = 0;
191 st->chip_config.accl_fifo_enable = 0;
192 st->chip_config.temp_fifo_enable = 0;
193 st->chip_config.magn_fifo_enable = 0;
194 result = inv_mpu6050_prepare_fifo(st, false);
195 if (result)
196 goto error_power_off;
197 pm_runtime_mark_last_busy(pdev);
198 pm_runtime_put_autosuspend(pdev);
199 }
200
201 return 0;
202
203 error_power_off:
204 pm_runtime_put_autosuspend(pdev);
205 return result;
206 }
207
208 /**
209 * inv_mpu_data_rdy_trigger_set_state() - set data ready interrupt state
210 * @trig: Trigger instance
211 * @state: Desired trigger state
212 */
inv_mpu_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)213 static int inv_mpu_data_rdy_trigger_set_state(struct iio_trigger *trig,
214 bool state)
215 {
216 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
217 struct inv_mpu6050_state *st = iio_priv(indio_dev);
218 int result;
219
220 mutex_lock(&st->lock);
221 result = inv_mpu6050_set_enable(indio_dev, state);
222 mutex_unlock(&st->lock);
223
224 return result;
225 }
226
227 static const struct iio_trigger_ops inv_mpu_trigger_ops = {
228 .set_trigger_state = &inv_mpu_data_rdy_trigger_set_state,
229 };
230
inv_mpu6050_interrupt_timestamp(int irq,void * p)231 static irqreturn_t inv_mpu6050_interrupt_timestamp(int irq, void *p)
232 {
233 struct iio_dev *indio_dev = p;
234 struct inv_mpu6050_state *st = iio_priv(indio_dev);
235
236 st->it_timestamp = iio_get_time_ns(indio_dev);
237
238 return IRQ_WAKE_THREAD;
239 }
240
inv_mpu6050_interrupt_handle(int irq,void * p)241 static irqreturn_t inv_mpu6050_interrupt_handle(int irq, void *p)
242 {
243 struct iio_dev *indio_dev = p;
244 struct inv_mpu6050_state *st = iio_priv(indio_dev);
245 unsigned int int_status, wom_bits;
246 u64 ev_code;
247 int result;
248
249 switch (st->chip_type) {
250 case INV_MPU6000:
251 case INV_MPU6050:
252 case INV_MPU9150:
253 /*
254 * WoM is not supported and interrupt status read seems to be broken for
255 * some chips. Since data ready is the only interrupt, bypass interrupt
256 * status read and always assert data ready bit.
257 */
258 wom_bits = 0;
259 int_status = INV_MPU6050_BIT_RAW_DATA_RDY_INT;
260 goto data_ready_interrupt;
261 case INV_MPU6500:
262 case INV_MPU6515:
263 case INV_MPU6880:
264 case INV_MPU9250:
265 case INV_MPU9255:
266 wom_bits = INV_MPU6500_BIT_WOM_INT;
267 break;
268 default:
269 wom_bits = INV_ICM20608_BIT_WOM_INT;
270 break;
271 }
272
273 scoped_guard(mutex, &st->lock) {
274 /* ack interrupt and check status */
275 result = regmap_read(st->map, st->reg->int_status, &int_status);
276 if (result) {
277 dev_err(regmap_get_device(st->map), "failed to ack interrupt\n");
278 return IRQ_HANDLED;
279 }
280
281 /* handle WoM event */
282 if (st->chip_config.wom_en && (int_status & wom_bits)) {
283 ev_code = IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X_OR_Y_OR_Z,
284 IIO_EV_TYPE_ROC, IIO_EV_DIR_RISING);
285 iio_push_event(indio_dev, ev_code, st->it_timestamp);
286 }
287 }
288
289 data_ready_interrupt:
290 /* handle raw data interrupt */
291 if (int_status & INV_MPU6050_BIT_RAW_DATA_RDY_INT) {
292 indio_dev->pollfunc->timestamp = st->it_timestamp;
293 iio_trigger_poll_nested(st->trig);
294 }
295
296 return IRQ_HANDLED;
297 }
298
inv_mpu6050_probe_trigger(struct iio_dev * indio_dev,int irq_type)299 int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type)
300 {
301 int ret;
302 struct inv_mpu6050_state *st = iio_priv(indio_dev);
303
304 st->trig = devm_iio_trigger_alloc(&indio_dev->dev,
305 "%s-dev%d",
306 indio_dev->name,
307 iio_device_id(indio_dev));
308 if (!st->trig)
309 return -ENOMEM;
310
311 irq_type |= IRQF_ONESHOT;
312 ret = devm_request_threaded_irq(&indio_dev->dev, st->irq,
313 &inv_mpu6050_interrupt_timestamp,
314 &inv_mpu6050_interrupt_handle,
315 irq_type, "inv_mpu", indio_dev);
316 if (ret)
317 return ret;
318
319 st->trig->dev.parent = regmap_get_device(st->map);
320 st->trig->ops = &inv_mpu_trigger_ops;
321 iio_trigger_set_drvdata(st->trig, indio_dev);
322
323 ret = devm_iio_trigger_register(&indio_dev->dev, st->trig);
324 if (ret)
325 return ret;
326
327 indio_dev->trig = iio_trigger_get(st->trig);
328
329 return 0;
330 }
331