1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for Jedec 5118 compliant temperature sensors
4 *
5 * Derived from https://github.com/Steve-Tech/SPD5118-DKMS
6 * Originally from T/2 driver at https://t2sde.org/packages/linux
7 * Copyright (c) 2023 René Rebe, ExactCODE GmbH; Germany.
8 *
9 * Copyright (c) 2024 Guenter Roeck
10 *
11 * Inspired by ee1004.c and jc42.c.
12 *
13 * SPD5118 compliant temperature sensors are typically used on DDR5
14 * memory modules.
15 */
16
17 #include <linux/bitops.h>
18 #include <linux/bits.h>
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/hwmon.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/nvmem-provider.h>
25 #include <linux/pm.h>
26 #include <linux/regmap.h>
27 #include <linux/units.h>
28
29 /* Addresses to scan */
30 static const unsigned short normal_i2c[] = {
31 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, I2C_CLIENT_END };
32
33 /* SPD5118 registers. */
34 #define SPD5118_REG_TYPE 0x00 /* MR0:MR1 */
35 #define SPD5118_REG_REVISION 0x02 /* MR2 */
36 #define SPD5118_REG_VENDOR 0x03 /* MR3:MR4 */
37 #define SPD5118_REG_CAPABILITY 0x05 /* MR5 */
38 #define SPD5118_REG_I2C_LEGACY_MODE 0x0B /* MR11 */
39 #define SPD5118_REG_TEMP_CLR 0x13 /* MR19 */
40 #define SPD5118_REG_ERROR_CLR 0x14 /* MR20 */
41 #define SPD5118_REG_TEMP_CONFIG 0x1A /* MR26 */
42 #define SPD5118_REG_TEMP_MAX 0x1c /* MR28:MR29 */
43 #define SPD5118_REG_TEMP_MIN 0x1e /* MR30:MR31 */
44 #define SPD5118_REG_TEMP_CRIT 0x20 /* MR32:MR33 */
45 #define SPD5118_REG_TEMP_LCRIT 0x22 /* MR34:MR35 */
46 #define SPD5118_REG_TEMP 0x31 /* MR49:MR50 */
47 #define SPD5118_REG_TEMP_STATUS 0x33 /* MR51 */
48
49 #define SPD5118_TEMP_STATUS_HIGH BIT(0)
50 #define SPD5118_TEMP_STATUS_LOW BIT(1)
51 #define SPD5118_TEMP_STATUS_CRIT BIT(2)
52 #define SPD5118_TEMP_STATUS_LCRIT BIT(3)
53
54 #define SPD5118_CAP_TS_SUPPORT BIT(1) /* temperature sensor support */
55
56 #define SPD5118_TS_DISABLE BIT(0) /* temperature sensor disable */
57
58 #define SPD5118_LEGACY_MODE_ADDR BIT(3)
59 #define SPD5118_LEGACY_PAGE_MASK GENMASK(2, 0)
60 #define SPD5118_LEGACY_MODE_MASK (SPD5118_LEGACY_MODE_ADDR | SPD5118_LEGACY_PAGE_MASK)
61
62 #define SPD5118_NUM_PAGES 8
63 #define SPD5118_PAGE_SIZE 128
64 #define SPD5118_PAGE_SHIFT 7
65 #define SPD5118_PAGE_MASK GENMASK(6, 0)
66 #define SPD5118_EEPROM_BASE 0x80
67 #define SPD5118_EEPROM_SIZE (SPD5118_PAGE_SIZE * SPD5118_NUM_PAGES)
68
69 /* Temperature unit in millicelsius */
70 #define SPD5118_TEMP_UNIT (MILLIDEGREE_PER_DEGREE / 4)
71 /* Representable temperature range in millicelsius */
72 #define SPD5118_TEMP_RANGE_MIN -256000
73 #define SPD5118_TEMP_RANGE_MAX 255750
74
75 struct spd5118_data {
76 struct regmap *regmap;
77 struct mutex nvmem_lock;
78 };
79
80 /* hwmon */
81
spd5118_temp_from_reg(u16 reg)82 static int spd5118_temp_from_reg(u16 reg)
83 {
84 int temp = sign_extend32(reg >> 2, 10);
85
86 return temp * SPD5118_TEMP_UNIT;
87 }
88
spd5118_temp_to_reg(long temp)89 static u16 spd5118_temp_to_reg(long temp)
90 {
91 temp = clamp_val(temp, SPD5118_TEMP_RANGE_MIN, SPD5118_TEMP_RANGE_MAX);
92 return (DIV_ROUND_CLOSEST(temp, SPD5118_TEMP_UNIT) & 0x7ff) << 2;
93 }
94
spd5118_read_temp(struct regmap * regmap,u32 attr,long * val)95 static int spd5118_read_temp(struct regmap *regmap, u32 attr, long *val)
96 {
97 int reg, err;
98 u8 regval[2];
99 u16 temp;
100
101 switch (attr) {
102 case hwmon_temp_input:
103 reg = SPD5118_REG_TEMP;
104 break;
105 case hwmon_temp_max:
106 reg = SPD5118_REG_TEMP_MAX;
107 break;
108 case hwmon_temp_min:
109 reg = SPD5118_REG_TEMP_MIN;
110 break;
111 case hwmon_temp_crit:
112 reg = SPD5118_REG_TEMP_CRIT;
113 break;
114 case hwmon_temp_lcrit:
115 reg = SPD5118_REG_TEMP_LCRIT;
116 break;
117 default:
118 return -EOPNOTSUPP;
119 }
120
121 err = regmap_bulk_read(regmap, reg, regval, 2);
122 if (err)
123 return err;
124
125 temp = (regval[1] << 8) | regval[0];
126
127 *val = spd5118_temp_from_reg(temp);
128 return 0;
129 }
130
spd5118_read_alarm(struct regmap * regmap,u32 attr,long * val)131 static int spd5118_read_alarm(struct regmap *regmap, u32 attr, long *val)
132 {
133 unsigned int mask, regval;
134 int err;
135
136 switch (attr) {
137 case hwmon_temp_max_alarm:
138 mask = SPD5118_TEMP_STATUS_HIGH;
139 break;
140 case hwmon_temp_min_alarm:
141 mask = SPD5118_TEMP_STATUS_LOW;
142 break;
143 case hwmon_temp_crit_alarm:
144 mask = SPD5118_TEMP_STATUS_CRIT;
145 break;
146 case hwmon_temp_lcrit_alarm:
147 mask = SPD5118_TEMP_STATUS_LCRIT;
148 break;
149 default:
150 return -EOPNOTSUPP;
151 }
152
153 err = regmap_read(regmap, SPD5118_REG_TEMP_STATUS, ®val);
154 if (err < 0)
155 return err;
156 *val = !!(regval & mask);
157 if (*val)
158 return regmap_write(regmap, SPD5118_REG_TEMP_CLR, mask);
159 return 0;
160 }
161
spd5118_read_enable(struct regmap * regmap,long * val)162 static int spd5118_read_enable(struct regmap *regmap, long *val)
163 {
164 u32 regval;
165 int err;
166
167 err = regmap_read(regmap, SPD5118_REG_TEMP_CONFIG, ®val);
168 if (err < 0)
169 return err;
170 *val = !(regval & SPD5118_TS_DISABLE);
171 return 0;
172 }
173
spd5118_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)174 static int spd5118_read(struct device *dev, enum hwmon_sensor_types type,
175 u32 attr, int channel, long *val)
176 {
177 struct regmap *regmap = dev_get_drvdata(dev);
178
179 if (type != hwmon_temp)
180 return -EOPNOTSUPP;
181
182 switch (attr) {
183 case hwmon_temp_input:
184 case hwmon_temp_max:
185 case hwmon_temp_min:
186 case hwmon_temp_crit:
187 case hwmon_temp_lcrit:
188 return spd5118_read_temp(regmap, attr, val);
189 case hwmon_temp_max_alarm:
190 case hwmon_temp_min_alarm:
191 case hwmon_temp_crit_alarm:
192 case hwmon_temp_lcrit_alarm:
193 return spd5118_read_alarm(regmap, attr, val);
194 case hwmon_temp_enable:
195 return spd5118_read_enable(regmap, val);
196 default:
197 return -EOPNOTSUPP;
198 }
199 }
200
spd5118_write_temp(struct regmap * regmap,u32 attr,long val)201 static int spd5118_write_temp(struct regmap *regmap, u32 attr, long val)
202 {
203 u8 regval[2];
204 u16 temp;
205 int reg;
206
207 switch (attr) {
208 case hwmon_temp_max:
209 reg = SPD5118_REG_TEMP_MAX;
210 break;
211 case hwmon_temp_min:
212 reg = SPD5118_REG_TEMP_MIN;
213 break;
214 case hwmon_temp_crit:
215 reg = SPD5118_REG_TEMP_CRIT;
216 break;
217 case hwmon_temp_lcrit:
218 reg = SPD5118_REG_TEMP_LCRIT;
219 break;
220 default:
221 return -EOPNOTSUPP;
222 }
223
224 temp = spd5118_temp_to_reg(val);
225 regval[0] = temp & 0xff;
226 regval[1] = temp >> 8;
227
228 return regmap_bulk_write(regmap, reg, regval, 2);
229 }
230
spd5118_write_enable(struct regmap * regmap,long val)231 static int spd5118_write_enable(struct regmap *regmap, long val)
232 {
233 if (val && val != 1)
234 return -EINVAL;
235
236 return regmap_update_bits(regmap, SPD5118_REG_TEMP_CONFIG,
237 SPD5118_TS_DISABLE,
238 val ? 0 : SPD5118_TS_DISABLE);
239 }
240
spd5118_temp_write(struct regmap * regmap,u32 attr,long val)241 static int spd5118_temp_write(struct regmap *regmap, u32 attr, long val)
242 {
243 switch (attr) {
244 case hwmon_temp_max:
245 case hwmon_temp_min:
246 case hwmon_temp_crit:
247 case hwmon_temp_lcrit:
248 return spd5118_write_temp(regmap, attr, val);
249 case hwmon_temp_enable:
250 return spd5118_write_enable(regmap, val);
251 default:
252 return -EOPNOTSUPP;
253 }
254 }
255
spd5118_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)256 static int spd5118_write(struct device *dev, enum hwmon_sensor_types type,
257 u32 attr, int channel, long val)
258 {
259 struct regmap *regmap = dev_get_drvdata(dev);
260
261 switch (type) {
262 case hwmon_temp:
263 return spd5118_temp_write(regmap, attr, val);
264 default:
265 return -EOPNOTSUPP;
266 }
267 }
268
spd5118_is_visible(const void * _data,enum hwmon_sensor_types type,u32 attr,int channel)269 static umode_t spd5118_is_visible(const void *_data, enum hwmon_sensor_types type,
270 u32 attr, int channel)
271 {
272 if (type != hwmon_temp)
273 return 0;
274
275 switch (attr) {
276 case hwmon_temp_input:
277 return 0444;
278 case hwmon_temp_min:
279 case hwmon_temp_max:
280 case hwmon_temp_lcrit:
281 case hwmon_temp_crit:
282 case hwmon_temp_enable:
283 return 0644;
284 case hwmon_temp_min_alarm:
285 case hwmon_temp_max_alarm:
286 case hwmon_temp_crit_alarm:
287 case hwmon_temp_lcrit_alarm:
288 return 0444;
289 default:
290 return 0;
291 }
292 }
293
294 /*
295 * Bank and vendor id are 8-bit fields with seven data bits and odd parity.
296 * Vendor IDs 0 and 0x7f are invalid.
297 * See Jedec standard JEP106BJ for details and a list of assigned vendor IDs.
298 */
spd5118_vendor_valid(u8 bank,u8 id)299 static bool spd5118_vendor_valid(u8 bank, u8 id)
300 {
301 if (parity8(bank) == 0 || parity8(id) == 0)
302 return false;
303
304 id &= 0x7f;
305 return id && id != 0x7f;
306 }
307
308 /* Return 0 if detection is successful, -ENODEV otherwise */
spd5118_detect(struct i2c_client * client,struct i2c_board_info * info)309 static int spd5118_detect(struct i2c_client *client, struct i2c_board_info *info)
310 {
311 struct i2c_adapter *adapter = client->adapter;
312 int regval;
313
314 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
315 I2C_FUNC_SMBUS_WORD_DATA))
316 return -ENODEV;
317
318 regval = i2c_smbus_read_word_swapped(client, SPD5118_REG_TYPE);
319 if (regval != 0x5118)
320 return -ENODEV;
321
322 regval = i2c_smbus_read_word_data(client, SPD5118_REG_VENDOR);
323 if (regval < 0 || !spd5118_vendor_valid(regval & 0xff, regval >> 8))
324 return -ENODEV;
325
326 regval = i2c_smbus_read_byte_data(client, SPD5118_REG_CAPABILITY);
327 if (regval < 0)
328 return -ENODEV;
329 if (!(regval & SPD5118_CAP_TS_SUPPORT) || (regval & 0xfc))
330 return -ENODEV;
331
332 regval = i2c_smbus_read_byte_data(client, SPD5118_REG_TEMP_CLR);
333 if (regval)
334 return -ENODEV;
335 regval = i2c_smbus_read_byte_data(client, SPD5118_REG_ERROR_CLR);
336 if (regval)
337 return -ENODEV;
338
339 regval = i2c_smbus_read_byte_data(client, SPD5118_REG_REVISION);
340 if (regval < 0 || (regval & 0xc1))
341 return -ENODEV;
342
343 regval = i2c_smbus_read_byte_data(client, SPD5118_REG_TEMP_CONFIG);
344 if (regval < 0)
345 return -ENODEV;
346 if (regval & ~SPD5118_TS_DISABLE)
347 return -ENODEV;
348
349 strscpy(info->type, "spd5118", I2C_NAME_SIZE);
350 return 0;
351 }
352
353 static const struct hwmon_channel_info *spd5118_info[] = {
354 HWMON_CHANNEL_INFO(chip,
355 HWMON_C_REGISTER_TZ),
356 HWMON_CHANNEL_INFO(temp,
357 HWMON_T_INPUT |
358 HWMON_T_LCRIT | HWMON_T_LCRIT_ALARM |
359 HWMON_T_MIN | HWMON_T_MIN_ALARM |
360 HWMON_T_MAX | HWMON_T_MAX_ALARM |
361 HWMON_T_CRIT | HWMON_T_CRIT_ALARM |
362 HWMON_T_ENABLE),
363 NULL
364 };
365
366 static const struct hwmon_ops spd5118_hwmon_ops = {
367 .is_visible = spd5118_is_visible,
368 .read = spd5118_read,
369 .write = spd5118_write,
370 };
371
372 static const struct hwmon_chip_info spd5118_chip_info = {
373 .ops = &spd5118_hwmon_ops,
374 .info = spd5118_info,
375 };
376
377 /* nvmem */
378
spd5118_nvmem_read_page(struct regmap * regmap,char * buf,unsigned int offset,size_t count)379 static ssize_t spd5118_nvmem_read_page(struct regmap *regmap, char *buf,
380 unsigned int offset, size_t count)
381 {
382 int addr = (offset >> SPD5118_PAGE_SHIFT) * 0x100 + SPD5118_EEPROM_BASE;
383 int err;
384
385 offset &= SPD5118_PAGE_MASK;
386
387 /* Can't cross page boundaries */
388 if (offset + count > SPD5118_PAGE_SIZE)
389 count = SPD5118_PAGE_SIZE - offset;
390
391 err = regmap_bulk_read(regmap, addr + offset, buf, count);
392 if (err)
393 return err;
394
395 return count;
396 }
397
spd5118_nvmem_read(void * priv,unsigned int off,void * val,size_t count)398 static int spd5118_nvmem_read(void *priv, unsigned int off, void *val, size_t count)
399 {
400 struct spd5118_data *data = priv;
401 char *buf = val;
402 int ret;
403
404 if (unlikely(!count))
405 return count;
406
407 if (off + count > SPD5118_EEPROM_SIZE)
408 return -EINVAL;
409
410 mutex_lock(&data->nvmem_lock);
411
412 while (count) {
413 ret = spd5118_nvmem_read_page(data->regmap, buf, off, count);
414 if (ret < 0) {
415 mutex_unlock(&data->nvmem_lock);
416 return ret;
417 }
418 buf += ret;
419 off += ret;
420 count -= ret;
421 }
422 mutex_unlock(&data->nvmem_lock);
423 return 0;
424 }
425
spd5118_nvmem_init(struct device * dev,struct spd5118_data * data)426 static int spd5118_nvmem_init(struct device *dev, struct spd5118_data *data)
427 {
428 struct nvmem_config nvmem_config = {
429 .type = NVMEM_TYPE_EEPROM,
430 .name = dev_name(dev),
431 .id = NVMEM_DEVID_NONE,
432 .dev = dev,
433 .base_dev = dev,
434 .read_only = true,
435 .root_only = false,
436 .owner = THIS_MODULE,
437 .compat = true,
438 .reg_read = spd5118_nvmem_read,
439 .priv = data,
440 .stride = 1,
441 .word_size = 1,
442 .size = SPD5118_EEPROM_SIZE,
443 };
444 struct nvmem_device *nvmem;
445
446 nvmem = devm_nvmem_register(dev, &nvmem_config);
447 return PTR_ERR_OR_ZERO(nvmem);
448 }
449
450 /* regmap */
451
spd5118_writeable_reg(struct device * dev,unsigned int reg)452 static bool spd5118_writeable_reg(struct device *dev, unsigned int reg)
453 {
454 switch (reg) {
455 case SPD5118_REG_I2C_LEGACY_MODE:
456 case SPD5118_REG_TEMP_CLR:
457 case SPD5118_REG_TEMP_CONFIG:
458 case SPD5118_REG_TEMP_MAX:
459 case SPD5118_REG_TEMP_MAX + 1:
460 case SPD5118_REG_TEMP_MIN:
461 case SPD5118_REG_TEMP_MIN + 1:
462 case SPD5118_REG_TEMP_CRIT:
463 case SPD5118_REG_TEMP_CRIT + 1:
464 case SPD5118_REG_TEMP_LCRIT:
465 case SPD5118_REG_TEMP_LCRIT + 1:
466 return true;
467 default:
468 return false;
469 }
470 }
471
spd5118_volatile_reg(struct device * dev,unsigned int reg)472 static bool spd5118_volatile_reg(struct device *dev, unsigned int reg)
473 {
474 switch (reg) {
475 case SPD5118_REG_TEMP_CLR:
476 case SPD5118_REG_ERROR_CLR:
477 case SPD5118_REG_TEMP:
478 case SPD5118_REG_TEMP + 1:
479 case SPD5118_REG_TEMP_STATUS:
480 return true;
481 default:
482 return false;
483 }
484 }
485
486 static const struct regmap_range_cfg spd5118_regmap_range_cfg[] = {
487 {
488 .selector_reg = SPD5118_REG_I2C_LEGACY_MODE,
489 .selector_mask = SPD5118_LEGACY_PAGE_MASK,
490 .selector_shift = 0,
491 .window_start = 0,
492 .window_len = 0x100,
493 .range_min = 0,
494 .range_max = 0x7ff,
495 },
496 };
497
498 static const struct regmap_config spd5118_regmap_config = {
499 .reg_bits = 8,
500 .val_bits = 8,
501 .max_register = 0x7ff,
502 .writeable_reg = spd5118_writeable_reg,
503 .volatile_reg = spd5118_volatile_reg,
504 .cache_type = REGCACHE_MAPLE,
505
506 .ranges = spd5118_regmap_range_cfg,
507 .num_ranges = ARRAY_SIZE(spd5118_regmap_range_cfg),
508 };
509
spd5118_init(struct i2c_client * client)510 static int spd5118_init(struct i2c_client *client)
511 {
512 struct i2c_adapter *adapter = client->adapter;
513 int err, regval, mode;
514
515 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
516 I2C_FUNC_SMBUS_WORD_DATA))
517 return -ENODEV;
518
519 regval = i2c_smbus_read_word_swapped(client, SPD5118_REG_TYPE);
520 if (regval < 0 || (regval && regval != 0x5118))
521 return -ENODEV;
522
523 /*
524 * If the device type registers return 0, it is possible that the chip
525 * has a non-zero page selected and takes the specification literally,
526 * i.e. disables access to volatile registers besides the page register
527 * if the page is not 0. Try to identify such chips.
528 */
529 if (!regval) {
530 /* Vendor ID registers must also be 0 */
531 regval = i2c_smbus_read_word_data(client, SPD5118_REG_VENDOR);
532 if (regval)
533 return -ENODEV;
534
535 /* The selected page in MR11 must not be 0 */
536 mode = i2c_smbus_read_byte_data(client, SPD5118_REG_I2C_LEGACY_MODE);
537 if (mode < 0 || (mode & ~SPD5118_LEGACY_MODE_MASK) ||
538 !(mode & SPD5118_LEGACY_PAGE_MASK))
539 return -ENODEV;
540
541 err = i2c_smbus_write_byte_data(client, SPD5118_REG_I2C_LEGACY_MODE,
542 mode & SPD5118_LEGACY_MODE_ADDR);
543 if (err)
544 return -ENODEV;
545
546 /*
547 * If the device type registers are still bad after selecting
548 * page 0, this is not a SPD5118 device. Restore original
549 * legacy mode register value and abort.
550 */
551 regval = i2c_smbus_read_word_swapped(client, SPD5118_REG_TYPE);
552 if (regval != 0x5118) {
553 i2c_smbus_write_byte_data(client, SPD5118_REG_I2C_LEGACY_MODE, mode);
554 return -ENODEV;
555 }
556 }
557
558 /* We are reasonably sure that this is really a SPD5118 hub controller */
559 return 0;
560 }
561
spd5118_probe(struct i2c_client * client)562 static int spd5118_probe(struct i2c_client *client)
563 {
564 struct device *dev = &client->dev;
565 unsigned int regval, revision, vendor, bank;
566 struct spd5118_data *data;
567 struct device *hwmon_dev;
568 struct regmap *regmap;
569 int err;
570
571 err = spd5118_init(client);
572 if (err)
573 return err;
574
575 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
576 if (!data)
577 return -ENOMEM;
578
579 regmap = devm_regmap_init_i2c(client, &spd5118_regmap_config);
580 if (IS_ERR(regmap))
581 return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed\n");
582
583 err = regmap_read(regmap, SPD5118_REG_CAPABILITY, ®val);
584 if (err)
585 return err;
586 if (!(regval & SPD5118_CAP_TS_SUPPORT))
587 return -ENODEV;
588
589 err = regmap_read(regmap, SPD5118_REG_REVISION, &revision);
590 if (err)
591 return err;
592
593 err = regmap_read(regmap, SPD5118_REG_VENDOR, &bank);
594 if (err)
595 return err;
596 err = regmap_read(regmap, SPD5118_REG_VENDOR + 1, &vendor);
597 if (err)
598 return err;
599 if (!spd5118_vendor_valid(bank, vendor))
600 return -ENODEV;
601
602 data->regmap = regmap;
603 mutex_init(&data->nvmem_lock);
604 dev_set_drvdata(dev, data);
605
606 err = spd5118_nvmem_init(dev, data);
607 /* Ignore if NVMEM support is disabled */
608 if (err && err != -EOPNOTSUPP) {
609 dev_err_probe(dev, err, "failed to register nvmem\n");
610 return err;
611 }
612
613 hwmon_dev = devm_hwmon_device_register_with_info(dev, "spd5118",
614 regmap, &spd5118_chip_info,
615 NULL);
616 if (IS_ERR(hwmon_dev))
617 return PTR_ERR(hwmon_dev);
618
619 /*
620 * From JESD300-5B
621 * MR2 bits [5:4]: Major revision, 1..4
622 * MR2 bits [3:1]: Minor revision, 0..8? Probably a typo, assume 1..8
623 */
624 dev_info(dev, "DDR5 temperature sensor: vendor 0x%02x:0x%02x revision %d.%d\n",
625 bank & 0x7f, vendor, ((revision >> 4) & 0x03) + 1, ((revision >> 1) & 0x07) + 1);
626
627 return 0;
628 }
629
spd5118_suspend(struct device * dev)630 static int spd5118_suspend(struct device *dev)
631 {
632 struct spd5118_data *data = dev_get_drvdata(dev);
633 struct regmap *regmap = data->regmap;
634 u32 regval;
635 int err;
636
637 /*
638 * Make sure the configuration register in the regmap cache is current
639 * before bypassing it.
640 */
641 err = regmap_read(regmap, SPD5118_REG_TEMP_CONFIG, ®val);
642 if (err < 0)
643 return err;
644
645 regcache_cache_bypass(regmap, true);
646 regmap_update_bits(regmap, SPD5118_REG_TEMP_CONFIG, SPD5118_TS_DISABLE,
647 SPD5118_TS_DISABLE);
648 regcache_cache_bypass(regmap, false);
649
650 regcache_cache_only(regmap, true);
651 regcache_mark_dirty(regmap);
652
653 return 0;
654 }
655
spd5118_resume(struct device * dev)656 static int spd5118_resume(struct device *dev)
657 {
658 struct spd5118_data *data = dev_get_drvdata(dev);
659 struct regmap *regmap = data->regmap;
660
661 regcache_cache_only(regmap, false);
662 return regcache_sync(regmap);
663 }
664
665 static DEFINE_SIMPLE_DEV_PM_OPS(spd5118_pm_ops, spd5118_suspend, spd5118_resume);
666
667 static const struct i2c_device_id spd5118_id[] = {
668 { "spd5118" },
669 { }
670 };
671 MODULE_DEVICE_TABLE(i2c, spd5118_id);
672
673 static const struct of_device_id spd5118_of_ids[] = {
674 { .compatible = "jedec,spd5118", },
675 { }
676 };
677 MODULE_DEVICE_TABLE(of, spd5118_of_ids);
678
679 static struct i2c_driver spd5118_driver = {
680 .class = I2C_CLASS_HWMON,
681 .driver = {
682 .name = "spd5118",
683 .of_match_table = spd5118_of_ids,
684 .pm = pm_sleep_ptr(&spd5118_pm_ops),
685 },
686 .probe = spd5118_probe,
687 .id_table = spd5118_id,
688 .detect = IS_ENABLED(CONFIG_SENSORS_SPD5118_DETECT) ? spd5118_detect : NULL,
689 .address_list = IS_ENABLED(CONFIG_SENSORS_SPD5118_DETECT) ? normal_i2c : NULL,
690 };
691
692 module_i2c_driver(spd5118_driver);
693
694 MODULE_AUTHOR("René Rebe <[email protected]>");
695 MODULE_AUTHOR("Guenter Roeck <[email protected]>");
696 MODULE_DESCRIPTION("SPD 5118 driver");
697 MODULE_LICENSE("GPL");
698