1 /*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <linux/acpi.h>
25 #include "i915_drv.h"
26 #include "gvt.h"
27
28 /*
29 * Note: Only for GVT-g virtual VBT generation, other usage must
30 * not do like this.
31 */
32 #define _INTEL_BIOS_PRIVATE
33 #include "display/intel_vbt_defs.h"
34
35 #define OPREGION_SIGNATURE "IntelGraphicsMem"
36 #define MBOX_VBT (1<<3)
37
38 /* device handle */
39 #define DEVICE_TYPE_CRT 0x01
40 #define DEVICE_TYPE_EFP1 0x04
41 #define DEVICE_TYPE_EFP2 0x40
42 #define DEVICE_TYPE_EFP3 0x20
43 #define DEVICE_TYPE_EFP4 0x10
44
45 struct opregion_header {
46 u8 signature[16];
47 u32 size;
48 u32 opregion_ver;
49 u8 bios_ver[32];
50 u8 vbios_ver[16];
51 u8 driver_ver[16];
52 u32 mboxes;
53 u32 driver_model;
54 u32 pcon;
55 u8 dver[32];
56 u8 rsvd[124];
57 } __packed;
58
59 struct bdb_data_header {
60 u8 id;
61 u16 size; /* data size */
62 } __packed;
63
64 /* For supporting windows guest with opregion, here hardcode the emulated
65 * bdb header version as '186', and the corresponding child_device_config
66 * length should be '33' but not '38'.
67 */
68 struct efp_child_device_config {
69 u16 handle;
70 u16 device_type;
71 u16 device_class;
72 u8 i2c_speed;
73 u8 dp_onboard_redriver; /* 158 */
74 u8 dp_ondock_redriver; /* 158 */
75 u8 hdmi_level_shifter_value:4; /* 169 */
76 u8 hdmi_max_data_rate:4; /* 204 */
77 u16 dtd_buf_ptr; /* 161 */
78 u8 edidless_efp:1; /* 161 */
79 u8 compression_enable:1; /* 198 */
80 u8 compression_method:1; /* 198 */
81 u8 ganged_edp:1; /* 202 */
82 u8 skip0:4;
83 u8 compression_structure_index:4; /* 198 */
84 u8 skip1:4;
85 u8 slave_port; /* 202 */
86 u8 skip2;
87 u8 dvo_port;
88 u8 i2c_pin; /* for add-in card */
89 u8 target_addr; /* for add-in card */
90 u8 ddc_pin;
91 u16 edid_ptr;
92 u8 dvo_config;
93 u8 efp_docked_port:1; /* 158 */
94 u8 lane_reversal:1; /* 184 */
95 u8 onboard_lspcon:1; /* 192 */
96 u8 iboost_enable:1; /* 196 */
97 u8 hpd_invert:1; /* BXT 196 */
98 u8 slip3:3;
99 u8 hdmi_compat:1;
100 u8 dp_compat:1;
101 u8 tmds_compat:1;
102 u8 skip4:5;
103 u8 aux_channel;
104 u8 dongle_detect;
105 u8 pipe_cap:2;
106 u8 sdvo_stall:1; /* 158 */
107 u8 hpd_status:2;
108 u8 integrated_encoder:1;
109 u8 skip5:2;
110 u8 dvo_wiring;
111 u8 mipi_bridge_type; /* 171 */
112 u16 device_class_ext;
113 u8 dvo_function;
114 } __packed;
115
116 struct vbt {
117 /* header->bdb_offset point to bdb_header offset */
118 struct vbt_header header;
119 struct bdb_header bdb_header;
120
121 struct bdb_data_header general_features_header;
122 struct bdb_general_features general_features;
123
124 struct bdb_data_header general_definitions_header;
125 struct bdb_general_definitions general_definitions;
126
127 struct efp_child_device_config child0;
128 struct efp_child_device_config child1;
129 struct efp_child_device_config child2;
130 struct efp_child_device_config child3;
131
132 struct bdb_data_header driver_features_header;
133 struct bdb_driver_features driver_features;
134 };
135
virt_vbt_generation(struct vbt * v)136 static void virt_vbt_generation(struct vbt *v)
137 {
138 int num_child;
139
140 memset(v, 0, sizeof(struct vbt));
141
142 v->header.signature[0] = '$';
143 v->header.signature[1] = 'V';
144 v->header.signature[2] = 'B';
145 v->header.signature[3] = 'T';
146
147 /* there's features depending on version! */
148 v->header.version = 155;
149 v->header.header_size = sizeof(v->header);
150 v->header.vbt_size = sizeof(struct vbt);
151 v->header.bdb_offset = offsetof(struct vbt, bdb_header);
152
153 strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK");
154 v->bdb_header.version = 186; /* child_dev_size = 33 */
155 v->bdb_header.header_size = sizeof(v->bdb_header);
156
157 v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header);
158
159 /* general features */
160 v->general_features_header.id = BDB_GENERAL_FEATURES;
161 v->general_features_header.size = sizeof(struct bdb_general_features);
162 v->general_features.int_crt_support = 0;
163 v->general_features.int_tv_support = 0;
164
165 /* child device */
166 num_child = 4; /* each port has one child */
167 v->general_definitions.child_dev_size =
168 sizeof(struct efp_child_device_config);
169 v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS;
170 /* size will include child devices */
171 v->general_definitions_header.size =
172 sizeof(struct bdb_general_definitions) +
173 num_child * v->general_definitions.child_dev_size;
174
175 /* portA */
176 v->child0.handle = DEVICE_TYPE_EFP1;
177 v->child0.device_type = DEVICE_TYPE_DP;
178 v->child0.dvo_port = DVO_PORT_DPA;
179 v->child0.aux_channel = DP_AUX_A;
180 v->child0.dp_compat = true;
181 v->child0.integrated_encoder = true;
182
183 /* portB */
184 v->child1.handle = DEVICE_TYPE_EFP2;
185 v->child1.device_type = DEVICE_TYPE_DP;
186 v->child1.dvo_port = DVO_PORT_DPB;
187 v->child1.aux_channel = DP_AUX_B;
188 v->child1.dp_compat = true;
189 v->child1.integrated_encoder = true;
190
191 /* portC */
192 v->child2.handle = DEVICE_TYPE_EFP3;
193 v->child2.device_type = DEVICE_TYPE_DP;
194 v->child2.dvo_port = DVO_PORT_DPC;
195 v->child2.aux_channel = DP_AUX_C;
196 v->child2.dp_compat = true;
197 v->child2.integrated_encoder = true;
198
199 /* portD */
200 v->child3.handle = DEVICE_TYPE_EFP4;
201 v->child3.device_type = DEVICE_TYPE_DP;
202 v->child3.dvo_port = DVO_PORT_DPD;
203 v->child3.aux_channel = DP_AUX_D;
204 v->child3.dp_compat = true;
205 v->child3.integrated_encoder = true;
206
207 /* driver features */
208 v->driver_features_header.id = BDB_DRIVER_FEATURES;
209 v->driver_features_header.size = sizeof(struct bdb_driver_features);
210 v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS;
211 }
212
213 /**
214 * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion
215 * @vgpu: a vGPU
216 *
217 * Returns:
218 * Zero on success, negative error code if failed.
219 */
intel_vgpu_init_opregion(struct intel_vgpu * vgpu)220 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu)
221 {
222 u8 *buf;
223 struct opregion_header *header;
224 struct vbt v;
225
226 gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
227 vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
228 __GFP_ZERO,
229 get_order(INTEL_GVT_OPREGION_SIZE));
230 if (!vgpu_opregion(vgpu)->va) {
231 gvt_err("fail to get memory for vgpu virt opregion\n");
232 return -ENOMEM;
233 }
234
235 /* emulated opregion with VBT mailbox only */
236 buf = (u8 *)vgpu_opregion(vgpu)->va;
237 header = (struct opregion_header *)buf;
238
239 static_assert(sizeof(header->signature) == sizeof(OPREGION_SIGNATURE) - 1);
240 memcpy(header->signature, OPREGION_SIGNATURE, sizeof(header->signature));
241
242 header->size = 0x8;
243 header->opregion_ver = 0x02000000;
244 header->mboxes = MBOX_VBT;
245
246 /* for unknown reason, the value in LID field is incorrect
247 * which block the windows guest, so workaround it by force
248 * setting it to "OPEN"
249 */
250 buf[INTEL_GVT_OPREGION_CLID] = 0x3;
251
252 /* emulated vbt from virt vbt generation */
253 virt_vbt_generation(&v);
254 memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt));
255
256 return 0;
257 }
258
259 /**
260 * intel_vgpu_opregion_base_write_handler - Opregion base register write handler
261 *
262 * @vgpu: a vGPU
263 * @gpa: guest physical address of opregion
264 *
265 * Returns:
266 * Zero on success, negative error code if failed.
267 */
intel_vgpu_opregion_base_write_handler(struct intel_vgpu * vgpu,u32 gpa)268 int intel_vgpu_opregion_base_write_handler(struct intel_vgpu *vgpu, u32 gpa)
269 {
270
271 int i;
272
273 gvt_dbg_core("emulate opregion from kernel\n");
274
275 for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++)
276 vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i;
277 return 0;
278 }
279
280 /**
281 * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion
282 * @vgpu: a vGPU
283 *
284 */
intel_vgpu_clean_opregion(struct intel_vgpu * vgpu)285 void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
286 {
287 gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);
288
289 if (!vgpu_opregion(vgpu)->va)
290 return;
291
292 /* Guest opregion is released by VFIO */
293 free_pages((unsigned long)vgpu_opregion(vgpu)->va,
294 get_order(INTEL_GVT_OPREGION_SIZE));
295
296 vgpu_opregion(vgpu)->va = NULL;
297
298 }
299
300
301 #define GVT_OPREGION_FUNC(scic) \
302 ({ \
303 u32 __ret; \
304 __ret = (scic & OPREGION_SCIC_FUNC_MASK) >> \
305 OPREGION_SCIC_FUNC_SHIFT; \
306 __ret; \
307 })
308
309 #define GVT_OPREGION_SUBFUNC(scic) \
310 ({ \
311 u32 __ret; \
312 __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >> \
313 OPREGION_SCIC_SUBFUNC_SHIFT; \
314 __ret; \
315 })
316
opregion_func_name(u32 func)317 static const char *opregion_func_name(u32 func)
318 {
319 const char *name = NULL;
320
321 switch (func) {
322 case 0 ... 3:
323 case 5:
324 case 7 ... 15:
325 name = "Reserved";
326 break;
327
328 case 4:
329 name = "Get BIOS Data";
330 break;
331
332 case 6:
333 name = "System BIOS Callbacks";
334 break;
335
336 default:
337 name = "Unknown";
338 break;
339 }
340 return name;
341 }
342
opregion_subfunc_name(u32 subfunc)343 static const char *opregion_subfunc_name(u32 subfunc)
344 {
345 const char *name = NULL;
346
347 switch (subfunc) {
348 case 0:
349 name = "Supported Calls";
350 break;
351
352 case 1:
353 name = "Requested Callbacks";
354 break;
355
356 case 2 ... 3:
357 case 8 ... 9:
358 name = "Reserved";
359 break;
360
361 case 5:
362 name = "Boot Display";
363 break;
364
365 case 6:
366 name = "TV-Standard/Video-Connector";
367 break;
368
369 case 7:
370 name = "Internal Graphics";
371 break;
372
373 case 10:
374 name = "Spread Spectrum Clocks";
375 break;
376
377 case 11:
378 name = "Get AKSV";
379 break;
380
381 default:
382 name = "Unknown";
383 break;
384 }
385 return name;
386 };
387
querying_capabilities(u32 scic)388 static bool querying_capabilities(u32 scic)
389 {
390 u32 func, subfunc;
391
392 func = GVT_OPREGION_FUNC(scic);
393 subfunc = GVT_OPREGION_SUBFUNC(scic);
394
395 if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
396 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)
397 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
398 subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS)
399 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS &&
400 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) {
401 return true;
402 }
403 return false;
404 }
405
406 /**
407 * intel_vgpu_emulate_opregion_request - emulating OpRegion request
408 * @vgpu: a vGPU
409 * @swsci: SWSCI request
410 *
411 * Returns:
412 * Zero on success, negative error code if failed
413 */
intel_vgpu_emulate_opregion_request(struct intel_vgpu * vgpu,u32 swsci)414 int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci)
415 {
416 u32 scic, parm;
417 u32 func, subfunc;
418 u64 scic_pa = 0, parm_pa = 0;
419 int ret;
420
421 scic_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
422 INTEL_GVT_OPREGION_SCIC;
423 parm_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
424 INTEL_GVT_OPREGION_PARM;
425 ret = intel_gvt_read_gpa(vgpu, scic_pa, &scic, sizeof(scic));
426 if (ret) {
427 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
428 ret, scic_pa, sizeof(scic));
429 return ret;
430 }
431
432 ret = intel_gvt_read_gpa(vgpu, parm_pa, &parm, sizeof(parm));
433 if (ret) {
434 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
435 ret, scic_pa, sizeof(scic));
436 return ret;
437 }
438
439 if (!(swsci & SWSCI_SCI_SELECT)) {
440 gvt_vgpu_err("requesting SMI service\n");
441 return 0;
442 }
443 /* ignore non 0->1 transitions */
444 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI]
445 & SWSCI_SCI_TRIGGER) ||
446 !(swsci & SWSCI_SCI_TRIGGER)) {
447 return 0;
448 }
449
450 func = GVT_OPREGION_FUNC(scic);
451 subfunc = GVT_OPREGION_SUBFUNC(scic);
452 if (!querying_capabilities(scic)) {
453 gvt_vgpu_err("requesting runtime service: func \"%s\","
454 " subfunc \"%s\"\n",
455 opregion_func_name(func),
456 opregion_subfunc_name(subfunc));
457 /*
458 * emulate exit status of function call, '0' means
459 * "failure, generic, unsupported or unknown cause"
460 */
461 scic &= ~OPREGION_SCIC_EXIT_MASK;
462 goto out;
463 }
464
465 scic = 0;
466 parm = 0;
467
468 out:
469 ret = intel_gvt_write_gpa(vgpu, scic_pa, &scic, sizeof(scic));
470 if (ret) {
471 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
472 ret, scic_pa, sizeof(scic));
473 return ret;
474 }
475
476 ret = intel_gvt_write_gpa(vgpu, parm_pa, &parm, sizeof(parm));
477 if (ret) {
478 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
479 ret, scic_pa, sizeof(scic));
480 return ret;
481 }
482
483 return 0;
484 }
485