1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Header file for FPGA Management Engine (FME) Driver
4  *
5  * Copyright (C) 2017-2018 Intel Corporation, Inc.
6  *
7  * Authors:
8  *   Kang Luwei <[email protected]>
9  *   Xiao Guangrong <[email protected]>
10  *   Wu Hao <[email protected]>
11  *   Joseph Grecco <[email protected]>
12  *   Enno Luebbers <[email protected]>
13  *   Tim Whisonant <[email protected]>
14  *   Ananda Ravuri <[email protected]>
15  *   Henry Mitchel <[email protected]>
16  */
17 
18 #ifndef __DFL_FME_H
19 #define __DFL_FME_H
20 
21 /**
22  * struct dfl_fme - dfl fme private data
23  *
24  * @mgr: FME's FPGA manager platform device.
25  * @region_list: linked list of FME's FPGA regions.
26  * @bridge_list: linked list of FME's FPGA bridges.
27  */
28 struct dfl_fme {
29 	struct platform_device *mgr;
30 	struct list_head region_list;
31 	struct list_head bridge_list;
32 };
33 
34 extern const struct dfl_feature_ops fme_pr_mgmt_ops;
35 extern const struct dfl_feature_id fme_pr_mgmt_id_table[];
36 extern const struct dfl_feature_ops fme_global_err_ops;
37 extern const struct dfl_feature_id fme_global_err_id_table[];
38 extern const struct attribute_group fme_global_err_group;
39 extern const struct dfl_feature_ops fme_perf_ops;
40 extern const struct dfl_feature_id fme_perf_id_table[];
41 
42 #endif /* __DFL_FME_H */
43