1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * AMD Processor P-state Frequency Driver Unit Test
4 *
5 * Copyright (C) 2022 Advanced Micro Devices, Inc. All Rights Reserved.
6 *
7 * Author: Meng Li <[email protected]>
8 *
9 * The AMD P-State Unit Test is a test module for testing the amd-pstate
10 * driver. 1) It can help all users to verify their processor support
11 * (SBIOS/Firmware or Hardware). 2) Kernel can have a basic function
12 * test to avoid the kernel regression during the update. 3) We can
13 * introduce more functional or performance tests to align the result
14 * together, it will benefit power and performance scale optimization.
15 *
16 * This driver implements basic framework with plans to enhance it with
17 * additional test cases to improve the depth and coverage of the test.
18 *
19 * See Documentation/admin-guide/pm/amd-pstate.rst Unit Tests for
20 * amd-pstate to get more detail.
21 */
22
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/fs.h>
29
30 #include <acpi/cppc_acpi.h>
31
32 #include "amd-pstate.h"
33
34 /*
35 * Abbreviations:
36 * amd_pstate_ut: used as a shortform for AMD P-State unit test.
37 * It helps to keep variable names smaller, simpler
38 */
39 enum amd_pstate_ut_result {
40 AMD_PSTATE_UT_RESULT_PASS,
41 AMD_PSTATE_UT_RESULT_FAIL,
42 };
43
44 struct amd_pstate_ut_struct {
45 const char *name;
46 void (*func)(u32 index);
47 enum amd_pstate_ut_result result;
48 };
49
50 /*
51 * Kernel module for testing the AMD P-State unit test
52 */
53 static void amd_pstate_ut_acpi_cpc_valid(u32 index);
54 static void amd_pstate_ut_check_enabled(u32 index);
55 static void amd_pstate_ut_check_perf(u32 index);
56 static void amd_pstate_ut_check_freq(u32 index);
57 static void amd_pstate_ut_check_driver(u32 index);
58
59 static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = {
60 {"amd_pstate_ut_acpi_cpc_valid", amd_pstate_ut_acpi_cpc_valid },
61 {"amd_pstate_ut_check_enabled", amd_pstate_ut_check_enabled },
62 {"amd_pstate_ut_check_perf", amd_pstate_ut_check_perf },
63 {"amd_pstate_ut_check_freq", amd_pstate_ut_check_freq },
64 {"amd_pstate_ut_check_driver", amd_pstate_ut_check_driver }
65 };
66
get_shared_mem(void)67 static bool get_shared_mem(void)
68 {
69 bool result = false;
70
71 if (!boot_cpu_has(X86_FEATURE_CPPC))
72 result = true;
73
74 return result;
75 }
76
77 /*
78 * check the _CPC object is present in SBIOS.
79 */
amd_pstate_ut_acpi_cpc_valid(u32 index)80 static void amd_pstate_ut_acpi_cpc_valid(u32 index)
81 {
82 if (acpi_cpc_valid())
83 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
84 else {
85 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
86 pr_err("%s the _CPC object is not present in SBIOS!\n", __func__);
87 }
88 }
89
amd_pstate_ut_pstate_enable(u32 index)90 static void amd_pstate_ut_pstate_enable(u32 index)
91 {
92 int ret = 0;
93 u64 cppc_enable = 0;
94
95 ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &cppc_enable);
96 if (ret) {
97 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
98 pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d error!\n", __func__, ret);
99 return;
100 }
101 if (cppc_enable)
102 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
103 else {
104 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
105 pr_err("%s amd pstate must be enabled!\n", __func__);
106 }
107 }
108
109 /*
110 * check if amd pstate is enabled
111 */
amd_pstate_ut_check_enabled(u32 index)112 static void amd_pstate_ut_check_enabled(u32 index)
113 {
114 if (get_shared_mem())
115 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
116 else
117 amd_pstate_ut_pstate_enable(index);
118 }
119
120 /*
121 * check if performance values are reasonable.
122 * highest_perf >= nominal_perf > lowest_nonlinear_perf > lowest_perf > 0
123 */
amd_pstate_ut_check_perf(u32 index)124 static void amd_pstate_ut_check_perf(u32 index)
125 {
126 int cpu = 0, ret = 0;
127 u32 highest_perf = 0, nominal_perf = 0, lowest_nonlinear_perf = 0, lowest_perf = 0;
128 u64 cap1 = 0;
129 struct cppc_perf_caps cppc_perf;
130 struct cpufreq_policy *policy = NULL;
131 struct amd_cpudata *cpudata = NULL;
132
133 for_each_possible_cpu(cpu) {
134 policy = cpufreq_cpu_get(cpu);
135 if (!policy)
136 break;
137 cpudata = policy->driver_data;
138
139 if (get_shared_mem()) {
140 ret = cppc_get_perf_caps(cpu, &cppc_perf);
141 if (ret) {
142 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
143 pr_err("%s cppc_get_perf_caps ret=%d error!\n", __func__, ret);
144 goto skip_test;
145 }
146
147 highest_perf = cppc_perf.highest_perf;
148 nominal_perf = cppc_perf.nominal_perf;
149 lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
150 lowest_perf = cppc_perf.lowest_perf;
151 } else {
152 ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1);
153 if (ret) {
154 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
155 pr_err("%s read CPPC_CAP1 ret=%d error!\n", __func__, ret);
156 goto skip_test;
157 }
158
159 highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
160 nominal_perf = AMD_CPPC_NOMINAL_PERF(cap1);
161 lowest_nonlinear_perf = AMD_CPPC_LOWNONLIN_PERF(cap1);
162 lowest_perf = AMD_CPPC_LOWEST_PERF(cap1);
163 }
164
165 if (highest_perf != READ_ONCE(cpudata->highest_perf) && !cpudata->hw_prefcore) {
166 pr_err("%s cpu%d highest=%d %d highest perf doesn't match\n",
167 __func__, cpu, highest_perf, cpudata->highest_perf);
168 goto skip_test;
169 }
170 if ((nominal_perf != READ_ONCE(cpudata->nominal_perf)) ||
171 (lowest_nonlinear_perf != READ_ONCE(cpudata->lowest_nonlinear_perf)) ||
172 (lowest_perf != READ_ONCE(cpudata->lowest_perf))) {
173 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
174 pr_err("%s cpu%d nominal=%d %d lowest_nonlinear=%d %d lowest=%d %d, they should be equal!\n",
175 __func__, cpu, nominal_perf, cpudata->nominal_perf,
176 lowest_nonlinear_perf, cpudata->lowest_nonlinear_perf,
177 lowest_perf, cpudata->lowest_perf);
178 goto skip_test;
179 }
180
181 if (!((highest_perf >= nominal_perf) &&
182 (nominal_perf > lowest_nonlinear_perf) &&
183 (lowest_nonlinear_perf > lowest_perf) &&
184 (lowest_perf > 0))) {
185 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
186 pr_err("%s cpu%d highest=%d >= nominal=%d > lowest_nonlinear=%d > lowest=%d > 0, the formula is incorrect!\n",
187 __func__, cpu, highest_perf, nominal_perf,
188 lowest_nonlinear_perf, lowest_perf);
189 goto skip_test;
190 }
191 cpufreq_cpu_put(policy);
192 }
193
194 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
195 return;
196 skip_test:
197 cpufreq_cpu_put(policy);
198 }
199
200 /*
201 * Check if frequency values are reasonable.
202 * max_freq >= nominal_freq > lowest_nonlinear_freq > min_freq > 0
203 * check max freq when set support boost mode.
204 */
amd_pstate_ut_check_freq(u32 index)205 static void amd_pstate_ut_check_freq(u32 index)
206 {
207 int cpu = 0;
208 struct cpufreq_policy *policy = NULL;
209 struct amd_cpudata *cpudata = NULL;
210
211 for_each_possible_cpu(cpu) {
212 policy = cpufreq_cpu_get(cpu);
213 if (!policy)
214 break;
215 cpudata = policy->driver_data;
216
217 if (!((cpudata->max_freq >= cpudata->nominal_freq) &&
218 (cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) &&
219 (cpudata->lowest_nonlinear_freq > cpudata->min_freq) &&
220 (cpudata->min_freq > 0))) {
221 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
222 pr_err("%s cpu%d max=%d >= nominal=%d > lowest_nonlinear=%d > min=%d > 0, the formula is incorrect!\n",
223 __func__, cpu, cpudata->max_freq, cpudata->nominal_freq,
224 cpudata->lowest_nonlinear_freq, cpudata->min_freq);
225 goto skip_test;
226 }
227
228 if (cpudata->lowest_nonlinear_freq != policy->min) {
229 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
230 pr_err("%s cpu%d cpudata_lowest_nonlinear_freq=%d policy_min=%d, they should be equal!\n",
231 __func__, cpu, cpudata->lowest_nonlinear_freq, policy->min);
232 goto skip_test;
233 }
234
235 if (cpudata->boost_supported) {
236 if ((policy->max == cpudata->max_freq) ||
237 (policy->max == cpudata->nominal_freq))
238 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
239 else {
240 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
241 pr_err("%s cpu%d policy_max=%d should be equal cpu_max=%d or cpu_nominal=%d !\n",
242 __func__, cpu, policy->max, cpudata->max_freq,
243 cpudata->nominal_freq);
244 goto skip_test;
245 }
246 } else {
247 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
248 pr_err("%s cpu%d must support boost!\n", __func__, cpu);
249 goto skip_test;
250 }
251 cpufreq_cpu_put(policy);
252 }
253
254 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
255 return;
256 skip_test:
257 cpufreq_cpu_put(policy);
258 }
259
amd_pstate_set_mode(enum amd_pstate_mode mode)260 static int amd_pstate_set_mode(enum amd_pstate_mode mode)
261 {
262 const char *mode_str = amd_pstate_get_mode_string(mode);
263
264 pr_debug("->setting mode to %s\n", mode_str);
265
266 return amd_pstate_update_status(mode_str, strlen(mode_str));
267 }
268
amd_pstate_ut_check_driver(u32 index)269 static void amd_pstate_ut_check_driver(u32 index)
270 {
271 enum amd_pstate_mode mode1, mode2 = AMD_PSTATE_DISABLE;
272 int ret;
273
274 for (mode1 = AMD_PSTATE_DISABLE; mode1 < AMD_PSTATE_MAX; mode1++) {
275 ret = amd_pstate_set_mode(mode1);
276 if (ret)
277 goto out;
278 for (mode2 = AMD_PSTATE_DISABLE; mode2 < AMD_PSTATE_MAX; mode2++) {
279 if (mode1 == mode2)
280 continue;
281 ret = amd_pstate_set_mode(mode2);
282 if (ret)
283 goto out;
284 }
285 }
286 out:
287 if (ret)
288 pr_warn("%s: failed to update status for %s->%s: %d\n", __func__,
289 amd_pstate_get_mode_string(mode1),
290 amd_pstate_get_mode_string(mode2), ret);
291
292 amd_pstate_ut_cases[index].result = ret ?
293 AMD_PSTATE_UT_RESULT_FAIL :
294 AMD_PSTATE_UT_RESULT_PASS;
295 }
296
amd_pstate_ut_init(void)297 static int __init amd_pstate_ut_init(void)
298 {
299 u32 i = 0, arr_size = ARRAY_SIZE(amd_pstate_ut_cases);
300
301 for (i = 0; i < arr_size; i++) {
302 amd_pstate_ut_cases[i].func(i);
303 switch (amd_pstate_ut_cases[i].result) {
304 case AMD_PSTATE_UT_RESULT_PASS:
305 pr_info("%-4d %-20s\t success!\n", i+1, amd_pstate_ut_cases[i].name);
306 break;
307 case AMD_PSTATE_UT_RESULT_FAIL:
308 default:
309 pr_info("%-4d %-20s\t fail!\n", i+1, amd_pstate_ut_cases[i].name);
310 break;
311 }
312 }
313
314 return 0;
315 }
316
amd_pstate_ut_exit(void)317 static void __exit amd_pstate_ut_exit(void)
318 {
319 }
320
321 module_init(amd_pstate_ut_init);
322 module_exit(amd_pstate_ut_exit);
323
324 MODULE_AUTHOR("Meng Li <[email protected]>");
325 MODULE_DESCRIPTION("AMD P-state driver Test module");
326 MODULE_LICENSE("GPL");
327