1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 *
8 * Sample Audio settings:
9 *
10 *	> amixer set "DVC Out" 1%
11 *	> amixer set "DVC In"  20%
12 */
13
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16
17/ {
18	model = "Renesas R-Car Gen3 ULCB board";
19
20	aliases {
21		i2c0 = &i2c0;
22		i2c1 = &i2c1;
23		i2c2 = &i2c2;
24		i2c3 = &i2c3;
25		i2c4 = &i2c4;
26		i2c5 = &i2c5;
27		i2c6 = &i2c6;
28		i2c7 = &i2c_dvfs;
29		serial0 = &scif2;
30		ethernet0 = &avb;
31		mmc0 = &sdhi2;
32		mmc1 = &sdhi0;
33	};
34
35	chosen {
36		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
37		stdout-path = "serial0:115200n8";
38	};
39
40	audio_clkout: audio-clkout {
41		/*
42		 * This is same as <&rcar_sound 0>
43		 * but needed to avoid cs2000/rcar_sound probe dead-lock
44		 */
45		compatible = "fixed-clock";
46		#clock-cells = <0>;
47		clock-frequency = <12288000>;
48	};
49
50	hdmi0-out {
51		compatible = "hdmi-connector";
52		type = "a";
53
54		port {
55			hdmi0_con: endpoint {
56				remote-endpoint = <&rcar_dw_hdmi0_out>;
57			};
58		};
59	};
60
61	keyboard {
62		compatible = "gpio-keys";
63
64		key-1 {
65			linux,code = <KEY_1>;
66			label = "SW3";
67			wakeup-source;
68			debounce-interval = <20>;
69			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
70		};
71	};
72
73	leds {
74		compatible = "gpio-leds";
75
76		led5 {
77			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
78		};
79		led6 {
80			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
81		};
82	};
83
84	reg_1p8v: regulator-1p8v {
85		compatible = "regulator-fixed";
86		regulator-name = "fixed-1.8V";
87		regulator-min-microvolt = <1800000>;
88		regulator-max-microvolt = <1800000>;
89		regulator-boot-on;
90		regulator-always-on;
91	};
92
93	reg_3p3v: regulator-3p3v {
94		compatible = "regulator-fixed";
95		regulator-name = "fixed-3.3V";
96		regulator-min-microvolt = <3300000>;
97		regulator-max-microvolt = <3300000>;
98		regulator-boot-on;
99		regulator-always-on;
100	};
101
102	vcc_sdhi0: regulator-vcc-sdhi0 {
103		compatible = "regulator-fixed";
104
105		regulator-name = "SDHI0 Vcc";
106		regulator-min-microvolt = <3300000>;
107		regulator-max-microvolt = <3300000>;
108
109		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
110		enable-active-high;
111	};
112
113	vccq_sdhi0: regulator-vccq-sdhi0 {
114		compatible = "regulator-gpio";
115
116		regulator-name = "SDHI0 VccQ";
117		regulator-min-microvolt = <1800000>;
118		regulator-max-microvolt = <3300000>;
119
120		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
121		gpios-states = <1>;
122		states = <3300000 1>, <1800000 0>;
123	};
124
125	x12_clk: x12 {
126		compatible = "fixed-clock";
127		#clock-cells = <0>;
128		clock-frequency = <24576000>;
129	};
130
131	x23_clk: x23-clock {
132		compatible = "fixed-clock";
133		#clock-cells = <0>;
134		clock-frequency = <25000000>;
135	};
136};
137
138&a57_0 {
139	cpu-supply = <&dvfs>;
140};
141
142&audio_clk_a {
143	clock-frequency = <22579200>;
144};
145
146&avb {
147	pinctrl-0 = <&avb_pins>;
148	pinctrl-names = "default";
149	phy-handle = <&phy0>;
150	tx-internal-delay-ps = <2000>;
151	status = "okay";
152
153	phy0: ethernet-phy@0 {
154		compatible = "ethernet-phy-id0022.1622",
155			     "ethernet-phy-ieee802.3-c22";
156		rxc-skew-ps = <1500>;
157		reg = <0>;
158		interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>;
159		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
160	};
161};
162
163&du {
164	status = "okay";
165};
166
167&ehci1 {
168	status = "okay";
169};
170
171&extal_clk {
172	clock-frequency = <16666666>;
173};
174
175&extalr_clk {
176	clock-frequency = <32768>;
177};
178
179&hdmi0 {
180	status = "okay";
181
182	ports {
183		port@1 {
184			reg = <1>;
185			rcar_dw_hdmi0_out: endpoint {
186				remote-endpoint = <&hdmi0_con>;
187			};
188		};
189		port@2 {
190			reg = <2>;
191		};
192	};
193};
194
195&i2c2 {
196	pinctrl-0 = <&i2c2_pins>;
197	pinctrl-names = "default";
198
199	status = "okay";
200
201	clock-frequency = <100000>;
202
203	ak4613: codec@10 {
204		compatible = "asahi-kasei,ak4613";
205		reg = <0x10>;
206		clocks = <&rcar_sound 3>;
207
208		asahi-kasei,in1-single-end;
209		asahi-kasei,in2-single-end;
210		asahi-kasei,out1-single-end;
211		asahi-kasei,out2-single-end;
212		asahi-kasei,out3-single-end;
213		asahi-kasei,out4-single-end;
214		asahi-kasei,out5-single-end;
215		asahi-kasei,out6-single-end;
216	};
217
218	cs2000: clk-multiplier@4f {
219		#clock-cells = <0>;
220		compatible = "cirrus,cs2000-cp";
221		reg = <0x4f>;
222		clocks = <&audio_clkout>, <&x12_clk>;
223		clock-names = "clk_in", "ref_clk";
224
225		assigned-clocks = <&cs2000>;
226		assigned-clock-rates = <24576000>; /* 1/1 divide */
227	};
228};
229
230&i2c4 {
231	status = "okay";
232
233	clock-frequency = <400000>;
234
235	versaclock5: clock-generator@6a {
236		compatible = "idt,5p49v5925";
237		reg = <0x6a>;
238		#clock-cells = <1>;
239		clocks = <&x23_clk>;
240		clock-names = "xin";
241		idt,shutdown = <0>;
242		idt,output-enable-active = <1>;
243	};
244};
245
246&i2c_dvfs {
247	status = "okay";
248
249	clock-frequency = <400000>;
250
251	pmic: pmic@30 {
252		pinctrl-0 = <&irq0_pins>;
253		pinctrl-names = "default";
254
255		compatible = "rohm,bd9571mwv";
256		reg = <0x30>;
257		interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>;
258		interrupt-controller;
259		#interrupt-cells = <2>;
260		gpio-controller;
261		#gpio-cells = <2>;
262		rohm,ddr-backup-power = <0xf>;
263		rohm,rstbmode-pulse;
264
265		regulators {
266			dvfs: dvfs {
267				regulator-name = "dvfs";
268				regulator-min-microvolt = <750000>;
269				regulator-max-microvolt = <1030000>;
270				regulator-boot-on;
271				regulator-always-on;
272			};
273		};
274	};
275
276	eeprom@50 {
277		compatible = "rohm,br24t01", "atmel,24c01";
278		reg = <0x50>;
279		pagesize = <8>;
280	};
281};
282
283&ohci1 {
284	status = "okay";
285};
286
287&pfc {
288	pinctrl-0 = <&scif_clk_pins>;
289	pinctrl-names = "default";
290
291	avb_pins: avb {
292		mux {
293			groups = "avb_link", "avb_mdio", "avb_mii";
294			function = "avb";
295		};
296
297		pins_mdio {
298			groups = "avb_mdio";
299			drive-strength = <24>;
300		};
301
302		pins_mii_tx {
303			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
304			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
305			drive-strength = <12>;
306		};
307	};
308
309	i2c2_pins: i2c2 {
310		groups = "i2c2_a";
311		function = "i2c2";
312	};
313
314	irq0_pins: irq0 {
315		groups = "intc_ex_irq0";
316		function = "intc_ex";
317	};
318
319	scif2_pins: scif2 {
320		groups = "scif2_data_a";
321		function = "scif2";
322	};
323
324	scif_clk_pins: scif_clk {
325		groups = "scif_clk_a";
326		function = "scif_clk";
327	};
328
329	sdhi0_pins: sd0 {
330		groups = "sdhi0_data4", "sdhi0_ctrl";
331		function = "sdhi0";
332		power-source = <3300>;
333	};
334
335	sdhi0_pins_uhs: sd0_uhs {
336		groups = "sdhi0_data4", "sdhi0_ctrl";
337		function = "sdhi0";
338		power-source = <1800>;
339	};
340
341	sdhi2_pins: sd2 {
342		groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
343		function = "sdhi2";
344		power-source = <1800>;
345	};
346
347	sound_pins: sound {
348		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
349		function = "ssi";
350	};
351
352	sound_clk_pins: sound-clk {
353		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
354			 "audio_clkout_a", "audio_clkout3_a";
355		function = "audio_clk";
356	};
357
358	usb1_pins: usb1 {
359		groups = "usb1";
360		function = "usb1";
361	};
362};
363
364&rcar_sound {
365	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
366	pinctrl-names = "default";
367
368	/* audio_clkout0/1/2/3 */
369	#clock-cells = <1>;
370	clock-frequency = <12288000 11289600>;
371
372	status = "okay";
373
374	/* update <audio_clk_b> to <cs2000> */
375	clocks = <&cpg CPG_MOD 1005>,
376		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
377		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
378		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
379		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
380		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
381		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
382		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
383		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
384		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
385		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
386		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
387		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
388		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
389		 <&audio_clk_a>, <&cs2000>,
390		 <&audio_clk_c>,
391		 <&cpg CPG_MOD 922>;
392};
393
394&rpc {
395	/* Left disabled.  To be enabled by firmware when unlocked. */
396
397	flash@0 {
398		compatible = "cypress,hyperflash", "cfi-flash";
399		reg = <0>;
400
401		partitions {
402			compatible = "fixed-partitions";
403			#address-cells = <1>;
404			#size-cells = <1>;
405
406			bootparam@0 {
407				reg = <0x00000000 0x040000>;
408				read-only;
409			};
410			bl2@40000 {
411				reg = <0x00040000 0x140000>;
412				read-only;
413			};
414			cert_header_sa6@180000 {
415				reg = <0x00180000 0x040000>;
416				read-only;
417			};
418			bl31@1c0000 {
419				reg = <0x001c0000 0x040000>;
420				read-only;
421			};
422			tee@200000 {
423				reg = <0x00200000 0x440000>;
424				read-only;
425			};
426			uboot@640000 {
427				reg = <0x00640000 0x100000>;
428				read-only;
429			};
430			dtb@740000 {
431				reg = <0x00740000 0x080000>;
432			};
433			kernel@7c0000 {
434				reg = <0x007c0000 0x1400000>;
435			};
436			user@1bc0000 {
437				reg = <0x01bc0000 0x2440000>;
438			};
439		};
440	};
441};
442
443&rwdt {
444	timeout-sec = <60>;
445	status = "okay";
446};
447
448&scif2 {
449	pinctrl-0 = <&scif2_pins>;
450	pinctrl-names = "default";
451
452	status = "okay";
453};
454
455&scif_clk {
456	clock-frequency = <14745600>;
457};
458
459&sdhi0 {
460	pinctrl-0 = <&sdhi0_pins>;
461	pinctrl-1 = <&sdhi0_pins_uhs>;
462	pinctrl-names = "default", "state_uhs";
463
464	vmmc-supply = <&vcc_sdhi0>;
465	vqmmc-supply = <&vccq_sdhi0>;
466	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
467	bus-width = <4>;
468	sd-uhs-sdr50;
469	sd-uhs-sdr104;
470	status = "okay";
471};
472
473&sdhi2 {
474	/* used for on-board 8bit eMMC */
475	pinctrl-0 = <&sdhi2_pins>;
476	pinctrl-1 = <&sdhi2_pins>;
477	pinctrl-names = "default", "state_uhs";
478
479	vmmc-supply = <&reg_3p3v>;
480	vqmmc-supply = <&reg_1p8v>;
481	bus-width = <8>;
482	mmc-hs200-1_8v;
483	mmc-hs400-1_8v;
484	no-sd;
485	no-sdio;
486	non-removable;
487	full-pwr-cycle-in-suspend;
488	status = "okay";
489};
490
491&ssi1 {
492	shared-pin;
493};
494
495&usb2_phy1 {
496	pinctrl-0 = <&usb1_pins>;
497	pinctrl-names = "default";
498
499	status = "okay";
500};
501
502
503/*
504 * For sound-test.
505 *
506 * We can switch Audio Card for testing
507 *
508 * #include "ulcb-simple-audio-card.dtsi"
509 * #include "ulcb-simple-audio-card-mix+split.dtsi"
510 * #include "ulcb-audio-graph-card.dtsi"
511 * #include "ulcb-audio-graph-card-mix+split.dtsi"
512 * #include "ulcb-audio-graph-card2-mix+split.dtsi"
513 */
514#include "ulcb-audio-graph-card2.dtsi"
515