1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/G2E (R8A774C0) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a774c0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a774c0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp-table-1 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 51 opp-800000000 { 52 opp-hz = /bits/ 64 <800000000>; 53 opp-microvolt = <1030000>; 54 clock-latency-ns = <300000>; 55 }; 56 opp-1000000000 { 57 opp-hz = /bits/ 64 <1000000000>; 58 opp-microvolt = <1030000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1200000000 { 62 opp-hz = /bits/ 64 <1200000000>; 63 opp-microvolt = <1030000>; 64 clock-latency-ns = <300000>; 65 opp-suspend; 66 }; 67 }; 68 69 cpus { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 a53_0: cpu@0 { 74 compatible = "arm,cortex-a53"; 75 reg = <0>; 76 device_type = "cpu"; 77 #cooling-cells = <2>; 78 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; 79 next-level-cache = <&L2_CA53>; 80 enable-method = "psci"; 81 dynamic-power-coefficient = <277>; 82 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; 83 operating-points-v2 = <&cluster1_opp>; 84 }; 85 86 a53_1: cpu@1 { 87 compatible = "arm,cortex-a53"; 88 reg = <1>; 89 device_type = "cpu"; 90 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; 91 next-level-cache = <&L2_CA53>; 92 enable-method = "psci"; 93 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; 94 operating-points-v2 = <&cluster1_opp>; 95 }; 96 97 L2_CA53: cache-controller-0 { 98 compatible = "cache"; 99 power-domains = <&sysc R8A774C0_PD_CA53_SCU>; 100 cache-unified; 101 cache-level = <2>; 102 }; 103 }; 104 105 extal_clk: extal { 106 compatible = "fixed-clock"; 107 #clock-cells = <0>; 108 /* This value must be overridden by the board */ 109 clock-frequency = <0>; 110 }; 111 112 /* External PCIe clock - can be overridden by the board */ 113 pcie_bus_clk: pcie_bus { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 clock-frequency = <0>; 117 }; 118 119 pmu_a53 { 120 compatible = "arm,cortex-a53-pmu"; 121 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 122 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 123 interrupt-affinity = <&a53_0>, <&a53_1>; 124 }; 125 126 psci { 127 compatible = "arm,psci-1.0", "arm,psci-0.2"; 128 method = "smc"; 129 }; 130 131 /* External SCIF clock - to be overridden by boards that provide it */ 132 scif_clk: scif { 133 compatible = "fixed-clock"; 134 #clock-cells = <0>; 135 clock-frequency = <0>; 136 }; 137 138 soc: soc { 139 compatible = "simple-bus"; 140 interrupt-parent = <&gic>; 141 #address-cells = <2>; 142 #size-cells = <2>; 143 ranges; 144 145 rwdt: watchdog@e6020000 { 146 compatible = "renesas,r8a774c0-wdt", 147 "renesas,rcar-gen3-wdt"; 148 reg = <0 0xe6020000 0 0x0c>; 149 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 150 clocks = <&cpg CPG_MOD 402>; 151 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 152 resets = <&cpg 402>; 153 status = "disabled"; 154 }; 155 156 gpio0: gpio@e6050000 { 157 compatible = "renesas,gpio-r8a774c0", 158 "renesas,rcar-gen3-gpio"; 159 reg = <0 0xe6050000 0 0x50>; 160 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 161 #gpio-cells = <2>; 162 gpio-controller; 163 gpio-ranges = <&pfc 0 0 18>; 164 #interrupt-cells = <2>; 165 interrupt-controller; 166 clocks = <&cpg CPG_MOD 912>; 167 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 168 resets = <&cpg 912>; 169 }; 170 171 gpio1: gpio@e6051000 { 172 compatible = "renesas,gpio-r8a774c0", 173 "renesas,rcar-gen3-gpio"; 174 reg = <0 0xe6051000 0 0x50>; 175 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 176 #gpio-cells = <2>; 177 gpio-controller; 178 gpio-ranges = <&pfc 0 32 23>; 179 #interrupt-cells = <2>; 180 interrupt-controller; 181 clocks = <&cpg CPG_MOD 911>; 182 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 183 resets = <&cpg 911>; 184 }; 185 186 gpio2: gpio@e6052000 { 187 compatible = "renesas,gpio-r8a774c0", 188 "renesas,rcar-gen3-gpio"; 189 reg = <0 0xe6052000 0 0x50>; 190 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 191 #gpio-cells = <2>; 192 gpio-controller; 193 gpio-ranges = <&pfc 0 64 26>; 194 #interrupt-cells = <2>; 195 interrupt-controller; 196 clocks = <&cpg CPG_MOD 910>; 197 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 198 resets = <&cpg 910>; 199 }; 200 201 gpio3: gpio@e6053000 { 202 compatible = "renesas,gpio-r8a774c0", 203 "renesas,rcar-gen3-gpio"; 204 reg = <0 0xe6053000 0 0x50>; 205 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 206 #gpio-cells = <2>; 207 gpio-controller; 208 gpio-ranges = <&pfc 0 96 16>; 209 #interrupt-cells = <2>; 210 interrupt-controller; 211 clocks = <&cpg CPG_MOD 909>; 212 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 213 resets = <&cpg 909>; 214 }; 215 216 gpio4: gpio@e6054000 { 217 compatible = "renesas,gpio-r8a774c0", 218 "renesas,rcar-gen3-gpio"; 219 reg = <0 0xe6054000 0 0x50>; 220 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 221 #gpio-cells = <2>; 222 gpio-controller; 223 gpio-ranges = <&pfc 0 128 11>; 224 #interrupt-cells = <2>; 225 interrupt-controller; 226 clocks = <&cpg CPG_MOD 908>; 227 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 228 resets = <&cpg 908>; 229 }; 230 231 gpio5: gpio@e6055000 { 232 compatible = "renesas,gpio-r8a774c0", 233 "renesas,rcar-gen3-gpio"; 234 reg = <0 0xe6055000 0 0x50>; 235 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 236 #gpio-cells = <2>; 237 gpio-controller; 238 gpio-ranges = <&pfc 0 160 20>; 239 #interrupt-cells = <2>; 240 interrupt-controller; 241 clocks = <&cpg CPG_MOD 907>; 242 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 243 resets = <&cpg 907>; 244 }; 245 246 gpio6: gpio@e6055400 { 247 compatible = "renesas,gpio-r8a774c0", 248 "renesas,rcar-gen3-gpio"; 249 reg = <0 0xe6055400 0 0x50>; 250 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 251 #gpio-cells = <2>; 252 gpio-controller; 253 gpio-ranges = <&pfc 0 192 18>; 254 #interrupt-cells = <2>; 255 interrupt-controller; 256 clocks = <&cpg CPG_MOD 906>; 257 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 258 resets = <&cpg 906>; 259 }; 260 261 pfc: pinctrl@e6060000 { 262 compatible = "renesas,pfc-r8a774c0"; 263 reg = <0 0xe6060000 0 0x508>; 264 }; 265 266 cmt0: timer@e60f0000 { 267 compatible = "renesas,r8a774c0-cmt0", 268 "renesas,rcar-gen3-cmt0"; 269 reg = <0 0xe60f0000 0 0x1004>; 270 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 271 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 272 clocks = <&cpg CPG_MOD 303>; 273 clock-names = "fck"; 274 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 275 resets = <&cpg 303>; 276 status = "disabled"; 277 }; 278 279 cmt1: timer@e6130000 { 280 compatible = "renesas,r8a774c0-cmt1", 281 "renesas,rcar-gen3-cmt1"; 282 reg = <0 0xe6130000 0 0x1004>; 283 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 289 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 290 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 291 clocks = <&cpg CPG_MOD 302>; 292 clock-names = "fck"; 293 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 294 resets = <&cpg 302>; 295 status = "disabled"; 296 }; 297 298 cmt2: timer@e6140000 { 299 compatible = "renesas,r8a774c0-cmt1", 300 "renesas,rcar-gen3-cmt1"; 301 reg = <0 0xe6140000 0 0x1004>; 302 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 310 clocks = <&cpg CPG_MOD 301>; 311 clock-names = "fck"; 312 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 313 resets = <&cpg 301>; 314 status = "disabled"; 315 }; 316 317 cmt3: timer@e6148000 { 318 compatible = "renesas,r8a774c0-cmt1", 319 "renesas,rcar-gen3-cmt1"; 320 reg = <0 0xe6148000 0 0x1004>; 321 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 329 clocks = <&cpg CPG_MOD 300>; 330 clock-names = "fck"; 331 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 332 resets = <&cpg 300>; 333 status = "disabled"; 334 }; 335 336 cpg: clock-controller@e6150000 { 337 compatible = "renesas,r8a774c0-cpg-mssr"; 338 reg = <0 0xe6150000 0 0x1000>; 339 clocks = <&extal_clk>; 340 clock-names = "extal"; 341 #clock-cells = <2>; 342 #power-domain-cells = <0>; 343 #reset-cells = <1>; 344 }; 345 346 rst: reset-controller@e6160000 { 347 compatible = "renesas,r8a774c0-rst"; 348 reg = <0 0xe6160000 0 0x0200>; 349 }; 350 351 sysc: system-controller@e6180000 { 352 compatible = "renesas,r8a774c0-sysc"; 353 reg = <0 0xe6180000 0 0x0400>; 354 #power-domain-cells = <1>; 355 }; 356 357 thermal: thermal@e6190000 { 358 compatible = "renesas,thermal-r8a774c0"; 359 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 360 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 363 clocks = <&cpg CPG_MOD 522>; 364 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 365 resets = <&cpg 522>; 366 #thermal-sensor-cells = <0>; 367 }; 368 369 intc_ex: interrupt-controller@e61c0000 { 370 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc"; 371 #interrupt-cells = <2>; 372 interrupt-controller; 373 reg = <0 0xe61c0000 0 0x200>; 374 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 375 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 380 clocks = <&cpg CPG_MOD 407>; 381 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 382 resets = <&cpg 407>; 383 }; 384 385 tmu0: timer@e61e0000 { 386 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 387 reg = <0 0xe61e0000 0 0x30>; 388 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 390 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 391 interrupt-names = "tuni0", "tuni1", "tuni2"; 392 clocks = <&cpg CPG_MOD 125>; 393 clock-names = "fck"; 394 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 395 resets = <&cpg 125>; 396 status = "disabled"; 397 }; 398 399 tmu1: timer@e6fc0000 { 400 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 401 reg = <0 0xe6fc0000 0 0x30>; 402 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 406 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 407 clocks = <&cpg CPG_MOD 124>; 408 clock-names = "fck"; 409 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 410 resets = <&cpg 124>; 411 status = "disabled"; 412 }; 413 414 tmu2: timer@e6fd0000 { 415 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 416 reg = <0 0xe6fd0000 0 0x30>; 417 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 421 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 422 clocks = <&cpg CPG_MOD 123>; 423 clock-names = "fck"; 424 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 425 resets = <&cpg 123>; 426 status = "disabled"; 427 }; 428 429 tmu3: timer@e6fe0000 { 430 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 431 reg = <0 0xe6fe0000 0 0x30>; 432 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 433 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 435 interrupt-names = "tuni0", "tuni1", "tuni2"; 436 clocks = <&cpg CPG_MOD 122>; 437 clock-names = "fck"; 438 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 439 resets = <&cpg 122>; 440 status = "disabled"; 441 }; 442 443 tmu4: timer@ffc00000 { 444 compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; 445 reg = <0 0xffc00000 0 0x30>; 446 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 447 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 448 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 449 interrupt-names = "tuni0", "tuni1", "tuni2"; 450 clocks = <&cpg CPG_MOD 121>; 451 clock-names = "fck"; 452 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 453 resets = <&cpg 121>; 454 status = "disabled"; 455 }; 456 457 i2c0: i2c@e6500000 { 458 #address-cells = <1>; 459 #size-cells = <0>; 460 compatible = "renesas,i2c-r8a774c0", 461 "renesas,rcar-gen3-i2c"; 462 reg = <0 0xe6500000 0 0x40>; 463 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 931>; 465 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 466 resets = <&cpg 931>; 467 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 468 <&dmac2 0x91>, <&dmac2 0x90>; 469 dma-names = "tx", "rx", "tx", "rx"; 470 i2c-scl-internal-delay-ns = <110>; 471 status = "disabled"; 472 }; 473 474 i2c1: i2c@e6508000 { 475 #address-cells = <1>; 476 #size-cells = <0>; 477 compatible = "renesas,i2c-r8a774c0", 478 "renesas,rcar-gen3-i2c"; 479 reg = <0 0xe6508000 0 0x40>; 480 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 930>; 482 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 483 resets = <&cpg 930>; 484 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 485 <&dmac2 0x93>, <&dmac2 0x92>; 486 dma-names = "tx", "rx", "tx", "rx"; 487 i2c-scl-internal-delay-ns = <6>; 488 status = "disabled"; 489 }; 490 491 i2c2: i2c@e6510000 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 compatible = "renesas,i2c-r8a774c0", 495 "renesas,rcar-gen3-i2c"; 496 reg = <0 0xe6510000 0 0x40>; 497 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 498 clocks = <&cpg CPG_MOD 929>; 499 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 500 resets = <&cpg 929>; 501 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 502 <&dmac2 0x95>, <&dmac2 0x94>; 503 dma-names = "tx", "rx", "tx", "rx"; 504 i2c-scl-internal-delay-ns = <6>; 505 status = "disabled"; 506 }; 507 508 i2c3: i2c@e66d0000 { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 compatible = "renesas,i2c-r8a774c0", 512 "renesas,rcar-gen3-i2c"; 513 reg = <0 0xe66d0000 0 0x40>; 514 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 928>; 516 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 517 resets = <&cpg 928>; 518 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 519 dma-names = "tx", "rx"; 520 i2c-scl-internal-delay-ns = <110>; 521 status = "disabled"; 522 }; 523 524 i2c4: i2c@e66d8000 { 525 #address-cells = <1>; 526 #size-cells = <0>; 527 compatible = "renesas,i2c-r8a774c0", 528 "renesas,rcar-gen3-i2c"; 529 reg = <0 0xe66d8000 0 0x40>; 530 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 531 clocks = <&cpg CPG_MOD 927>; 532 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 533 resets = <&cpg 927>; 534 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 535 dma-names = "tx", "rx"; 536 i2c-scl-internal-delay-ns = <6>; 537 status = "disabled"; 538 }; 539 540 i2c5: i2c@e66e0000 { 541 #address-cells = <1>; 542 #size-cells = <0>; 543 compatible = "renesas,i2c-r8a774c0", 544 "renesas,rcar-gen3-i2c"; 545 reg = <0 0xe66e0000 0 0x40>; 546 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 919>; 548 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 549 resets = <&cpg 919>; 550 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 551 dma-names = "tx", "rx"; 552 i2c-scl-internal-delay-ns = <6>; 553 status = "disabled"; 554 }; 555 556 i2c6: i2c@e66e8000 { 557 #address-cells = <1>; 558 #size-cells = <0>; 559 compatible = "renesas,i2c-r8a774c0", 560 "renesas,rcar-gen3-i2c"; 561 reg = <0 0xe66e8000 0 0x40>; 562 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&cpg CPG_MOD 918>; 564 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 565 resets = <&cpg 918>; 566 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 567 dma-names = "tx", "rx"; 568 i2c-scl-internal-delay-ns = <6>; 569 status = "disabled"; 570 }; 571 572 i2c7: i2c@e6690000 { 573 #address-cells = <1>; 574 #size-cells = <0>; 575 compatible = "renesas,i2c-r8a774c0", 576 "renesas,rcar-gen3-i2c"; 577 reg = <0 0xe6690000 0 0x40>; 578 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 1003>; 580 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 581 resets = <&cpg 1003>; 582 i2c-scl-internal-delay-ns = <6>; 583 status = "disabled"; 584 }; 585 586 iic_pmic: i2c@e60b0000 { 587 #address-cells = <1>; 588 #size-cells = <0>; 589 compatible = "renesas,iic-r8a774c0", 590 "renesas,rcar-gen3-iic", 591 "renesas,rmobile-iic"; 592 reg = <0 0xe60b0000 0 0x425>; 593 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 926>; 595 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 596 resets = <&cpg 926>; 597 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 598 dma-names = "tx", "rx"; 599 status = "disabled"; 600 }; 601 602 hscif0: serial@e6540000 { 603 compatible = "renesas,hscif-r8a774c0", 604 "renesas,rcar-gen3-hscif", 605 "renesas,hscif"; 606 reg = <0 0xe6540000 0 0x60>; 607 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 608 clocks = <&cpg CPG_MOD 520>, 609 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 610 <&scif_clk>; 611 clock-names = "fck", "brg_int", "scif_clk"; 612 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 613 <&dmac2 0x31>, <&dmac2 0x30>; 614 dma-names = "tx", "rx", "tx", "rx"; 615 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 616 resets = <&cpg 520>; 617 status = "disabled"; 618 }; 619 620 hscif1: serial@e6550000 { 621 compatible = "renesas,hscif-r8a774c0", 622 "renesas,rcar-gen3-hscif", 623 "renesas,hscif"; 624 reg = <0 0xe6550000 0 0x60>; 625 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 519>, 627 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 628 <&scif_clk>; 629 clock-names = "fck", "brg_int", "scif_clk"; 630 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 631 <&dmac2 0x33>, <&dmac2 0x32>; 632 dma-names = "tx", "rx", "tx", "rx"; 633 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 634 resets = <&cpg 519>; 635 status = "disabled"; 636 }; 637 638 hscif2: serial@e6560000 { 639 compatible = "renesas,hscif-r8a774c0", 640 "renesas,rcar-gen3-hscif", 641 "renesas,hscif"; 642 reg = <0 0xe6560000 0 0x60>; 643 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&cpg CPG_MOD 518>, 645 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 646 <&scif_clk>; 647 clock-names = "fck", "brg_int", "scif_clk"; 648 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 649 <&dmac2 0x35>, <&dmac2 0x34>; 650 dma-names = "tx", "rx", "tx", "rx"; 651 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 652 resets = <&cpg 518>; 653 status = "disabled"; 654 }; 655 656 hscif3: serial@e66a0000 { 657 compatible = "renesas,hscif-r8a774c0", 658 "renesas,rcar-gen3-hscif", 659 "renesas,hscif"; 660 reg = <0 0xe66a0000 0 0x60>; 661 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 517>, 663 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 664 <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 667 dma-names = "tx", "rx"; 668 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 669 resets = <&cpg 517>; 670 status = "disabled"; 671 }; 672 673 hscif4: serial@e66b0000 { 674 compatible = "renesas,hscif-r8a774c0", 675 "renesas,rcar-gen3-hscif", 676 "renesas,hscif"; 677 reg = <0 0xe66b0000 0 0x60>; 678 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 516>, 680 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 681 <&scif_clk>; 682 clock-names = "fck", "brg_int", "scif_clk"; 683 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 684 dma-names = "tx", "rx"; 685 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 686 resets = <&cpg 516>; 687 status = "disabled"; 688 }; 689 690 hsusb: usb@e6590000 { 691 compatible = "renesas,usbhs-r8a774c0", 692 "renesas,rcar-gen3-usbhs"; 693 reg = <0 0xe6590000 0 0x200>; 694 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 696 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 697 <&usb_dmac1 0>, <&usb_dmac1 1>; 698 dma-names = "ch0", "ch1", "ch2", "ch3"; 699 renesas,buswait = <11>; 700 phys = <&usb2_phy0 3>; 701 phy-names = "usb"; 702 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 703 resets = <&cpg 704>, <&cpg 703>; 704 status = "disabled"; 705 }; 706 707 usb_dmac0: dma-controller@e65a0000 { 708 compatible = "renesas,r8a774c0-usb-dmac", 709 "renesas,usb-dmac"; 710 reg = <0 0xe65a0000 0 0x100>; 711 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 713 interrupt-names = "ch0", "ch1"; 714 clocks = <&cpg CPG_MOD 330>; 715 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 716 resets = <&cpg 330>; 717 #dma-cells = <1>; 718 dma-channels = <2>; 719 }; 720 721 usb_dmac1: dma-controller@e65b0000 { 722 compatible = "renesas,r8a774c0-usb-dmac", 723 "renesas,usb-dmac"; 724 reg = <0 0xe65b0000 0 0x100>; 725 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 727 interrupt-names = "ch0", "ch1"; 728 clocks = <&cpg CPG_MOD 331>; 729 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 730 resets = <&cpg 331>; 731 #dma-cells = <1>; 732 dma-channels = <2>; 733 }; 734 735 dmac0: dma-controller@e6700000 { 736 compatible = "renesas,dmac-r8a774c0", 737 "renesas,rcar-dmac"; 738 reg = <0 0xe6700000 0 0x10000>; 739 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 756 interrupt-names = "error", 757 "ch0", "ch1", "ch2", "ch3", 758 "ch4", "ch5", "ch6", "ch7", 759 "ch8", "ch9", "ch10", "ch11", 760 "ch12", "ch13", "ch14", "ch15"; 761 clocks = <&cpg CPG_MOD 219>; 762 clock-names = "fck"; 763 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 764 resets = <&cpg 219>; 765 #dma-cells = <1>; 766 dma-channels = <16>; 767 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 768 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 769 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 770 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 771 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 772 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 773 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 774 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 775 }; 776 777 dmac1: dma-controller@e7300000 { 778 compatible = "renesas,dmac-r8a774c0", 779 "renesas,rcar-dmac"; 780 reg = <0 0xe7300000 0 0x10000>; 781 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 798 interrupt-names = "error", 799 "ch0", "ch1", "ch2", "ch3", 800 "ch4", "ch5", "ch6", "ch7", 801 "ch8", "ch9", "ch10", "ch11", 802 "ch12", "ch13", "ch14", "ch15"; 803 clocks = <&cpg CPG_MOD 218>; 804 clock-names = "fck"; 805 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 806 resets = <&cpg 218>; 807 #dma-cells = <1>; 808 dma-channels = <16>; 809 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 810 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 811 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 812 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 813 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 814 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 815 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 816 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 817 }; 818 819 dmac2: dma-controller@e7310000 { 820 compatible = "renesas,dmac-r8a774c0", 821 "renesas,rcar-dmac"; 822 reg = <0 0xe7310000 0 0x10000>; 823 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 840 interrupt-names = "error", 841 "ch0", "ch1", "ch2", "ch3", 842 "ch4", "ch5", "ch6", "ch7", 843 "ch8", "ch9", "ch10", "ch11", 844 "ch12", "ch13", "ch14", "ch15"; 845 clocks = <&cpg CPG_MOD 217>; 846 clock-names = "fck"; 847 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 848 resets = <&cpg 217>; 849 #dma-cells = <1>; 850 dma-channels = <16>; 851 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 852 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 853 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 854 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 855 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 856 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 857 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 858 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 859 }; 860 861 ipmmu_ds0: iommu@e6740000 { 862 compatible = "renesas,ipmmu-r8a774c0"; 863 reg = <0 0xe6740000 0 0x1000>; 864 renesas,ipmmu-main = <&ipmmu_mm 0>; 865 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 866 #iommu-cells = <1>; 867 }; 868 869 ipmmu_ds1: iommu@e7740000 { 870 compatible = "renesas,ipmmu-r8a774c0"; 871 reg = <0 0xe7740000 0 0x1000>; 872 renesas,ipmmu-main = <&ipmmu_mm 1>; 873 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 874 #iommu-cells = <1>; 875 }; 876 877 ipmmu_hc: iommu@e6570000 { 878 compatible = "renesas,ipmmu-r8a774c0"; 879 reg = <0 0xe6570000 0 0x1000>; 880 renesas,ipmmu-main = <&ipmmu_mm 2>; 881 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 882 #iommu-cells = <1>; 883 }; 884 885 ipmmu_mm: iommu@e67b0000 { 886 compatible = "renesas,ipmmu-r8a774c0"; 887 reg = <0 0xe67b0000 0 0x1000>; 888 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 890 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 891 #iommu-cells = <1>; 892 }; 893 894 ipmmu_mp: iommu@ec670000 { 895 compatible = "renesas,ipmmu-r8a774c0"; 896 reg = <0 0xec670000 0 0x1000>; 897 renesas,ipmmu-main = <&ipmmu_mm 4>; 898 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 899 #iommu-cells = <1>; 900 }; 901 902 ipmmu_pv0: iommu@fd800000 { 903 compatible = "renesas,ipmmu-r8a774c0"; 904 reg = <0 0xfd800000 0 0x1000>; 905 renesas,ipmmu-main = <&ipmmu_mm 6>; 906 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 907 #iommu-cells = <1>; 908 }; 909 910 ipmmu_vc0: iommu@fe6b0000 { 911 compatible = "renesas,ipmmu-r8a774c0"; 912 reg = <0 0xfe6b0000 0 0x1000>; 913 renesas,ipmmu-main = <&ipmmu_mm 12>; 914 power-domains = <&sysc R8A774C0_PD_A3VC>; 915 #iommu-cells = <1>; 916 }; 917 918 ipmmu_vi0: iommu@febd0000 { 919 compatible = "renesas,ipmmu-r8a774c0"; 920 reg = <0 0xfebd0000 0 0x1000>; 921 renesas,ipmmu-main = <&ipmmu_mm 14>; 922 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 923 #iommu-cells = <1>; 924 }; 925 926 ipmmu_vp0: iommu@fe990000 { 927 compatible = "renesas,ipmmu-r8a774c0"; 928 reg = <0 0xfe990000 0 0x1000>; 929 renesas,ipmmu-main = <&ipmmu_mm 16>; 930 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 931 #iommu-cells = <1>; 932 }; 933 934 avb: ethernet@e6800000 { 935 compatible = "renesas,etheravb-r8a774c0", 936 "renesas,etheravb-rcar-gen3"; 937 reg = <0 0xe6800000 0 0x800>; 938 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 963 interrupt-names = "ch0", "ch1", "ch2", "ch3", 964 "ch4", "ch5", "ch6", "ch7", 965 "ch8", "ch9", "ch10", "ch11", 966 "ch12", "ch13", "ch14", "ch15", 967 "ch16", "ch17", "ch18", "ch19", 968 "ch20", "ch21", "ch22", "ch23", 969 "ch24"; 970 clocks = <&cpg CPG_MOD 812>; 971 clock-names = "fck"; 972 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 973 resets = <&cpg 812>; 974 phy-mode = "rgmii"; 975 rx-internal-delay-ps = <0>; 976 iommus = <&ipmmu_ds0 16>; 977 #address-cells = <1>; 978 #size-cells = <0>; 979 status = "disabled"; 980 }; 981 982 can0: can@e6c30000 { 983 compatible = "renesas,can-r8a774c0", 984 "renesas,rcar-gen3-can"; 985 reg = <0 0xe6c30000 0 0x1000>; 986 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 987 clocks = <&cpg CPG_MOD 916>, 988 <&cpg CPG_CORE R8A774C0_CLK_CANFD>, 989 <&can_clk>; 990 clock-names = "clkp1", "clkp2", "can_clk"; 991 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; 992 assigned-clock-rates = <40000000>; 993 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 994 resets = <&cpg 916>; 995 status = "disabled"; 996 }; 997 998 can1: can@e6c38000 { 999 compatible = "renesas,can-r8a774c0", 1000 "renesas,rcar-gen3-can"; 1001 reg = <0 0xe6c38000 0 0x1000>; 1002 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1003 clocks = <&cpg CPG_MOD 915>, 1004 <&cpg CPG_CORE R8A774C0_CLK_CANFD>, 1005 <&can_clk>; 1006 clock-names = "clkp1", "clkp2", "can_clk"; 1007 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; 1008 assigned-clock-rates = <40000000>; 1009 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1010 resets = <&cpg 915>; 1011 status = "disabled"; 1012 }; 1013 1014 canfd: can@e66c0000 { 1015 compatible = "renesas,r8a774c0-canfd", 1016 "renesas,rcar-gen3-canfd"; 1017 reg = <0 0xe66c0000 0 0x8000>; 1018 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1020 interrupt-names = "ch_int", "g_int"; 1021 clocks = <&cpg CPG_MOD 914>, 1022 <&cpg CPG_CORE R8A774C0_CLK_CANFD>, 1023 <&can_clk>; 1024 clock-names = "fck", "canfd", "can_clk"; 1025 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; 1026 assigned-clock-rates = <40000000>; 1027 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1028 resets = <&cpg 914>; 1029 status = "disabled"; 1030 1031 channel0 { 1032 status = "disabled"; 1033 }; 1034 1035 channel1 { 1036 status = "disabled"; 1037 }; 1038 }; 1039 1040 pwm0: pwm@e6e30000 { 1041 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1042 reg = <0 0xe6e30000 0 0x8>; 1043 clocks = <&cpg CPG_MOD 523>; 1044 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1045 resets = <&cpg 523>; 1046 #pwm-cells = <2>; 1047 status = "disabled"; 1048 }; 1049 1050 pwm1: pwm@e6e31000 { 1051 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1052 reg = <0 0xe6e31000 0 0x8>; 1053 clocks = <&cpg CPG_MOD 523>; 1054 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1055 resets = <&cpg 523>; 1056 #pwm-cells = <2>; 1057 status = "disabled"; 1058 }; 1059 1060 pwm2: pwm@e6e32000 { 1061 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1062 reg = <0 0xe6e32000 0 0x8>; 1063 clocks = <&cpg CPG_MOD 523>; 1064 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1065 resets = <&cpg 523>; 1066 #pwm-cells = <2>; 1067 status = "disabled"; 1068 }; 1069 1070 pwm3: pwm@e6e33000 { 1071 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1072 reg = <0 0xe6e33000 0 0x8>; 1073 clocks = <&cpg CPG_MOD 523>; 1074 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1075 resets = <&cpg 523>; 1076 #pwm-cells = <2>; 1077 status = "disabled"; 1078 }; 1079 1080 pwm4: pwm@e6e34000 { 1081 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1082 reg = <0 0xe6e34000 0 0x8>; 1083 clocks = <&cpg CPG_MOD 523>; 1084 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1085 resets = <&cpg 523>; 1086 #pwm-cells = <2>; 1087 status = "disabled"; 1088 }; 1089 1090 pwm5: pwm@e6e35000 { 1091 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1092 reg = <0 0xe6e35000 0 0x8>; 1093 clocks = <&cpg CPG_MOD 523>; 1094 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1095 resets = <&cpg 523>; 1096 #pwm-cells = <2>; 1097 status = "disabled"; 1098 }; 1099 1100 pwm6: pwm@e6e36000 { 1101 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; 1102 reg = <0 0xe6e36000 0 0x8>; 1103 clocks = <&cpg CPG_MOD 523>; 1104 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1105 resets = <&cpg 523>; 1106 #pwm-cells = <2>; 1107 status = "disabled"; 1108 }; 1109 1110 scif0: serial@e6e60000 { 1111 compatible = "renesas,scif-r8a774c0", 1112 "renesas,rcar-gen3-scif", "renesas,scif"; 1113 reg = <0 0xe6e60000 0 64>; 1114 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1115 clocks = <&cpg CPG_MOD 207>, 1116 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1117 <&scif_clk>; 1118 clock-names = "fck", "brg_int", "scif_clk"; 1119 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1120 <&dmac2 0x51>, <&dmac2 0x50>; 1121 dma-names = "tx", "rx", "tx", "rx"; 1122 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1123 resets = <&cpg 207>; 1124 status = "disabled"; 1125 }; 1126 1127 scif1: serial@e6e68000 { 1128 compatible = "renesas,scif-r8a774c0", 1129 "renesas,rcar-gen3-scif", "renesas,scif"; 1130 reg = <0 0xe6e68000 0 64>; 1131 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1132 clocks = <&cpg CPG_MOD 206>, 1133 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1134 <&scif_clk>; 1135 clock-names = "fck", "brg_int", "scif_clk"; 1136 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1137 <&dmac2 0x53>, <&dmac2 0x52>; 1138 dma-names = "tx", "rx", "tx", "rx"; 1139 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1140 resets = <&cpg 206>; 1141 status = "disabled"; 1142 }; 1143 1144 scif2: serial@e6e88000 { 1145 compatible = "renesas,scif-r8a774c0", 1146 "renesas,rcar-gen3-scif", "renesas,scif"; 1147 reg = <0 0xe6e88000 0 64>; 1148 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1149 clocks = <&cpg CPG_MOD 310>, 1150 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1151 <&scif_clk>; 1152 clock-names = "fck", "brg_int", "scif_clk"; 1153 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1154 <&dmac2 0x13>, <&dmac2 0x12>; 1155 dma-names = "tx", "rx", "tx", "rx"; 1156 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1157 resets = <&cpg 310>; 1158 status = "disabled"; 1159 }; 1160 1161 scif3: serial@e6c50000 { 1162 compatible = "renesas,scif-r8a774c0", 1163 "renesas,rcar-gen3-scif", "renesas,scif"; 1164 reg = <0 0xe6c50000 0 64>; 1165 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1166 clocks = <&cpg CPG_MOD 204>, 1167 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1168 <&scif_clk>; 1169 clock-names = "fck", "brg_int", "scif_clk"; 1170 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1171 dma-names = "tx", "rx"; 1172 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1173 resets = <&cpg 204>; 1174 status = "disabled"; 1175 }; 1176 1177 scif4: serial@e6c40000 { 1178 compatible = "renesas,scif-r8a774c0", 1179 "renesas,rcar-gen3-scif", "renesas,scif"; 1180 reg = <0 0xe6c40000 0 64>; 1181 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1182 clocks = <&cpg CPG_MOD 203>, 1183 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1184 <&scif_clk>; 1185 clock-names = "fck", "brg_int", "scif_clk"; 1186 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1187 dma-names = "tx", "rx"; 1188 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1189 resets = <&cpg 203>; 1190 status = "disabled"; 1191 }; 1192 1193 scif5: serial@e6f30000 { 1194 compatible = "renesas,scif-r8a774c0", 1195 "renesas,rcar-gen3-scif", "renesas,scif"; 1196 reg = <0 0xe6f30000 0 64>; 1197 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 202>, 1199 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, 1200 <&scif_clk>; 1201 clock-names = "fck", "brg_int", "scif_clk"; 1202 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1203 dma-names = "tx", "rx"; 1204 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1205 resets = <&cpg 202>; 1206 status = "disabled"; 1207 }; 1208 1209 msiof0: spi@e6e90000 { 1210 compatible = "renesas,msiof-r8a774c0", 1211 "renesas,rcar-gen3-msiof"; 1212 reg = <0 0xe6e90000 0 0x0064>; 1213 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1214 clocks = <&cpg CPG_MOD 211>; 1215 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1216 <&dmac2 0x41>, <&dmac2 0x40>; 1217 dma-names = "tx", "rx", "tx", "rx"; 1218 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1219 resets = <&cpg 211>; 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 status = "disabled"; 1223 }; 1224 1225 msiof1: spi@e6ea0000 { 1226 compatible = "renesas,msiof-r8a774c0", 1227 "renesas,rcar-gen3-msiof"; 1228 reg = <0 0xe6ea0000 0 0x0064>; 1229 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 210>; 1231 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1232 dma-names = "tx", "rx"; 1233 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1234 resets = <&cpg 210>; 1235 #address-cells = <1>; 1236 #size-cells = <0>; 1237 status = "disabled"; 1238 }; 1239 1240 msiof2: spi@e6c00000 { 1241 compatible = "renesas,msiof-r8a774c0", 1242 "renesas,rcar-gen3-msiof"; 1243 reg = <0 0xe6c00000 0 0x0064>; 1244 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1245 clocks = <&cpg CPG_MOD 209>; 1246 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1247 dma-names = "tx", "rx"; 1248 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1249 resets = <&cpg 209>; 1250 #address-cells = <1>; 1251 #size-cells = <0>; 1252 status = "disabled"; 1253 }; 1254 1255 msiof3: spi@e6c10000 { 1256 compatible = "renesas,msiof-r8a774c0", 1257 "renesas,rcar-gen3-msiof"; 1258 reg = <0 0xe6c10000 0 0x0064>; 1259 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1260 clocks = <&cpg CPG_MOD 208>; 1261 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1262 dma-names = "tx", "rx"; 1263 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1264 resets = <&cpg 208>; 1265 #address-cells = <1>; 1266 #size-cells = <0>; 1267 status = "disabled"; 1268 }; 1269 1270 vin4: video@e6ef4000 { 1271 compatible = "renesas,vin-r8a774c0"; 1272 reg = <0 0xe6ef4000 0 0x1000>; 1273 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1274 clocks = <&cpg CPG_MOD 807>; 1275 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1276 resets = <&cpg 807>; 1277 renesas,id = <4>; 1278 status = "disabled"; 1279 1280 ports { 1281 #address-cells = <1>; 1282 #size-cells = <0>; 1283 1284 port@1 { 1285 #address-cells = <1>; 1286 #size-cells = <0>; 1287 1288 reg = <1>; 1289 1290 vin4csi40: endpoint@2 { 1291 reg = <2>; 1292 remote-endpoint = <&csi40vin4>; 1293 }; 1294 }; 1295 }; 1296 }; 1297 1298 vin5: video@e6ef5000 { 1299 compatible = "renesas,vin-r8a774c0"; 1300 reg = <0 0xe6ef5000 0 0x1000>; 1301 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1302 clocks = <&cpg CPG_MOD 806>; 1303 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1304 resets = <&cpg 806>; 1305 renesas,id = <5>; 1306 status = "disabled"; 1307 1308 ports { 1309 #address-cells = <1>; 1310 #size-cells = <0>; 1311 1312 port@1 { 1313 #address-cells = <1>; 1314 #size-cells = <0>; 1315 1316 reg = <1>; 1317 1318 vin5csi40: endpoint@2 { 1319 reg = <2>; 1320 remote-endpoint = <&csi40vin5>; 1321 }; 1322 }; 1323 }; 1324 }; 1325 1326 rcar_sound: sound@ec500000 { 1327 /* 1328 * #sound-dai-cells is required if simple-card 1329 * 1330 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1331 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1332 */ 1333 /* 1334 * #clock-cells is required for audio_clkout0/1/2/3 1335 * 1336 * clkout : #clock-cells = <0>; <&rcar_sound>; 1337 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1338 */ 1339 compatible = "renesas,rcar_sound-r8a774c0", 1340 "renesas,rcar_sound-gen3"; 1341 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1342 <0 0xec5a0000 0 0x100>, /* ADG */ 1343 <0 0xec540000 0 0x1000>, /* SSIU */ 1344 <0 0xec541000 0 0x280>, /* SSI */ 1345 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1346 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1347 1348 clocks = <&cpg CPG_MOD 1005>, 1349 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1350 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1351 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1352 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1353 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1354 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1355 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1356 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1357 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1358 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1359 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1360 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1361 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1362 <&audio_clk_a>, <&audio_clk_b>, 1363 <&audio_clk_c>, 1364 <&cpg CPG_MOD 922>; 1365 clock-names = "ssi-all", 1366 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1367 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1368 "ssi.1", "ssi.0", 1369 "src.9", "src.8", "src.7", "src.6", 1370 "src.5", "src.4", "src.3", "src.2", 1371 "src.1", "src.0", 1372 "mix.1", "mix.0", 1373 "ctu.1", "ctu.0", 1374 "dvc.0", "dvc.1", 1375 "clk_a", "clk_b", "clk_c", "clk_i"; 1376 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1377 resets = <&cpg 1005>, 1378 <&cpg 1006>, <&cpg 1007>, 1379 <&cpg 1008>, <&cpg 1009>, 1380 <&cpg 1010>, <&cpg 1011>, 1381 <&cpg 1012>, <&cpg 1013>, 1382 <&cpg 1014>, <&cpg 1015>; 1383 reset-names = "ssi-all", 1384 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1385 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1386 "ssi.1", "ssi.0"; 1387 status = "disabled"; 1388 1389 rcar_sound,ctu { 1390 ctu00: ctu-0 { }; 1391 ctu01: ctu-1 { }; 1392 ctu02: ctu-2 { }; 1393 ctu03: ctu-3 { }; 1394 ctu10: ctu-4 { }; 1395 ctu11: ctu-5 { }; 1396 ctu12: ctu-6 { }; 1397 ctu13: ctu-7 { }; 1398 }; 1399 1400 rcar_sound,dvc { 1401 dvc0: dvc-0 { 1402 dmas = <&audma0 0xbc>; 1403 dma-names = "tx"; 1404 }; 1405 dvc1: dvc-1 { 1406 dmas = <&audma0 0xbe>; 1407 dma-names = "tx"; 1408 }; 1409 }; 1410 1411 rcar_sound,mix { 1412 mix0: mix-0 { }; 1413 mix1: mix-1 { }; 1414 }; 1415 1416 rcar_sound,src { 1417 src0: src-0 { 1418 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1419 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1420 dma-names = "rx", "tx"; 1421 }; 1422 src1: src-1 { 1423 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1424 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1425 dma-names = "rx", "tx"; 1426 }; 1427 src2: src-2 { 1428 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1429 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1430 dma-names = "rx", "tx"; 1431 }; 1432 src3: src-3 { 1433 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1434 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1435 dma-names = "rx", "tx"; 1436 }; 1437 src4: src-4 { 1438 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1439 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1440 dma-names = "rx", "tx"; 1441 }; 1442 src5: src-5 { 1443 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1444 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1445 dma-names = "rx", "tx"; 1446 }; 1447 src6: src-6 { 1448 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1449 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1450 dma-names = "rx", "tx"; 1451 }; 1452 src7: src-7 { 1453 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1454 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1455 dma-names = "rx", "tx"; 1456 }; 1457 src8: src-8 { 1458 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1459 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1460 dma-names = "rx", "tx"; 1461 }; 1462 src9: src-9 { 1463 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1464 dmas = <&audma0 0x97>, <&audma0 0xba>; 1465 dma-names = "rx", "tx"; 1466 }; 1467 }; 1468 1469 rcar_sound,ssi { 1470 ssi0: ssi-0 { 1471 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1472 dmas = <&audma0 0x01>, <&audma0 0x02>, 1473 <&audma0 0x15>, <&audma0 0x16>; 1474 dma-names = "rx", "tx", "rxu", "txu"; 1475 }; 1476 ssi1: ssi-1 { 1477 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1478 dmas = <&audma0 0x03>, <&audma0 0x04>, 1479 <&audma0 0x49>, <&audma0 0x4a>; 1480 dma-names = "rx", "tx", "rxu", "txu"; 1481 }; 1482 ssi2: ssi-2 { 1483 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1484 dmas = <&audma0 0x05>, <&audma0 0x06>, 1485 <&audma0 0x63>, <&audma0 0x64>; 1486 dma-names = "rx", "tx", "rxu", "txu"; 1487 }; 1488 ssi3: ssi-3 { 1489 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1490 dmas = <&audma0 0x07>, <&audma0 0x08>, 1491 <&audma0 0x6f>, <&audma0 0x70>; 1492 dma-names = "rx", "tx", "rxu", "txu"; 1493 }; 1494 ssi4: ssi-4 { 1495 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1496 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1497 <&audma0 0x71>, <&audma0 0x72>; 1498 dma-names = "rx", "tx", "rxu", "txu"; 1499 }; 1500 ssi5: ssi-5 { 1501 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1502 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1503 <&audma0 0x73>, <&audma0 0x74>; 1504 dma-names = "rx", "tx", "rxu", "txu"; 1505 }; 1506 ssi6: ssi-6 { 1507 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1508 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1509 <&audma0 0x75>, <&audma0 0x76>; 1510 dma-names = "rx", "tx", "rxu", "txu"; 1511 }; 1512 ssi7: ssi-7 { 1513 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1514 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1515 <&audma0 0x79>, <&audma0 0x7a>; 1516 dma-names = "rx", "tx", "rxu", "txu"; 1517 }; 1518 ssi8: ssi-8 { 1519 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1520 dmas = <&audma0 0x11>, <&audma0 0x12>, 1521 <&audma0 0x7b>, <&audma0 0x7c>; 1522 dma-names = "rx", "tx", "rxu", "txu"; 1523 }; 1524 ssi9: ssi-9 { 1525 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1526 dmas = <&audma0 0x13>, <&audma0 0x14>, 1527 <&audma0 0x7d>, <&audma0 0x7e>; 1528 dma-names = "rx", "tx", "rxu", "txu"; 1529 }; 1530 }; 1531 }; 1532 1533 audma0: dma-controller@ec700000 { 1534 compatible = "renesas,dmac-r8a774c0", 1535 "renesas,rcar-dmac"; 1536 reg = <0 0xec700000 0 0x10000>; 1537 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1538 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1539 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1540 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1541 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1542 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1543 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1544 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1545 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1546 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1547 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1548 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1549 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1550 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1551 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1552 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1553 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1554 interrupt-names = "error", 1555 "ch0", "ch1", "ch2", "ch3", 1556 "ch4", "ch5", "ch6", "ch7", 1557 "ch8", "ch9", "ch10", "ch11", 1558 "ch12", "ch13", "ch14", "ch15"; 1559 clocks = <&cpg CPG_MOD 502>; 1560 clock-names = "fck"; 1561 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1562 resets = <&cpg 502>; 1563 #dma-cells = <1>; 1564 dma-channels = <16>; 1565 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1566 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1567 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1568 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1569 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1570 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1571 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1572 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1573 }; 1574 1575 xhci0: usb@ee000000 { 1576 compatible = "renesas,xhci-r8a774c0", 1577 "renesas,rcar-gen3-xhci"; 1578 reg = <0 0xee000000 0 0xc00>; 1579 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1580 clocks = <&cpg CPG_MOD 328>; 1581 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1582 resets = <&cpg 328>; 1583 status = "disabled"; 1584 }; 1585 1586 usb3_peri0: usb@ee020000 { 1587 compatible = "renesas,r8a774c0-usb3-peri", 1588 "renesas,rcar-gen3-usb3-peri"; 1589 reg = <0 0xee020000 0 0x400>; 1590 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1591 clocks = <&cpg CPG_MOD 328>; 1592 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1593 resets = <&cpg 328>; 1594 status = "disabled"; 1595 }; 1596 1597 ohci0: usb@ee080000 { 1598 compatible = "generic-ohci"; 1599 reg = <0 0xee080000 0 0x100>; 1600 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1602 phys = <&usb2_phy0 1>; 1603 phy-names = "usb"; 1604 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1605 resets = <&cpg 703>, <&cpg 704>; 1606 status = "disabled"; 1607 }; 1608 1609 ehci0: usb@ee080100 { 1610 compatible = "generic-ehci"; 1611 reg = <0 0xee080100 0 0x100>; 1612 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1613 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1614 phys = <&usb2_phy0 2>; 1615 phy-names = "usb"; 1616 companion = <&ohci0>; 1617 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1618 resets = <&cpg 703>, <&cpg 704>; 1619 status = "disabled"; 1620 }; 1621 1622 usb2_phy0: usb-phy@ee080200 { 1623 compatible = "renesas,usb2-phy-r8a774c0", 1624 "renesas,rcar-gen3-usb2-phy"; 1625 reg = <0 0xee080200 0 0x700>; 1626 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1627 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1628 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1629 resets = <&cpg 703>, <&cpg 704>; 1630 #phy-cells = <1>; 1631 status = "disabled"; 1632 }; 1633 1634 sdhi0: mmc@ee100000 { 1635 compatible = "renesas,sdhi-r8a774c0", 1636 "renesas,rcar-gen3-sdhi"; 1637 reg = <0 0xee100000 0 0x2000>; 1638 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1639 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>; 1640 clock-names = "core", "clkh"; 1641 max-frequency = <200000000>; 1642 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1643 resets = <&cpg 314>; 1644 iommus = <&ipmmu_ds1 32>; 1645 status = "disabled"; 1646 }; 1647 1648 sdhi1: mmc@ee120000 { 1649 compatible = "renesas,sdhi-r8a774c0", 1650 "renesas,rcar-gen3-sdhi"; 1651 reg = <0 0xee120000 0 0x2000>; 1652 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1653 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>; 1654 clock-names = "core", "clkh"; 1655 max-frequency = <200000000>; 1656 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1657 resets = <&cpg 313>; 1658 iommus = <&ipmmu_ds1 33>; 1659 status = "disabled"; 1660 }; 1661 1662 sdhi3: mmc@ee160000 { 1663 compatible = "renesas,sdhi-r8a774c0", 1664 "renesas,rcar-gen3-sdhi"; 1665 reg = <0 0xee160000 0 0x2000>; 1666 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1667 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>; 1668 clock-names = "core", "clkh"; 1669 max-frequency = <200000000>; 1670 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1671 resets = <&cpg 311>; 1672 iommus = <&ipmmu_ds1 35>; 1673 status = "disabled"; 1674 }; 1675 1676 rpc: spi@ee200000 { 1677 compatible = "renesas,r8a774c0-rpc-if", 1678 "renesas,rcar-gen3-rpc-if"; 1679 reg = <0 0xee200000 0 0x200>, 1680 <0 0x08000000 0 0x4000000>, 1681 <0 0xee208000 0 0x100>; 1682 reg-names = "regs", "dirmap", "wbuf"; 1683 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1684 clocks = <&cpg CPG_MOD 917>; 1685 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1686 resets = <&cpg 917>; 1687 #address-cells = <1>; 1688 #size-cells = <0>; 1689 status = "disabled"; 1690 }; 1691 1692 gic: interrupt-controller@f1010000 { 1693 compatible = "arm,gic-400"; 1694 #interrupt-cells = <3>; 1695 #address-cells = <0>; 1696 interrupt-controller; 1697 reg = <0x0 0xf1010000 0 0x1000>, 1698 <0x0 0xf1020000 0 0x20000>, 1699 <0x0 0xf1040000 0 0x20000>, 1700 <0x0 0xf1060000 0 0x20000>; 1701 interrupts = <GIC_PPI 9 1702 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1703 clocks = <&cpg CPG_MOD 408>; 1704 clock-names = "clk"; 1705 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1706 resets = <&cpg 408>; 1707 }; 1708 1709 pciec0: pcie@fe000000 { 1710 compatible = "renesas,pcie-r8a774c0", 1711 "renesas,pcie-rcar-gen3"; 1712 reg = <0 0xfe000000 0 0x80000>; 1713 #address-cells = <3>; 1714 #size-cells = <2>; 1715 bus-range = <0x00 0xff>; 1716 device_type = "pci"; 1717 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1718 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1719 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1720 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1721 /* Map all possible DDR/IOMMU as inbound ranges */ 1722 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 1723 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1724 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1725 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1726 #interrupt-cells = <1>; 1727 interrupt-map-mask = <0 0 0 0>; 1728 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1729 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1730 clock-names = "pcie", "pcie_bus"; 1731 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1732 resets = <&cpg 319>; 1733 iommu-map = <0 &ipmmu_hc 0 1>; 1734 iommu-map-mask = <0>; 1735 status = "disabled"; 1736 }; 1737 1738 pciec0_ep: pcie-ep@fe000000 { 1739 compatible = "renesas,r8a774c0-pcie-ep", 1740 "renesas,rcar-gen3-pcie-ep"; 1741 reg = <0x0 0xfe000000 0 0x80000>, 1742 <0x0 0xfe100000 0 0x100000>, 1743 <0x0 0xfe200000 0 0x200000>, 1744 <0x0 0x30000000 0 0x8000000>, 1745 <0x0 0x38000000 0 0x8000000>; 1746 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 1747 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1748 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1749 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1750 clocks = <&cpg CPG_MOD 319>; 1751 clock-names = "pcie"; 1752 resets = <&cpg 319>; 1753 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1754 status = "disabled"; 1755 }; 1756 1757 vspb0: vsp@fe960000 { 1758 compatible = "renesas,vsp2"; 1759 reg = <0 0xfe960000 0 0x8000>; 1760 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1761 clocks = <&cpg CPG_MOD 626>; 1762 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1763 resets = <&cpg 626>; 1764 renesas,fcp = <&fcpvb0>; 1765 }; 1766 1767 vspd0: vsp@fea20000 { 1768 compatible = "renesas,vsp2"; 1769 reg = <0 0xfea20000 0 0x7000>; 1770 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1771 clocks = <&cpg CPG_MOD 623>; 1772 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1773 resets = <&cpg 623>; 1774 renesas,fcp = <&fcpvd0>; 1775 }; 1776 1777 vspd1: vsp@fea28000 { 1778 compatible = "renesas,vsp2"; 1779 reg = <0 0xfea28000 0 0x7000>; 1780 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1781 clocks = <&cpg CPG_MOD 622>; 1782 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1783 resets = <&cpg 622>; 1784 renesas,fcp = <&fcpvd1>; 1785 }; 1786 1787 vspi0: vsp@fe9a0000 { 1788 compatible = "renesas,vsp2"; 1789 reg = <0 0xfe9a0000 0 0x8000>; 1790 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1791 clocks = <&cpg CPG_MOD 631>; 1792 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1793 resets = <&cpg 631>; 1794 renesas,fcp = <&fcpvi0>; 1795 }; 1796 1797 fcpvb0: fcp@fe96f000 { 1798 compatible = "renesas,fcpv"; 1799 reg = <0 0xfe96f000 0 0x200>; 1800 clocks = <&cpg CPG_MOD 607>; 1801 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1802 resets = <&cpg 607>; 1803 iommus = <&ipmmu_vp0 5>; 1804 }; 1805 1806 fcpvd0: fcp@fea27000 { 1807 compatible = "renesas,fcpv"; 1808 reg = <0 0xfea27000 0 0x200>; 1809 clocks = <&cpg CPG_MOD 603>; 1810 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1811 resets = <&cpg 603>; 1812 iommus = <&ipmmu_vi0 8>; 1813 }; 1814 1815 fcpvd1: fcp@fea2f000 { 1816 compatible = "renesas,fcpv"; 1817 reg = <0 0xfea2f000 0 0x200>; 1818 clocks = <&cpg CPG_MOD 602>; 1819 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1820 resets = <&cpg 602>; 1821 iommus = <&ipmmu_vi0 9>; 1822 }; 1823 1824 fcpvi0: fcp@fe9af000 { 1825 compatible = "renesas,fcpv"; 1826 reg = <0 0xfe9af000 0 0x200>; 1827 clocks = <&cpg CPG_MOD 611>; 1828 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1829 resets = <&cpg 611>; 1830 iommus = <&ipmmu_vp0 8>; 1831 }; 1832 1833 csi40: csi2@feaa0000 { 1834 compatible = "renesas,r8a774c0-csi2"; 1835 reg = <0 0xfeaa0000 0 0x10000>; 1836 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1837 clocks = <&cpg CPG_MOD 716>; 1838 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1839 resets = <&cpg 716>; 1840 status = "disabled"; 1841 1842 ports { 1843 #address-cells = <1>; 1844 #size-cells = <0>; 1845 1846 port@0 { 1847 reg = <0>; 1848 }; 1849 1850 port@1 { 1851 #address-cells = <1>; 1852 #size-cells = <0>; 1853 1854 reg = <1>; 1855 1856 csi40vin4: endpoint@0 { 1857 reg = <0>; 1858 remote-endpoint = <&vin4csi40>; 1859 }; 1860 csi40vin5: endpoint@1 { 1861 reg = <1>; 1862 remote-endpoint = <&vin5csi40>; 1863 }; 1864 }; 1865 }; 1866 }; 1867 1868 du: display@feb00000 { 1869 compatible = "renesas,du-r8a774c0"; 1870 reg = <0 0xfeb00000 0 0x40000>; 1871 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1872 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1873 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1874 clock-names = "du.0", "du.1"; 1875 resets = <&cpg 724>; 1876 reset-names = "du.0"; 1877 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 1878 1879 status = "disabled"; 1880 1881 ports { 1882 #address-cells = <1>; 1883 #size-cells = <0>; 1884 1885 port@0 { 1886 reg = <0>; 1887 }; 1888 1889 port@1 { 1890 reg = <1>; 1891 du_out_lvds0: endpoint { 1892 remote-endpoint = <&lvds0_in>; 1893 }; 1894 }; 1895 1896 port@2 { 1897 reg = <2>; 1898 du_out_lvds1: endpoint { 1899 remote-endpoint = <&lvds1_in>; 1900 }; 1901 }; 1902 }; 1903 }; 1904 1905 lvds0: lvds-encoder@feb90000 { 1906 compatible = "renesas,r8a774c0-lvds"; 1907 reg = <0 0xfeb90000 0 0x20>; 1908 clocks = <&cpg CPG_MOD 727>; 1909 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1910 resets = <&cpg 727>; 1911 status = "disabled"; 1912 1913 renesas,companion = <&lvds1>; 1914 1915 ports { 1916 #address-cells = <1>; 1917 #size-cells = <0>; 1918 1919 port@0 { 1920 reg = <0>; 1921 lvds0_in: endpoint { 1922 remote-endpoint = <&du_out_lvds0>; 1923 }; 1924 }; 1925 1926 port@1 { 1927 reg = <1>; 1928 }; 1929 }; 1930 }; 1931 1932 lvds1: lvds-encoder@feb90100 { 1933 compatible = "renesas,r8a774c0-lvds"; 1934 reg = <0 0xfeb90100 0 0x20>; 1935 clocks = <&cpg CPG_MOD 727>; 1936 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; 1937 resets = <&cpg 726>; 1938 status = "disabled"; 1939 1940 ports { 1941 #address-cells = <1>; 1942 #size-cells = <0>; 1943 1944 port@0 { 1945 reg = <0>; 1946 lvds1_in: endpoint { 1947 remote-endpoint = <&du_out_lvds1>; 1948 }; 1949 }; 1950 1951 port@1 { 1952 reg = <1>; 1953 }; 1954 }; 1955 }; 1956 1957 prr: chipid@fff00044 { 1958 compatible = "renesas,prr"; 1959 reg = <0 0xfff00044 0 4>; 1960 }; 1961 }; 1962 1963 thermal-zones { 1964 cpu-thermal { 1965 polling-delay-passive = <250>; 1966 polling-delay = <0>; 1967 thermal-sensors = <&thermal>; 1968 sustainable-power = <717>; 1969 1970 cooling-maps { 1971 map0 { 1972 trip = <&target>; 1973 cooling-device = <&a53_0 0 2>; 1974 contribution = <1024>; 1975 }; 1976 }; 1977 1978 trips { 1979 sensor1_crit: sensor1-crit { 1980 temperature = <120000>; 1981 hysteresis = <2000>; 1982 type = "critical"; 1983 }; 1984 1985 target: trip-point1 { 1986 temperature = <100000>; 1987 hysteresis = <2000>; 1988 type = "passive"; 1989 }; 1990 }; 1991 }; 1992 }; 1993 1994 timer { 1995 compatible = "arm,armv8-timer"; 1996 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1997 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1998 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1999 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2000 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2001 }; 2002 2003 /* External USB clocks - can be overridden by the board */ 2004 usb3s0_clk: usb3s0 { 2005 compatible = "fixed-clock"; 2006 #clock-cells = <0>; 2007 clock-frequency = <0>; 2008 }; 2009 2010 usb_extal_clk: usb_extal { 2011 compatible = "fixed-clock"; 2012 #clock-cells = <0>; 2013 clock-frequency = <0>; 2014 }; 2015}; 2016