1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/input/gpio-keys.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "x1e80100.dtsi"
13#include "x1e80100-pmics.dtsi"
14
15/ {
16	aliases {
17		serial0 = &uart2;
18		i2c0 = &i2c0;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c7 = &i2c7;
23	};
24
25	wcd938x: audio-codec {
26		compatible = "qcom,wcd9385-codec";
27
28		reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
29
30		qcom,micbias1-microvolt = <1800000>;
31		qcom,micbias2-microvolt = <1800000>;
32		qcom,micbias3-microvolt = <1800000>;
33		qcom,micbias4-microvolt = <1800000>;
34		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
35		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
36		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
37		qcom,rx-device = <&wcd_rx>;
38		qcom,tx-device = <&wcd_tx>;
39
40
41		vdd-buck-supply = <&vreg_l15b>;
42		vdd-rxtx-supply = <&vreg_l15b>;
43		vdd-io-supply = <&vreg_l15b>;
44		vdd-mic-bias-supply = <&vreg_bob1>;
45
46		pinctrl-0 = <&wcd_default>;
47		pinctrl-names = "default";
48
49		#sound-dai-cells = <1>;
50	};
51
52	backlight: backlight {
53		compatible = "pwm-backlight";
54		pwms = <&pmk8550_pwm 0 5000000>;
55		enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
56		/* TODO: power-supply? */
57
58		pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
59		pinctrl-names = "default";
60	};
61
62	gpio-keys {
63		compatible = "gpio-keys";
64
65		pinctrl-0 = <&hall_int_n_default>;
66		pinctrl-names = "default";
67
68		switch-lid {
69			gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
70			linux,input-type = <EV_SW>;
71			linux,code = <SW_LID>;
72			wakeup-source;
73			wakeup-event-action = <EV_ACT_DEASSERTED>;
74		};
75	};
76
77	leds {
78		compatible = "gpio-leds";
79
80		pinctrl-names = "default";
81		pinctrl-0 = <&cam_indicator_en>;
82
83		led-camera-indicator {
84			label = "white:camera-indicator";
85			function = LED_FUNCTION_INDICATOR;
86			color = <LED_COLOR_ID_WHITE>;
87			gpios = <&tlmm 225 GPIO_ACTIVE_HIGH>;
88			linux,default-trigger = "none";
89			default-state = "off";
90			/* Reuse as a panic indicator until we get a "camera on" trigger */
91			panic-indicator;
92		};
93	};
94
95	pmic-glink {
96		compatible = "qcom,x1e80100-pmic-glink",
97			     "qcom,sm8550-pmic-glink",
98			     "qcom,pmic-glink";
99		#address-cells = <1>;
100		#size-cells = <0>;
101		orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
102				    <&tlmm 123 GPIO_ACTIVE_HIGH>;
103
104		/* Left-side rear port */
105		connector@0 {
106			compatible = "usb-c-connector";
107			reg = <0>;
108			power-role = "dual";
109			data-role = "dual";
110
111			ports {
112				#address-cells = <1>;
113				#size-cells = <0>;
114
115				port@0 {
116					reg = <0>;
117
118					pmic_glink_ss0_hs_in: endpoint {
119						remote-endpoint = <&usb_1_ss0_dwc3_hs>;
120					};
121				};
122
123				port@1 {
124					reg = <1>;
125
126					pmic_glink_ss0_ss_in: endpoint {
127						remote-endpoint = <&retimer_ss0_ss_out>;
128					};
129				};
130
131				port@2 {
132					reg = <2>;
133
134					pmic_glink_ss0_con_sbu_in: endpoint {
135						remote-endpoint = <&retimer_ss0_con_sbu_out>;
136					};
137				};
138			};
139		};
140
141		/* Left-side front port */
142		connector@1 {
143			compatible = "usb-c-connector";
144			reg = <1>;
145			power-role = "dual";
146			data-role = "dual";
147
148			ports {
149				#address-cells = <1>;
150				#size-cells = <0>;
151
152				port@0 {
153					reg = <0>;
154
155					pmic_glink_ss1_hs_in: endpoint {
156						remote-endpoint = <&usb_1_ss1_dwc3_hs>;
157					};
158				};
159
160				port@1 {
161					reg = <1>;
162
163					pmic_glink_ss1_ss_in: endpoint {
164						remote-endpoint = <&retimer_ss1_ss_out>;
165					};
166				};
167
168				port@2 {
169					reg = <2>;
170
171					pmic_glink_ss1_con_sbu_in: endpoint {
172						remote-endpoint = <&retimer_ss1_con_sbu_out>;
173					};
174				};
175			};
176		};
177	};
178
179	reserved-memory {
180		linux,cma {
181			compatible = "shared-dma-pool";
182			size = <0x0 0x8000000>;
183			reusable;
184			linux,cma-default;
185		};
186	};
187
188	vreg_edp_3p3: regulator-edp-3p3 {
189		compatible = "regulator-fixed";
190
191		regulator-name = "VREG_EDP_3P3";
192		regulator-min-microvolt = <3300000>;
193		regulator-max-microvolt = <3300000>;
194
195		gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
196		enable-active-high;
197
198		pinctrl-0 = <&edp_reg_en>;
199		pinctrl-names = "default";
200
201		regulator-boot-on;
202	};
203
204	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
205		compatible = "regulator-fixed";
206
207		regulator-name = "VREG_RTMR0_1P15";
208
209		regulator-min-microvolt = <1150000>;
210		regulator-max-microvolt = <1150000>;
211
212		gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
213		enable-active-high;
214
215		pinctrl-0 = <&rtmr0_1p15_reg_en>;
216		pinctrl-names = "default";
217
218		regulator-boot-on;
219	};
220
221	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
222		compatible = "regulator-fixed";
223
224		regulator-name = "VREG_RTMR0_1P8";
225
226		regulator-min-microvolt = <1800000>;
227		regulator-max-microvolt = <1800000>;
228
229		gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
230		enable-active-high;
231
232		pinctrl-0 = <&rtmr0_1p8_reg_en>;
233		pinctrl-names = "default";
234
235		regulator-boot-on;
236	};
237
238	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
239		compatible = "regulator-fixed";
240
241		regulator-name = "VREG_RTMR0_3P3";
242
243		regulator-min-microvolt = <3300000>;
244		regulator-max-microvolt = <3300000>;
245
246		gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
247		enable-active-high;
248
249		pinctrl-0 = <&rtmr0_3p3_reg_en>;
250		pinctrl-names = "default";
251
252		regulator-boot-on;
253	};
254
255	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
256		compatible = "regulator-fixed";
257
258		regulator-name = "VREG_RTMR1_1P15";
259
260		regulator-min-microvolt = <1150000>;
261		regulator-max-microvolt = <1150000>;
262
263		gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
264		enable-active-high;
265
266		pinctrl-0 = <&rtmr1_1p15_reg_en>;
267		pinctrl-names = "default";
268
269		regulator-boot-on;
270	};
271
272	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
273		compatible = "regulator-fixed";
274
275		regulator-name = "VREG_RTMR1_1P8";
276
277		regulator-min-microvolt = <1800000>;
278		regulator-max-microvolt = <1800000>;
279
280		gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
281		enable-active-high;
282
283		pinctrl-0 = <&rtmr1_1p8_reg_en>;
284		pinctrl-names = "default";
285
286		regulator-boot-on;
287	};
288
289	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
290		compatible = "regulator-fixed";
291
292		regulator-name = "VREG_RTMR1_3P3";
293
294		regulator-min-microvolt = <3300000>;
295		regulator-max-microvolt = <3300000>;
296
297		gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
298		enable-active-high;
299
300		pinctrl-0 = <&rtmr1_3p3_reg_en>;
301		pinctrl-names = "default";
302
303		regulator-boot-on;
304	};
305
306
307	vreg_nvme: regulator-nvme {
308		compatible = "regulator-fixed";
309
310		regulator-name = "VREG_NVME_3P3";
311		regulator-min-microvolt = <3300000>;
312		regulator-max-microvolt = <3300000>;
313
314		gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
315		enable-active-high;
316
317		pinctrl-0 = <&nvme_reg_en>;
318		pinctrl-names = "default";
319
320		regulator-boot-on;
321	};
322
323	vph_pwr: regulator-vph-pwr {
324		compatible = "regulator-fixed";
325
326		regulator-name = "vph_pwr";
327		regulator-min-microvolt = <3700000>;
328		regulator-max-microvolt = <3700000>;
329
330		regulator-always-on;
331		regulator-boot-on;
332	};
333
334	sound {
335		compatible = "qcom,x1e80100-sndcard";
336		model = "X1E80100-Romulus";
337		audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",
338				"SpkrRight IN", "WSA WSA_SPK2 OUT",
339				"IN1_HPHL", "HPHL_OUT",
340				"IN2_HPHR", "HPHR_OUT",
341				"AMIC2", "MIC BIAS2",
342				"VA DMIC0", "MIC BIAS3",
343				"VA DMIC1", "MIC BIAS3",
344				"VA DMIC0", "VA MIC BIAS3",
345				"VA DMIC1", "VA MIC BIAS3",
346				"TX SWR_INPUT1", "ADC2_OUTPUT";
347
348		va-dai-link {
349			link-name = "VA Capture";
350
351			cpu {
352				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
353			};
354
355			codec {
356				sound-dai = <&lpass_vamacro 0>;
357			};
358
359			platform {
360				sound-dai = <&q6apm>;
361			};
362		};
363
364		wcd-capture-dai-link {
365			link-name = "WCD Capture";
366
367			cpu {
368				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
369			};
370
371			codec {
372				sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
373			};
374
375			platform {
376				sound-dai = <&q6apm>;
377			};
378		};
379
380		wcd-playback-dai-link {
381			link-name = "WCD Playback";
382
383			cpu {
384				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
385			};
386
387			codec {
388				sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
389			};
390
391			platform {
392				sound-dai = <&q6apm>;
393			};
394		};
395
396		wsa-dai-link {
397			link-name = "WSA Playback";
398
399			cpu {
400				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
401			};
402
403			codec {
404				sound-dai = <&left_spkr>, <&right_spkr>,
405					    <&swr0 0>, <&lpass_wsamacro 0>;
406			};
407
408			platform {
409				sound-dai = <&q6apm>;
410			};
411		};
412	};
413};
414
415&apps_rsc {
416	regulators-0 {
417		compatible = "qcom,pm8550-rpmh-regulators";
418		qcom,pmic-id = "b";
419
420		vdd-bob1-supply = <&vph_pwr>;
421		vdd-bob2-supply = <&vph_pwr>;
422		vdd-l1-l4-l10-supply = <&vreg_s4c>;
423		vdd-l2-l13-l14-supply = <&vreg_bob1>;
424		vdd-l5-l16-supply = <&vreg_bob1>;
425		vdd-l6-l7-supply = <&vreg_bob2>;
426		vdd-l8-l9-supply = <&vreg_bob1>;
427		vdd-l12-supply = <&vreg_s5j>;
428		vdd-l15-supply = <&vreg_s4c>;
429		vdd-l17-supply = <&vreg_bob2>;
430
431		vreg_bob1: bob1 {
432			regulator-name = "vreg_bob1";
433			regulator-min-microvolt = <3008000>;
434			regulator-max-microvolt = <3960000>;
435			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
436		};
437
438		vreg_bob2: bob2 {
439			regulator-name = "vreg_bob2";
440			regulator-min-microvolt = <2504000>;
441			regulator-max-microvolt = <3008000>;
442			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
443		};
444
445		vreg_l1b: ldo1 {
446			regulator-name = "vreg_l1b";
447			regulator-min-microvolt = <1800000>;
448			regulator-max-microvolt = <1800000>;
449			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
450		};
451
452		vreg_l2b: ldo2 {
453			regulator-name = "vreg_l2b";
454			regulator-min-microvolt = <3072000>;
455			regulator-max-microvolt = <3072000>;
456			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
457		};
458
459		vreg_l4b: ldo4 {
460			regulator-name = "vreg_l4b";
461			regulator-min-microvolt = <1800000>;
462			regulator-max-microvolt = <1800000>;
463			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
464		};
465
466		vreg_l5b: ldo5 {
467			regulator-name = "vreg_l5b";
468			regulator-min-microvolt = <3000000>;
469			regulator-max-microvolt = <3000000>;
470			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
471		};
472
473		vreg_l6b: ldo6 {
474			regulator-name = "vreg_l6b";
475			regulator-min-microvolt = <1800000>;
476			regulator-max-microvolt = <2960000>;
477			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
478		};
479
480		vreg_l7b: ldo7 {
481			regulator-name = "vreg_l7b";
482			regulator-min-microvolt = <2800000>;
483			regulator-max-microvolt = <2800000>;
484			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
485		};
486
487		vreg_l8b: ldo8 {
488			regulator-name = "vreg_l8b";
489			regulator-min-microvolt = <3072000>;
490			regulator-max-microvolt = <3072000>;
491			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
492		};
493
494		vreg_l9b: ldo9 {
495			regulator-name = "vreg_l9b";
496			regulator-min-microvolt = <2960000>;
497			regulator-max-microvolt = <2960000>;
498			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
499		};
500
501		vreg_l10b: ldo10 {
502			regulator-name = "vreg_l10b";
503			regulator-min-microvolt = <1800000>;
504			regulator-max-microvolt = <1800000>;
505			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
506		};
507
508		vreg_l12b: ldo12 {
509			regulator-name = "vreg_l12b";
510			regulator-min-microvolt = <1200000>;
511			regulator-max-microvolt = <1200000>;
512			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
513		};
514
515		vreg_l13b: ldo13 {
516			regulator-name = "vreg_l13b";
517			regulator-min-microvolt = <3072000>;
518			regulator-max-microvolt = <3072000>;
519			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
520		};
521
522		vreg_l14b: ldo14 {
523			regulator-name = "vreg_l14b";
524			regulator-min-microvolt = <3072000>;
525			regulator-max-microvolt = <3072000>;
526			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
527		};
528
529		vreg_l15b: ldo15 {
530			regulator-name = "vreg_l15b";
531			regulator-min-microvolt = <1800000>;
532			regulator-max-microvolt = <1800000>;
533			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
534		};
535
536		vreg_l16b: ldo16 {
537			regulator-name = "vreg_l16b";
538			regulator-min-microvolt = <2912000>;
539			regulator-max-microvolt = <2912000>;
540			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
541		};
542
543		vreg_l17b: ldo17 {
544			regulator-name = "vreg_l17b";
545			regulator-min-microvolt = <2504000>;
546			regulator-max-microvolt = <2504000>;
547			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
548		};
549	};
550
551	regulators-1 {
552		compatible = "qcom,pm8550ve-rpmh-regulators";
553		qcom,pmic-id = "c";
554
555		vdd-l1-supply = <&vreg_s5j>;
556		vdd-l2-supply = <&vreg_s1f>;
557		vdd-l3-supply = <&vreg_s1f>;
558		vdd-s4-supply = <&vph_pwr>;
559
560		vreg_s4c: smps4 {
561			regulator-name = "vreg_s4c";
562			regulator-min-microvolt = <1856000>;
563			regulator-max-microvolt = <2000000>;
564			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
565		};
566
567		vreg_l1c: ldo1 {
568			regulator-name = "vreg_l1c";
569			regulator-min-microvolt = <1200000>;
570			regulator-max-microvolt = <1200000>;
571			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
572		};
573
574		vreg_l2c: ldo2 {
575			regulator-name = "vreg_l2c";
576			regulator-min-microvolt = <880000>;
577			regulator-max-microvolt = <920000>;
578			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
579		};
580
581		vreg_l3c: ldo3 {
582			regulator-name = "vreg_l3c";
583			regulator-min-microvolt = <912000>;
584			regulator-max-microvolt = <920000>;
585			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
586		};
587	};
588
589	regulators-2 {
590		compatible = "qcom,pmc8380-rpmh-regulators";
591		qcom,pmic-id = "d";
592
593		vdd-l1-supply = <&vreg_s1f>;
594		vdd-l2-supply = <&vreg_s1f>;
595		vdd-l3-supply = <&vreg_s4c>;
596		vdd-s1-supply = <&vph_pwr>;
597
598		vreg_l1d: ldo1 {
599			regulator-name = "vreg_l1d";
600			regulator-min-microvolt = <880000>;
601			regulator-max-microvolt = <920000>;
602			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
603		};
604
605		vreg_l2d: ldo2 {
606			regulator-name = "vreg_l2d";
607			regulator-min-microvolt = <912000>;
608			regulator-max-microvolt = <920000>;
609			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
610		};
611
612		vreg_l3d: ldo3 {
613			regulator-name = "vreg_l3d";
614			regulator-min-microvolt = <1800000>;
615			regulator-max-microvolt = <1800000>;
616			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
617		};
618	};
619
620	regulators-3 {
621		compatible = "qcom,pmc8380-rpmh-regulators";
622		qcom,pmic-id = "e";
623
624		vdd-l2-supply = <&vreg_s1f>;
625		vdd-l3-supply = <&vreg_s5j>;
626
627		vreg_l2e: ldo2 {
628			regulator-name = "vreg_l2e";
629			regulator-min-microvolt = <880000>;
630			regulator-max-microvolt = <920000>;
631			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
632		};
633
634		vreg_l3e: ldo3 {
635			regulator-name = "vreg_l3e";
636			regulator-min-microvolt = <1200000>;
637			regulator-max-microvolt = <1200000>;
638			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
639		};
640	};
641
642	regulators-4 {
643		compatible = "qcom,pmc8380-rpmh-regulators";
644		qcom,pmic-id = "f";
645
646		vdd-l1-supply = <&vreg_s5j>;
647		vdd-l2-supply = <&vreg_s5j>;
648		vdd-l3-supply = <&vreg_s5j>;
649		vdd-s1-supply = <&vph_pwr>;
650
651		vreg_s1f: smps1 {
652			regulator-name = "vreg_s1f";
653			regulator-min-microvolt = <700000>;
654			regulator-max-microvolt = <1100000>;
655			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
656		};
657
658		vreg_l1f: ldo1 {
659			regulator-name = "vreg_l1f";
660			regulator-min-microvolt = <1024000>;
661			regulator-max-microvolt = <1024000>;
662			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
663		};
664
665		vreg_l2f: ldo2 {
666			regulator-name = "vreg_l2f";
667			regulator-min-microvolt = <1024000>;
668			regulator-max-microvolt = <1024000>;
669			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
670		};
671
672		vreg_l3f: ldo3 {
673			regulator-name = "vreg_l3f";
674			regulator-min-microvolt = <1024000>;
675			regulator-max-microvolt = <1024000>;
676			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
677		};
678	};
679
680	regulators-6 {
681		compatible = "qcom,pm8550ve-rpmh-regulators";
682		qcom,pmic-id = "i";
683
684		vdd-l1-supply = <&vreg_s4c>;
685		vdd-l2-supply = <&vreg_s5j>;
686		vdd-l3-supply = <&vreg_s1f>;
687		vdd-s1-supply = <&vph_pwr>;
688		vdd-s2-supply = <&vph_pwr>;
689
690		vreg_s1i: smps1 {
691			regulator-name = "vreg_s1i";
692			regulator-min-microvolt = <900000>;
693			regulator-max-microvolt = <920000>;
694			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
695		};
696
697		vreg_s2i: smps2 {
698			regulator-name = "vreg_s2i";
699			regulator-min-microvolt = <1000000>;
700			regulator-max-microvolt = <1100000>;
701			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
702		};
703
704		vreg_l1i: ldo1 {
705			regulator-name = "vreg_l1i";
706			regulator-min-microvolt = <1800000>;
707			regulator-max-microvolt = <1800000>;
708			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
709		};
710
711		vreg_l2i: ldo2 {
712			regulator-name = "vreg_l2i";
713			regulator-min-microvolt = <1200000>;
714			regulator-max-microvolt = <1200000>;
715			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
716		};
717
718		vreg_l3i: ldo3 {
719			regulator-name = "vreg_l3i";
720			regulator-min-microvolt = <880000>;
721			regulator-max-microvolt = <920000>;
722			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
723		};
724	};
725
726	regulators-7 {
727		compatible = "qcom,pm8550ve-rpmh-regulators";
728		qcom,pmic-id = "j";
729
730		vdd-l1-supply = <&vreg_s1f>;
731		vdd-l2-supply = <&vreg_s5j>;
732		vdd-l3-supply = <&vreg_s1f>;
733		vdd-s5-supply = <&vph_pwr>;
734
735		vreg_s5j: smps5 {
736			regulator-name = "vreg_s5j";
737			regulator-min-microvolt = <1256000>;
738			regulator-max-microvolt = <1304000>;
739			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
740		};
741
742		vreg_l1j: ldo1 {
743			regulator-name = "vreg_l1j";
744			regulator-min-microvolt = <912000>;
745			regulator-max-microvolt = <920000>;
746			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
747		};
748
749		vreg_l2j: ldo2 {
750			regulator-name = "vreg_l2j";
751			regulator-min-microvolt = <1256000>;
752			regulator-max-microvolt = <1256000>;
753			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
754		};
755
756		vreg_l3j: ldo3 {
757			regulator-name = "vreg_l3j";
758			regulator-min-microvolt = <880000>;
759			regulator-max-microvolt = <920000>;
760			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
761		};
762	};
763};
764
765&gpu {
766	status = "okay";
767
768	zap-shader {
769		memory-region = <&gpu_microcode_mem>;
770		firmware-name = "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn";
771	};
772};
773
774&i2c0 {
775	clock-frequency = <100000>;
776
777	status = "okay";
778
779	/* Something @39, @3e, @44 */
780};
781
782&i2c3 {
783	clock-frequency = <400000>;
784
785	status = "okay";
786
787	/* Left-side rear port */
788	typec-mux@8 {
789		compatible = "parade,ps8830";
790		reg = <0x8>;
791
792		reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>;
793
794		clocks = <&rpmhcc RPMH_RF_CLK3>;
795		clock-names = "xo";
796
797		vdd-supply = <&vreg_rtmr0_1p15>;
798		vdd33-supply = <&vreg_rtmr0_3p3>;
799		vdd33-cap-supply = <&vreg_rtmr0_3p3>;
800		vddar-supply = <&vreg_rtmr0_1p15>;
801		vddat-supply = <&vreg_rtmr0_1p15>;
802		vddio-supply = <&vreg_rtmr0_1p8>;
803
804		pinctrl-0 = <&rtmr0_default>;
805		pinctrl-names = "default";
806
807		retimer-switch;
808		orientation-switch;
809
810		ports {
811			#address-cells = <1>;
812			#size-cells = <0>;
813
814			port@0 {
815				reg = <0>;
816
817				retimer_ss0_ss_out: endpoint {
818					remote-endpoint = <&pmic_glink_ss0_ss_in>;
819				};
820			};
821
822			port@1 {
823				reg = <1>;
824
825				retimer_ss0_ss_in: endpoint {
826					remote-endpoint = <&usb_1_ss0_qmpphy_out>;
827				};
828			};
829
830			port@2 {
831				reg = <2>;
832
833				retimer_ss0_con_sbu_out: endpoint {
834					remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
835				};
836			};
837		};
838	};
839
840};
841
842&i2c4 {
843	clock-frequency = <400000>;
844
845	status = "okay";
846
847	/* Something @18, @2c, @2e */
848};
849
850&i2c5 {
851	clock-frequency = <400000>;
852
853	status = "okay";
854
855	ptn3222: redriver@4f {
856		compatible = "nxp,ptn3222";
857		reg = <0x4f>;
858
859		reset-gpios = <&tlmm 7 GPIO_ACTIVE_LOW>;
860
861		vdd3v3-supply = <&vreg_l13b>;
862		vdd1v8-supply = <&vreg_l4b>;
863
864		#phy-cells = <0>;
865	};
866};
867
868&i2c7 {
869	clock-frequency = <400000>;
870
871	status = "okay";
872
873	/* Left-side front port */
874	typec-mux@8 {
875		compatible = "parade,ps8830";
876		reg = <0x8>;
877
878		reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>;
879
880		clocks = <&rpmhcc RPMH_RF_CLK4>;
881		clock-names = "xo";
882
883		vdd-supply = <&vreg_rtmr1_1p15>;
884		vdd33-supply = <&vreg_rtmr1_3p3>;
885		vdd33-cap-supply = <&vreg_rtmr1_3p3>;
886		vddar-supply = <&vreg_rtmr1_1p15>;
887		vddat-supply = <&vreg_rtmr1_1p15>;
888		vddio-supply = <&vreg_rtmr1_1p8>;
889
890		retimer-switch;
891		orientation-switch;
892
893		ports {
894			#address-cells = <1>;
895			#size-cells = <0>;
896
897			port@0 {
898				reg = <0>;
899
900				retimer_ss1_ss_out: endpoint {
901					remote-endpoint = <&pmic_glink_ss1_ss_in>;
902				};
903			};
904
905			port@1 {
906				reg = <1>;
907
908				retimer_ss1_ss_in: endpoint {
909					remote-endpoint = <&usb_1_ss1_qmpphy_out>;
910				};
911			};
912
913			port@2 {
914				reg = <2>;
915
916				retimer_ss1_con_sbu_out: endpoint {
917					remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
918				};
919			};
920		};
921	};
922};
923
924&lpass_tlmm {
925	spkr_01_sd_n_active: spkr-01-sd-n-active-state {
926		pins = "gpio12";
927		function = "gpio";
928		drive-strength = <16>;
929		bias-disable;
930		output-low;
931	};
932};
933
934&lpass_vamacro {
935	qcom,dmic-sample-rate = <4800000>;
936
937	vdd-micb-supply = <&vreg_l1b>;
938
939	pinctrl-0 = <&dmic01_default>;
940	pinctrl-names = "default";
941};
942
943&mdss {
944	status = "okay";
945};
946
947&mdss_dp3 {
948	compatible = "qcom,x1e80100-dp";
949	/delete-property/ #sound-dai-cells;
950
951	status = "okay";
952
953	aux-bus {
954		panel {
955			compatible = "edp-panel";
956
957			backlight = <&backlight>;
958			power-supply = <&vreg_edp_3p3>;
959
960			port {
961				edp_panel_in: endpoint {
962					remote-endpoint = <&mdss_dp3_out>;
963				};
964			};
965		};
966	};
967
968	ports {
969		port@1 {
970			reg = <1>;
971
972			mdss_dp3_out: endpoint {
973				data-lanes = <0 1 2 3>;
974				link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
975
976				remote-endpoint = <&edp_panel_in>;
977			};
978		};
979	};
980};
981
982&mdss_dp3_phy {
983	vdda-phy-supply = <&vreg_l3j>;
984	vdda-pll-supply = <&vreg_l2j>;
985
986	status = "okay";
987};
988
989&pcie3 {
990	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
991	wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
992
993	pinctrl-0 = <&pcie3_default>;
994	pinctrl-names = "default";
995
996	/* The RTS5261 chip on the other side only does Gen1x1 anyway */
997	max-link-speed = <1>;
998	status = "okay";
999};
1000
1001&pcie3_phy {
1002	vdda-phy-supply = <&vreg_l3c>;
1003	vdda-pll-supply = <&vreg_l3e>;
1004
1005	status = "okay";
1006};
1007
1008&pcie4 {
1009	status = "okay";
1010};
1011
1012&pcie4_phy {
1013	vdda-phy-supply = <&vreg_l3i>;
1014	vdda-pll-supply = <&vreg_l3e>;
1015
1016	status = "okay";
1017};
1018
1019&pcie6a {
1020	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
1021	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
1022
1023	vddpe-3v3-supply = <&vreg_nvme>;
1024
1025	pinctrl-0 = <&pcie6a_default>;
1026	pinctrl-names = "default";
1027
1028	status = "okay";
1029};
1030
1031&pcie6a_phy {
1032	vdda-phy-supply = <&vreg_l1d>;
1033	vdda-pll-supply = <&vreg_l2j>;
1034
1035	status = "okay";
1036};
1037
1038&pm8550_gpios {
1039	rtmr0_default: rtmr0-reset-n-active-state {
1040		pins = "gpio10";
1041		function = "normal";
1042		power-source = <1>; /* 1.8V */
1043	};
1044
1045	rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {
1046		pins = "gpio11";
1047		function = "normal";
1048		power-source = <1>; /* 1.8V */
1049	};
1050};
1051
1052&pm8550ve_9_gpios {
1053	rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {
1054		pins = "gpio8";
1055		function = "normal";
1056		power-source = <1>; /* 1.8V */
1057	};
1058};
1059
1060&pmc8380_3_gpios {
1061	edp_bl_en: edp-bl-en-state {
1062		pins = "gpio4";
1063		function = "normal";
1064		power-source = <1>; /* 1.8V */
1065		input-disable;
1066		output-enable;
1067	};
1068};
1069
1070&pmc8380_5_gpios {
1071	rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state {
1072		pins = "gpio8";
1073		function = "normal";
1074		power-source = <1>; /* 1.8V */
1075	};
1076};
1077
1078&pmk8550_pwm {
1079	status = "okay";
1080};
1081
1082&pmk8550_gpios {
1083	edp_bl_pwm: edp-bl-pwm-state {
1084		pins = "gpio5";
1085		function = "func3";
1086	};
1087};
1088
1089&qupv3_0 {
1090	status = "okay";
1091};
1092
1093&qupv3_1 {
1094	status = "okay";
1095};
1096
1097&qupv3_2 {
1098	status = "okay";
1099};
1100
1101&remoteproc_adsp {
1102	firmware-name = "qcom/x1e80100/microsoft/Romulus/qcadsp8380.mbn",
1103			"qcom/x1e80100/microsoft/Romulus/adsp_dtbs.elf";
1104
1105	status = "okay";
1106};
1107
1108&remoteproc_cdsp {
1109	firmware-name = "qcom/x1e80100/microsoft/Romulus/qccdsp8380.mbn",
1110			"qcom/x1e80100/microsoft/Romulus/cdsp_dtbs.elf";
1111
1112	status = "okay";
1113};
1114
1115&smb2360_0 {
1116	status = "okay";
1117};
1118
1119&smb2360_0_eusb2_repeater {
1120	vdd18-supply = <&vreg_l3d>;
1121	vdd3-supply = <&vreg_l2b>;
1122};
1123
1124&smb2360_1 {
1125	status = "okay";
1126};
1127
1128&smb2360_1_eusb2_repeater {
1129	vdd18-supply = <&vreg_l3d>;
1130	vdd3-supply = <&vreg_l14b>;
1131};
1132
1133&smb2360_2 {
1134	status = "okay";
1135};
1136
1137&smb2360_2_eusb2_repeater {
1138	vdd18-supply = <&vreg_l3d>;
1139	vdd3-supply = <&vreg_l8b>;
1140};
1141
1142&swr0 {
1143	pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
1144	pinctrl-names = "default";
1145
1146	status = "okay";
1147
1148	/* WSA8845, Left speaker */
1149	left_spkr: speaker@0,0 {
1150		compatible = "sdw20217020400";
1151		reg = <0 0>;
1152		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
1153		#sound-dai-cells = <0>;
1154		sound-name-prefix = "SpkrLeft";
1155		vdd-1p8-supply = <&vreg_l15b>;
1156		vdd-io-supply = <&vreg_l12b>;
1157		qcom,port-mapping = <1 2 3 7 10 13>;
1158	};
1159
1160	/* WSA8845, Right speaker */
1161	right_spkr: speaker@0,1 {
1162		compatible = "sdw20217020400";
1163		reg = <0 1>;
1164		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
1165		#sound-dai-cells = <0>;
1166		sound-name-prefix = "SpkrRight";
1167		vdd-1p8-supply = <&vreg_l15b>;
1168		vdd-io-supply = <&vreg_l12b>;
1169		qcom,port-mapping = <4 5 6 7 11 13>;
1170	};
1171};
1172
1173&swr1 {
1174	status = "okay";
1175
1176	/* WCD9385 RX */
1177	wcd_rx: codec@0,4 {
1178		compatible = "sdw20217010d00";
1179		reg = <0 4>;
1180		qcom,rx-port-mapping = <1 2 3 4 5>;
1181	};
1182};
1183
1184&swr2 {
1185	status = "okay";
1186
1187	/* WCD9385 TX */
1188	wcd_tx: codec@0,3 {
1189		compatible = "sdw20217010d00";
1190		reg = <0 3>;
1191		qcom,tx-port-mapping = <2 2 3 4>;
1192	};
1193};
1194
1195&tlmm {
1196	gpio-reserved-ranges = <44 4>, /* SPI (TPM) */
1197			       <238 1>; /* UFS Reset */
1198
1199	hall_int_n_default: hall-int-n-state {
1200		pins = "gpio2";
1201		function = "gpio";
1202		bias-disable;
1203	};
1204
1205	nvme_reg_en: nvme-reg-en-state {
1206		pins = "gpio18";
1207		function = "gpio";
1208		drive-strength = <2>;
1209		bias-disable;
1210	};
1211
1212	edp_reg_en: edp-reg-en-state {
1213		pins = "gpio70";
1214		function = "gpio";
1215		drive-strength = <16>;
1216		bias-disable;
1217	};
1218
1219	ssam_state: ssam-state-state {
1220		pins = "gpio91";
1221		function = "gpio";
1222		bias-disable;
1223	};
1224
1225	pcie3_default: pcie3-default-state {
1226		perst-n-pins {
1227			pins = "gpio143";
1228			function = "gpio";
1229			drive-strength = <2>;
1230			bias-disable;
1231		};
1232
1233		clkreq-n-pins {
1234			pins = "gpio144";
1235			function = "pcie3_clk";
1236			drive-strength = <2>;
1237			bias-pull-up;
1238		};
1239
1240		wake-n-pins {
1241			pins = "gpio145";
1242			function = "gpio";
1243			drive-strength = <2>;
1244			bias-pull-up;
1245		};
1246	};
1247
1248	pcie6a_default: pcie6a-default-state {
1249		perst-n-pins {
1250			pins = "gpio152";
1251			function = "gpio";
1252			drive-strength = <2>;
1253			bias-disable;
1254		};
1255
1256		clkreq-n-pins {
1257			pins = "gpio153";
1258			function = "pcie6a_clk";
1259			drive-strength = <2>;
1260			bias-pull-up;
1261		};
1262
1263		wake-n-pins {
1264			pins = "gpio154";
1265			function = "gpio";
1266			drive-strength = <2>;
1267			bias-pull-up;
1268		};
1269	};
1270
1271	rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {
1272		pins = "gpio175";
1273		function = "gpio";
1274		drive-strength = <2>;
1275		bias-disable;
1276	};
1277
1278	rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {
1279		pins = "gpio186";
1280		function = "gpio";
1281		drive-strength = <2>;
1282		bias-disable;
1283	};
1284
1285	rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {
1286		pins = "gpio188";
1287		function = "gpio";
1288		drive-strength = <2>;
1289		bias-disable;
1290	};
1291
1292	wcd_default: wcd-reset-n-active-state {
1293		pins = "gpio191";
1294		function = "gpio";
1295		drive-strength = <16>;
1296		bias-disable;
1297		output-low;
1298	};
1299
1300	cam_indicator_en: cam-indicator-en-state {
1301		pins = "gpio225";
1302		function = "gpio";
1303		drive-strength = <2>;
1304		bias-disable;
1305	};
1306};
1307
1308&uart2 {
1309	status = "okay";
1310
1311	embedded-controller {
1312		compatible = "microsoft,surface-sam";
1313
1314		interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>;
1315
1316		current-speed = <4000000>;
1317
1318		pinctrl-0 = <&ssam_state>;
1319		pinctrl-names = "default";
1320	};
1321};
1322
1323&usb_1_ss0_hsphy {
1324	vdd-supply = <&vreg_l3j>;
1325	vdda12-supply = <&vreg_l2j>;
1326
1327	phys = <&smb2360_0_eusb2_repeater>;
1328
1329	status = "okay";
1330};
1331
1332&usb_1_ss0_qmpphy {
1333	vdda-phy-supply = <&vreg_l2j>;
1334	vdda-pll-supply = <&vreg_l1j>;
1335
1336	status = "okay";
1337};
1338
1339&usb_1_ss0 {
1340	status = "okay";
1341};
1342
1343&usb_1_ss0_dwc3 {
1344	dr_mode = "host";
1345};
1346
1347&usb_1_ss0_dwc3_hs {
1348	remote-endpoint = <&pmic_glink_ss0_hs_in>;
1349};
1350
1351&usb_1_ss0_qmpphy_out {
1352	remote-endpoint = <&retimer_ss0_ss_in>;
1353};
1354
1355&usb_1_ss1_hsphy {
1356	vdd-supply = <&vreg_l3j>;
1357	vdda12-supply = <&vreg_l2j>;
1358
1359	phys = <&smb2360_1_eusb2_repeater>;
1360
1361	status = "okay";
1362};
1363
1364&usb_1_ss1_qmpphy {
1365	vdda-phy-supply = <&vreg_l2j>;
1366	vdda-pll-supply = <&vreg_l2d>;
1367
1368	status = "okay";
1369};
1370
1371&usb_1_ss1 {
1372	status = "okay";
1373};
1374
1375&usb_1_ss1_dwc3 {
1376	dr_mode = "host";
1377};
1378
1379&usb_1_ss1_dwc3_hs {
1380	remote-endpoint = <&pmic_glink_ss1_hs_in>;
1381};
1382
1383&usb_1_ss1_qmpphy_out {
1384	remote-endpoint = <&retimer_ss1_ss_in>;
1385};
1386
1387/* MP0 goes to the Surface Connector, MP1 goes to the USB-A port */
1388&usb_mp {
1389	status = "okay";
1390};
1391
1392&usb_mp_hsphy0 {
1393	vdd-supply = <&vreg_l2e>;
1394	vdda12-supply = <&vreg_l2j>;
1395
1396	phys = <&smb2360_2_eusb2_repeater>;
1397
1398	status = "okay";
1399};
1400
1401&usb_mp_hsphy1 {
1402	vdd-supply = <&vreg_l2e>;
1403	vdda12-supply = <&vreg_l2j>;
1404
1405	phys = <&ptn3222>;
1406
1407	status = "okay";
1408};
1409
1410&usb_mp_qmpphy0 {
1411	vdda-phy-supply = <&vreg_l3e>;
1412	vdda-pll-supply = <&vreg_l3c>;
1413
1414	status = "okay";
1415};
1416
1417&usb_mp_qmpphy1 {
1418	vdda-phy-supply = <&vreg_l3e>;
1419	vdda-pll-supply = <&vreg_l3c>;
1420
1421	status = "okay";
1422};
1423