1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree, 4 * xiaomi-lavender device tree, and oneplus-common device tree. 5 * 6 * Copyright (c) 2022, Richard Acayan. All rights reserved. 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/leds/common.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15#include <dt-bindings/power/qcom-rpmpd.h> 16#include "sdm670.dtsi" 17#include "pm660.dtsi" 18#include "pm660l.dtsi" 19 20/delete-node/ &mpss_region; 21/delete-node/ &venus_mem; 22/delete-node/ &wlan_msa_mem; 23/delete-node/ &cdsp_mem; 24/delete-node/ &mba_region; 25/delete-node/ &adsp_mem; 26/delete-node/ &ipa_fw_mem; 27/delete-node/ &ipa_gsi_mem; 28/delete-node/ &gpu_mem; 29 30/ { 31 model = "Google Pixel 3a"; 32 compatible = "google,sargo", "qcom,sdm670"; 33 34 aliases { }; 35 36 chosen { 37 stdout-path = "serial0:115200n8"; 38 39 #address-cells = <2>; 40 #size-cells = <2>; 41 ranges; 42 43 framebuffer@9c000000 { 44 compatible = "simple-framebuffer"; 45 reg = <0 0x9c000000 0 (1080 * 2220 * 4)>; 46 width = <1080>; 47 height = <2220>; 48 stride = <(1080 * 4)>; 49 format = "a8r8g8b8"; 50 }; 51 }; 52 53 gpio-keys { 54 compatible = "gpio-keys"; 55 autorepeat; 56 57 pinctrl-names = "default"; 58 pinctrl-0 = <&vol_up_pin>; 59 60 key-vol-up { 61 label = "Volume Up"; 62 linux,code = <KEY_VOLUMEUP>; 63 gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; 64 }; 65 }; 66 67 reserved-memory { 68 #address-cells = <2>; 69 #size-cells = <2>; 70 71 mpss_region: mpss@8b000000 { 72 reg = <0 0x8b000000 0 0x9800000>; 73 no-map; 74 }; 75 76 venus_mem: venus@94800000 { 77 reg = <0 0x94800000 0 0x500000>; 78 no-map; 79 }; 80 81 wlan_msa_mem: wlan-msa@94d00000 { 82 reg = <0 0x94d00000 0 0x100000>; 83 no-map; 84 }; 85 86 cdsp_mem: cdsp@94e00000 { 87 reg = <0 0x94e00000 0 0x800000>; 88 no-map; 89 }; 90 91 mba_region: mba@95600000 { 92 reg = <0 0x95600000 0 0x200000>; 93 no-map; 94 }; 95 96 adsp_mem: adsp@95800000 { 97 reg = <0 0x95800000 0 0x2200000>; 98 no-map; 99 }; 100 101 ipa_fw_mem: ipa-fw@97a00000 { 102 reg = <0 0x97a00000 0 0x10000>; 103 no-map; 104 }; 105 106 ipa_gsi_mem: ipa-gsi@97a10000 { 107 reg = <0 0x97a10000 0 0x5000>; 108 no-map; 109 }; 110 111 gpu_mem: gpu@97a15000 { 112 reg = <0 0x97a15000 0 0x2000>; 113 no-map; 114 }; 115 116 framebuffer-region@9c000000 { 117 reg = <0 0x9c000000 0 0x2400000>; 118 no-map; 119 }; 120 121 /* Also includes ramoops regions */ 122 debug_info_mem: debug-info@a1800000 { 123 reg = <0 0xa1800000 0 0x411000>; 124 no-map; 125 }; 126 }; 127 128 /* 129 * The touchscreen regulator seems to be controlled somehow by a gpio. 130 * Model it as a fixed regulator and keep it on. Without schematics we 131 * don't know how this is actually wired up... 132 */ 133 ts_1p8_supply: ts-1p8-regulator { 134 compatible = "regulator-fixed"; 135 regulator-name = "ts_1p8_supply"; 136 137 regulator-min-microvolt = <1800000>; 138 regulator-max-microvolt = <1800000>; 139 140 gpio = <&pm660_gpios 12 GPIO_ACTIVE_HIGH>; 141 enable-active-high; 142 }; 143 144 vph_pwr: vph-pwr-regulator { 145 compatible = "regulator-fixed"; 146 regulator-name = "vph_pwr"; 147 regulator-min-microvolt = <3312000>; 148 regulator-max-microvolt = <3312000>; 149 150 regulator-always-on; 151 regulator-boot-on; 152 }; 153 154 /* 155 * Supply map from xiaomi-lavender specifies this as the supply for 156 * ldob1, ldob9, ldob10, ldoa2, and ldoa3, while downstream specifies 157 * this as a power domain. Set this as a fixed regulator with the same 158 * voltage as lavender until display is needed to avoid unneccessarily 159 * using a deprecated binding (regulator-fixed-domain). 160 */ 161 vreg_s2b_1p05: vreg-s2b-regulator { 162 compatible = "regulator-fixed"; 163 regulator-name = "vreg_s2b"; 164 regulator-min-microvolt = <1050000>; 165 regulator-max-microvolt = <1050000>; 166 }; 167}; 168 169&apps_rsc { 170 regulators-0 { 171 compatible = "qcom,pm660-rpmh-regulators"; 172 qcom,pmic-id = "a"; 173 174 vdd-s1-supply = <&vph_pwr>; 175 vdd-s2-supply = <&vph_pwr>; 176 vdd-s3-supply = <&vph_pwr>; 177 vdd-s4-supply = <&vph_pwr>; 178 vdd-s5-supply = <&vph_pwr>; 179 vdd-s6-supply = <&vph_pwr>; 180 181 vdd-l1-l6-l7-supply = <&vreg_s6a_0p87>; 182 vdd-l2-l3-supply = <&vreg_s2b_1p05>; 183 vdd-l5-supply = <&vreg_s2b_1p05>; 184 vdd-l8-l9-l10-l11-l12-l13-l14-supply = <&vreg_s4a_2p04>; 185 vdd-l15-l16-l17-l18-l19-supply = <&vreg_bob>; 186 187 /* 188 * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed 189 * by the Core Power Reduction hardened (CPRh) and the 190 * Operating State Manager (OSM) HW automatically. 191 */ 192 193 vreg_s4a_2p04: smps4 { 194 regulator-min-microvolt = <1808000>; 195 regulator-max-microvolt = <2040000>; 196 regulator-enable-ramp-delay = <200>; 197 }; 198 199 vreg_s6a_0p87: smps6 { 200 regulator-min-microvolt = <1224000>; 201 regulator-max-microvolt = <1352000>; 202 regulator-enable-ramp-delay = <150>; 203 }; 204 205 /* LDOs */ 206 vreg_l1a_1p225: ldo1 { 207 regulator-min-microvolt = <1200000>; 208 regulator-max-microvolt = <1250000>; 209 regulator-enable-ramp-delay = <250>; 210 }; 211 212 vreg_l2a_1p0: ldo2 { 213 regulator-min-microvolt = <1000000>; 214 regulator-max-microvolt = <1000000>; 215 regulator-enable-ramp-delay = <250>; 216 }; 217 218 vreg_l3a_1p0: ldo3 { 219 regulator-min-microvolt = <1000000>; 220 regulator-max-microvolt = <1000000>; 221 regulator-enable-ramp-delay = <250>; 222 }; 223 224 vreg_l5a_0p848: ldo5 { 225 regulator-min-microvolt = <800000>; 226 regulator-max-microvolt = <800000>; 227 regulator-enable-ramp-delay = <250>; 228 }; 229 230 vreg_l6a_1p3: ldo6 { 231 regulator-min-microvolt = <1248000>; 232 regulator-max-microvolt = <1304000>; 233 regulator-enable-ramp-delay = <250>; 234 }; 235 236 vreg_l7a_1p2: ldo7 { 237 regulator-min-microvolt = <1200000>; 238 regulator-max-microvolt = <1200000>; 239 regulator-enable-ramp-delay = <250>; 240 }; 241 242 vreg_l8a_1p8: ldo8 { 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <1800000>; 245 regulator-enable-ramp-delay = <250>; 246 regulator-always-on; 247 }; 248 249 vreg_l9a_1p8: ldo9 { 250 regulator-min-microvolt = <1800000>; 251 regulator-max-microvolt = <1800000>; 252 regulator-enable-ramp-delay = <250>; 253 }; 254 255 vreg_l10a_1p8: ldo10 { 256 regulator-min-microvolt = <1800000>; 257 regulator-max-microvolt = <1800000>; 258 regulator-enable-ramp-delay = <250>; 259 }; 260 261 vreg_l11a_1p8: ldo11 { 262 regulator-min-microvolt = <1800000>; 263 regulator-max-microvolt = <1800000>; 264 regulator-enable-ramp-delay = <250>; 265 }; 266 267 vreg_l12a_1p8: ldo12 { 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-enable-ramp-delay = <250>; 271 }; 272 273 vreg_l13a_1p8: ldo13 { 274 regulator-min-microvolt = <1800000>; 275 regulator-max-microvolt = <1800000>; 276 regulator-enable-ramp-delay = <250>; 277 }; 278 279 vreg_l14a_1p8: ldo14 { 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <1800000>; 282 regulator-enable-ramp-delay = <250>; 283 }; 284 285 vreg_l15a_1p8: ldo15 { 286 regulator-min-microvolt = <1800000>; 287 regulator-max-microvolt = <2950000>; 288 regulator-enable-ramp-delay = <250>; 289 }; 290 291 vreg_l16a_2p7: ldo16 { 292 regulator-min-microvolt = <2696000>; 293 regulator-max-microvolt = <2696000>; 294 regulator-enable-ramp-delay = <250>; 295 }; 296 297 vreg_l17a_1p8: ldo17 { 298 regulator-min-microvolt = <1800000>; 299 regulator-max-microvolt = <2950000>; 300 regulator-enable-ramp-delay = <250>; 301 }; 302 303 vreg_l19a_3p3: ldo19 { 304 regulator-min-microvolt = <3000000>; 305 regulator-max-microvolt = <3312000>; 306 regulator-enable-ramp-delay = <250>; 307 }; 308 }; 309 310 regulators-1 { 311 compatible = "qcom,pm660l-rpmh-regulators"; 312 qcom,pmic-id = "b"; 313 314 vdd-s1-supply = <&vph_pwr>; 315 vdd-s2-supply = <&vph_pwr>; 316 vdd-s3-s4-supply = <&vph_pwr>; 317 vdd-s5-supply = <&vph_pwr>; 318 319 vdd-l1-l9-l10-supply = <&vreg_s2b_1p05>; 320 vdd-l2-supply = <&vreg_bob>; 321 vdd-l3-l5-l7-l8-supply = <&vreg_bob>; 322 vdd-l4-l6-supply = <&vreg_bob>; 323 vdd-bob-supply = <&vph_pwr>; 324 325 /* LDOs */ 326 vreg_l1b_0p925: ldo1 { 327 regulator-min-microvolt = <880000>; 328 regulator-max-microvolt = <900000>; 329 regulator-enable-ramp-delay = <250>; 330 }; 331 332 vreg_l2b_2p95: ldo2 { 333 regulator-min-microvolt = <1800000>; 334 regulator-max-microvolt = <2960000>; 335 regulator-enable-ramp-delay = <250>; 336 }; 337 338 vreg_l3b_3p0: ldo3 { 339 regulator-min-microvolt = <2850000>; 340 regulator-max-microvolt = <3008000>; 341 regulator-enable-ramp-delay = <250>; 342 }; 343 344 vreg_l4b_2p95: ldo4 { 345 regulator-min-microvolt = <2960000>; 346 regulator-max-microvolt = <2960000>; 347 regulator-enable-ramp-delay = <250>; 348 }; 349 350 vreg_l5b_2p95: ldo5 { 351 regulator-min-microvolt = <2960000>; 352 regulator-max-microvolt = <2960000>; 353 regulator-enable-ramp-delay = <250>; 354 }; 355 356 vreg_l6b_3p3: ldo6 { 357 regulator-min-microvolt = <3008000>; 358 regulator-max-microvolt = <3300000>; 359 regulator-enable-ramp-delay = <250>; 360 }; 361 362 vreg_l7b_3p125: ldo7 { 363 regulator-min-microvolt = <3088000>; 364 regulator-max-microvolt = <3100000>; 365 regulator-enable-ramp-delay = <250>; 366 }; 367 368 vreg_l8b_3p3: ldo8 { 369 regulator-min-microvolt = <3300000>; 370 regulator-max-microvolt = <3312000>; 371 regulator-enable-ramp-delay = <250>; 372 }; 373 374 /* 375 * Downstream specifies a fixed voltage of 3.312 V, but the 376 * PMIC4 BOB ranges don't support that. Widen the range a 377 * little to avoid adding a new BOB regulator type. 378 */ 379 vreg_bob: bob { 380 regulator-min-microvolt = <3296000>; 381 regulator-max-microvolt = <3328000>; 382 regulator-enable-ramp-delay = <500>; 383 }; 384 }; 385}; 386 387&gcc { 388 protected-clocks = <GCC_QSPI_CORE_CLK>, 389 <GCC_QSPI_CORE_CLK_SRC>, 390 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; 391}; 392 393&gpi_dma1 { 394 status = "okay"; 395}; 396 397&gpu { 398 status = "okay"; 399 400 zap-shader { 401 memory-region = <&gpu_mem>; 402 firmware-name = "qcom/sdm670/sargo/a615_zap.mbn"; 403 }; 404}; 405 406&i2c9 { 407 clock-frequency = <100000>; 408 status = "okay"; 409 410 synaptics-rmi4-i2c@20 { 411 compatible = "syna,rmi4-i2c"; 412 reg = <0x20>; 413 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>; 414 415 pinctrl-names = "default"; 416 pinctrl-0 = <&touchscreen_default>; 417 418 vio-supply = <&ts_1p8_supply>; 419 420 syna,reset-delay-ms = <200>; 421 syna,startup-delay-ms = <200>; 422 423 #address-cells = <1>; 424 #size-cells = <0>; 425 426 rmi4-f01@1 { 427 reg = <0x01>; 428 syna,nosleep-mode = <1>; 429 }; 430 431 rmi4-f12@12 { 432 reg = <0x12>; 433 touchscreen-x-mm = <62>; 434 touchscreen-y-mm = <127>; 435 syna,sensor-type = <1>; 436 }; 437 }; 438}; 439 440&mdss { 441 status = "okay"; 442}; 443 444&mdss_dsi0 { 445 vdda-supply = <&vreg_l1a_1p225>; 446 status = "okay"; 447 448 panel@0 { 449 compatible = "samsung,s6e3fa7-ams559nk06"; 450 reg = <0>; 451 452 reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; 453 454 pinctrl-names = "default"; 455 pinctrl-0 = <&panel_default>; 456 457 power-supply = <&vreg_l6b_3p3>; 458 459 port { 460 panel_in: endpoint { 461 remote-endpoint = <&mdss_dsi0_out>; 462 }; 463 }; 464 }; 465}; 466 467&mdss_dsi0_out { 468 remote-endpoint = <&panel_in>; 469 data-lanes = <0 1 2 3>; 470}; 471 472&mdss_dsi0_phy { 473 vdds-supply = <&vreg_l1b_0p925>; 474 status = "okay"; 475}; 476 477&mdss_mdp { 478 status = "okay"; 479}; 480 481&pm660l_flash { 482 status = "okay"; 483 484 led-0 { 485 function = LED_FUNCTION_FLASH; 486 color = <LED_COLOR_ID_WHITE>; 487 led-sources = <1>, <2>; 488 led-max-microamp = <500000>; 489 flash-max-microamp = <1500000>; 490 flash-max-timeout-us = <1280000>; 491 }; 492}; 493 494&pm660l_gpios { 495 vol_up_pin: vol-up-state { 496 pins = "gpio7"; 497 function = "normal"; 498 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 499 input-enable; 500 bias-pull-up; 501 }; 502}; 503 504&pon_pwrkey { 505 status = "okay"; 506}; 507 508&pon_resin { 509 linux,code = <KEY_VOLUMEDOWN>; 510 status = "okay"; 511}; 512 513&qupv3_id_1 { 514 status = "okay"; 515}; 516 517&sdhc_1 { 518 supports-cqe; 519 mmc-hs200-1_8v; 520 mmc-hs400-1_8v; 521 mmc-ddr-1_8v; 522 523 qcom,ddr-config = <0xc3040873>; 524 525 vmmc-supply = <&vreg_l4b_2p95>; 526 vqmmc-supply = <&vreg_l8a_1p8>; 527 528 status = "okay"; 529}; 530 531&tlmm { 532 gpio-reserved-ranges = <0 4>, <81 4>; 533 534 panel_default: panel-default-state { 535 te-pins { 536 pins = "gpio10"; 537 function = "mdp_vsync"; 538 drive-strength = <2>; 539 bias-pull-down; 540 }; 541 542 reset-pins { 543 pins = "gpio75"; 544 function = "gpio"; 545 drive-strength = <8>; 546 bias-disable; 547 }; 548 549 mode-pins { 550 pins = "gpio76"; 551 function = "gpio"; 552 drive-strength = <8>; 553 bias-disable; 554 }; 555 }; 556 557 touchscreen_default: ts-default-state { 558 ts-reset-pins { 559 pins = "gpio99"; 560 function = "gpio"; 561 drive-strength = <2>; 562 bias-pull-up; 563 output-high; 564 }; 565 566 ts-irq-pins { 567 pins = "gpio125"; 568 function = "gpio"; 569 drive-strength = <2>; 570 bias-disable; 571 }; 572 573 ts-switch-pins { 574 pins = "gpio135"; 575 function = "gpio"; 576 drive-strength = <2>; 577 bias-disable; 578 output-low; 579 }; 580 }; 581}; 582 583&usb_1_hsphy { 584 vdd-supply = <&vreg_l1b_0p925>; 585 vdda-pll-supply = <&vreg_l10a_1p8>; 586 vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; 587 588 status = "okay"; 589}; 590 591&usb_1 { 592 qcom,select-utmi-as-pipe-clk; 593 status = "okay"; 594}; 595 596&usb_1_dwc3 { 597 /* Only peripheral works for now */ 598 dr_mode = "peripheral"; 599 600 /* Do not assume that sdm670.dtsi will never support USB 3.0 */ 601 phys = <&usb_1_hsphy>; 602 phy-names = "usb2-phy"; 603 maximum-speed = "high-speed"; 604}; 605