1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/snps,dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys DesignWare USB3 Controller 8 9maintainers: 10 - Felipe Balbi <[email protected]> 11 12description: 13 This is usually a subnode to DWC3 glue to which it is connected, but can also 14 be presented as a standalone DT node with an optional vendor-specific 15 compatible string. 16 17allOf: 18 - $ref: snps,dwc3-common.yaml# 19 20properties: 21 compatible: 22 contains: 23 oneOf: 24 - const: snps,dwc3 25 - const: synopsys,dwc3 26 deprecated: true 27 28 reg: 29 maxItems: 1 30 31 interrupts: 32 description: 33 It's either a single common DWC3 interrupt (dwc_usb3) or individual 34 interrupts for the host, gadget and DRD modes. 35 minItems: 1 36 maxItems: 4 37 38 interrupt-names: 39 minItems: 1 40 maxItems: 4 41 oneOf: 42 - const: dwc_usb3 43 - items: 44 enum: [host, peripheral, otg, wakeup] 45 46 clocks: 47 description: 48 In general the core supports three types of clocks. bus_early is a 49 SoC Bus Clock (AHB/AXI/Native). ref generates ITP when the UTMI/ULPI 50 PHY is suspended. suspend clocks a small part of the USB3 core when 51 SS PHY in P3. But particular cases may differ from that having less 52 or more clock sources with another names. 53 54 clock-names: 55 contains: 56 anyOf: 57 - enum: [bus_early, ref, suspend] 58 - true 59 60 dma-coherent: true 61 62 iommus: 63 maxItems: 1 64 65 power-domains: 66 description: 67 The DWC3 has 2 power-domains. The power management unit (PMU) and 68 everything else. The PMU is typically always powered and may not have an 69 entry. 70 minItems: 1 71 items: 72 - description: Core 73 - description: Power management unit 74 75 resets: 76 minItems: 1 77 78unevaluatedProperties: false 79 80required: 81 - compatible 82 - reg 83 - interrupts 84 85examples: 86 - | 87 usb@4a030000 { 88 compatible = "snps,dwc3"; 89 reg = <0x4a030000 0xcfff>; 90 interrupts = <0 92 4>; 91 usb-phy = <&usb2_phy>, <&usb3_phy>; 92 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; 93 }; 94 - | 95 usb@4a000000 { 96 compatible = "snps,dwc3"; 97 reg = <0x4a000000 0xcfff>; 98 interrupts = <0 92 4>; 99 clocks = <&clk 1>, <&clk 2>, <&clk 3>; 100 clock-names = "bus_early", "ref", "suspend"; 101 phys = <&usb2_phy>, <&usb3_phy>; 102 phy-names = "usb2-phy", "usb3-phy"; 103 snps,dis_u2_susphy_quirk; 104 snps,dis_enblslpm_quirk; 105 }; 106... 107